1. 13 8月, 2012 1 次提交
  2. 18 7月, 2012 1 次提交
  3. 21 6月, 2012 1 次提交
    • C
      drm/radeon: apply Murphy's law to the kms irq code v3 · fb98257a
      Christian Koenig 提交于
      1. It is really dangerous to have more than one
         spinlock protecting the same information.
      
      2. radeon_irq_set sometimes wasn't called with lock
         protection, so it can happen that more than one
         CPU would tamper with the irq regs at the same
         time.
      
      3. The pm.gui_idle variable was assuming that the 3D
         engine wasn't becoming idle between testing the
         register and setting the variable. So just remove
         it and test the register directly.
      
      v2: Also handle the hpd irq code the same way.
      v3: Rename hpd parameter for clarification.
      Signed-off-by: NChristian Koenig <christian.koenig@amd.com>
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      fb98257a
  4. 05 6月, 2012 1 次提交
  5. 12 4月, 2012 1 次提交
  6. 21 3月, 2012 2 次提交
  7. 17 2月, 2012 1 次提交
    • D
      drm: move pci bus master enable into driver. · 466e69b8
      Dave Airlie 提交于
      The current enabling of bus mastering in the drm midlayer allows a large
      race condition under kexec. When a kexec'ed kernel re-enables bus mastering
      for the GPU, previously setup dma blocks may cause writes to random pieces
      of memory. On radeon the writeback mechanism can cause these sorts of issues.
      
      This patch doesn't fix the problem, but it moves the bus master enable under
      the individual drivers control so they can move enabling it until later in
      their load cycle and close the race.
      
      Fix for radeon kms driver will be in a follow-up patch.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      466e69b8
  8. 06 1月, 2012 1 次提交
    • J
      drm/radeon: GPU virtual memory support v22 · 721604a1
      Jerome Glisse 提交于
      Virtual address space are per drm client (opener of /dev/drm).
      Client are in charge of virtual address space, they need to
      map bo into it by calling DRM_RADEON_GEM_VA ioctl.
      
      First 16M of virtual address space is reserved by the kernel.
      
      Once using 2 level page table we should be able to have a small
      vram memory footprint for each pt (there would be one pt for all
      gart, one for all vram and then one first level for each virtual
      address space).
      
      Plan include using the sub allocator for a common vm page table
      area and using memcpy to copy vm page table in & out. Or use
      a gart object and copy things in & out using dma.
      
      v2: agd5f fixes:
      - Add vram base offset for vram pages.  The GPU physical address of a
      vram page is FB_OFFSET + page offset.  FB_OFFSET is 0 on discrete
      cards and the physical bus address of the stolen memory on
      integrated chips.
      - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1
      
      v3: agd5f:
      - integrate with the semaphore/multi-ring stuff
      
      v4:
      - rebase on top ttm dma & multi-ring stuff
      - userspace is now in charge of the address space
      - no more specific cs vm ioctl, instead cs ioctl has a new
        chunk
      
      v5:
      - properly handle mem == NULL case from move_notify callback
      - fix the vm cleanup path
      
      v6:
      - fix update of page table to only happen on valid mem placement
      
      v7:
      - add tlb flush for each vm context
      - add flags to define mapping property (readable, writeable, snooped)
      - make ring id implicit from ib->fence->ring, up to each asic callback
        to then do ring specific scheduling if vm ib scheduling function
      
      v8:
      - add query for ib limit and kernel reserved virtual space
      - rename vm->size to max_pfn (maximum number of page)
      - update gem_va ioctl to also allow unmap operation
      - bump kernel version to allow userspace to query for vm support
      
      v9:
      - rebuild page table only when bind and incrementaly depending
        on bo referenced by cs and that have been moved
      - allow virtual address space to grow
      - use sa allocator for vram page table
      - return invalid when querying vm limit on non cayman GPU
      - dump vm fault register on lockup
      
      v10: agd5f:
      - Move the vm schedule_ib callback to a standalone function, remove
        the callback and use the existing ib_execute callback for VM IBs.
      
      v11:
      - rebase on top of lastest Linus
      
      v12: agd5f:
      - remove spurious backslash
      - set IB vm_id to 0 in radeon_ib_get()
      
      v13: agd5f:
      - fix handling of RADEON_CHUNK_ID_FLAGS
      
      v14:
      - fix va destruction
      - fix suspend resume
      - forbid bo to have several different va in same vm
      
      v15:
      - rebase
      
      v16:
      - cleanup left over of vm init/fini
      
      v17: agd5f:
      - cs checker
      
      v18: agd5f:
      - reworks the CS ioctl to better support multiple rings and
      VM.  Rather than adding a new chunk id for VM, just re-use the
      IB chunk id and add a new flags for VM mode.  Also define additional
      dwords for the flags chunk id to define the what ring we want to use
      (gfx, compute, uvd, etc.) and the priority.
      
      v19:
      - fix cs fini in weird case of no ib
      - semi working flush fix for ni
      - rebase on top of sa allocator changes
      
      v20: agd5f:
      - further CS ioctl cleanups from Christian's comments
      
      v21: agd5f:
      - integrate CS checker improvements
      
      v22: agd5f:
      - final cleanups for release, only allow VM CS on cayman
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      721604a1
  9. 28 10月, 2011 1 次提交
  10. 01 9月, 2011 1 次提交
  11. 18 7月, 2011 1 次提交
  12. 13 7月, 2011 1 次提交
  13. 04 5月, 2011 1 次提交
  14. 27 4月, 2011 1 次提交
  15. 03 3月, 2011 1 次提交
  16. 01 3月, 2011 1 次提交
  17. 07 2月, 2011 1 次提交
  18. 28 1月, 2011 1 次提交
  19. 25 1月, 2011 1 次提交
  20. 06 1月, 2011 1 次提交
  21. 05 1月, 2011 1 次提交
  22. 22 11月, 2010 1 次提交
    • M
      drm/kms/radeon: Add support for precise vblank timestamping. · f5a80209
      Mario Kleiner 提交于
      This patch adds new functions for use by the drm core:
      
      .get_vblank_timestamp() provides a precise timestamp
      for the end of the most recent (or current) vblank
      interval of a given crtc, as needed for the DRI2
      implementation of the OML_sync_control extension.
      
      It is a thin wrapper around the drm function
      drm_calc_vbltimestamp_from_scanoutpos() which does
      almost all the work and is shared across drivers.
      
      .get_scanout_position() provides the current horizontal
      and vertical video scanout position and "in vblank"
      status of a given crtc, as needed by the drm for use by
      drm_calc_vbltimestamp_from_scanoutpos().
      
      The function is also used by the dynamic gpu reclocking
      code to determine when it is safe to reclock inside vblank.
      
      For that purpose radeon_pm_in_vbl() is modified to
      accomodate a small change in the function prototype of
      the radeon_get_crtc_scanoutpos() which is hooked up to
      .get_scanout_position().
      
      This code has been tested on AVIVO hardware, a RV530
      (ATI Mobility Radeon X1600) in a Intel Core-2 Duo MacBookPro
      and some R600 variant (FireGL V7600) in a single cpu
      AMD Athlon 64 PC.
      Signed-off-by: NMario Kleiner <mario.kleiner@tuebingen.mpg.de>
      Reviewed-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      f5a80209
  23. 22 9月, 2010 1 次提交
  24. 20 8月, 2010 1 次提交
  25. 17 8月, 2010 1 次提交
    • D
      drm: block userspace under allocating buffer and having drivers overwrite it (v2) · 1b2f1489
      Dave Airlie 提交于
      With the current screwed but its ABI, ioctls for the drm, Linus pointed out that we could allow userspace to specify the allocation size, but we pass it to the driver which then uses it blindly to store a struct. Now if userspace specifies the allocation size as smaller than the driver needs, the driver can possibly overwrite memory.
      
      This patch restructures the driver ioctls so we store the structure size we are expecting, and make sure we allocate at least that size. The copy from/to userspace are still restricted to the size the user specifies, this allows ioctl structs to grow on both sides of the equation.
      
      Up until now we didn't really use the DRM_IOCTL defines in the kernel, so this cleans them up and adds them for nouveau.
      
      v2:
      fix nouveau pushbuf arg (thanks to Ben for pointing it out)
      Reported-by: NLinus Torvalds <torvalds@linuxfoundation.org>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      1b2f1489
  26. 10 8月, 2010 2 次提交
  27. 04 8月, 2010 1 次提交
  28. 02 8月, 2010 4 次提交
  29. 22 7月, 2010 1 次提交
  30. 08 6月, 2010 1 次提交
  31. 18 5月, 2010 1 次提交
  32. 23 4月, 2010 1 次提交
  33. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  34. 01 3月, 2010 1 次提交
    • D
      vga_switcheroo: initial implementation (v15) · 6a9ee8af
      Dave Airlie 提交于
      Many new laptops now come with 2 gpus, one to be used for low power
      modes and one for gaming/on-ac applications. These GPUs are typically
      wired to the laptop panel and VGA ports via a multiplexer unit which
      is controlled via ACPI methods.
      
      4 combinations of systems typically exist - with 2 ACPI methods.
      Intel/ATI - Lenovo W500/T500 - use ATPX ACPI method
      ATI/ATI - some ASUS - use ATPX ACPI Method
      Intel/Nvidia - - use _DSM ACPI method
      Nvidia/Nvidia -  - use _DSM ACPI method.
      
      TODO:
      This patch adds support for the ATPX method and initial bits
      for the _DSM methods that need to written by someone with
      access to the hardware.
      Add a proper non-debugfs interface - need to get some proper
      testing first.
      
      v2: add power up/down support for both devices
      on W500 puts i915/radeon into D3 and cuts power to radeon.
      
      v3: redo probing methods, no DMI list, drm devices call to
      register with switcheroo, it tries to find an ATPX method on
      any device and once there is two devices + ATPX it inits the
      switcher.
      
      v4: ATPX msg handling using buffers - should work on more machines
      
      v5: rearchitect after more mjg59 discussion - move ATPX handling to
          radeon driver.
      
      v6: add file headers + initial nouveau bits (to be filled out).
      
      v7: merge delayed switcher code.
      
      v8: avoid suspend/resume of gpu that is off
      
      v9: rearchitect - mjg59 is always right. - move all ATPX code to
      radeon, should allow simpler DSM also proper ATRM handling
      
      v10: add ATRM support for radeon BIOS, add mutex to lock vgasr_priv
      
      v11: fix bug in resuming Intel for 2nd time.
      
      v12: start fixing up nvidia code blindly.
      
      v13: blindly guess at finishing nvidia code
      
      v14: remove radeon audio hacks - fix up intel resume more like upstream
      
      v15: clean up printks + remove unnecessary igd/dis pointers
      
      mount debugfs
      
      /sys/kernel/debug/vgaswitcheroo/switch - should exist if ATPX detected
       + 2 cards.
      
      DIS - immediate change to discrete
      IGD - immediate change to IGD
      DDIS - delayed change to discrete
      DIGD - delayed change to IGD
      ON - turn on not in use
      OFF - turn off not in use
      
      Tested on W500 (Intel/ATI) and T500 (Intel/ATI)
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      6a9ee8af
  35. 09 2月, 2010 1 次提交