1. 20 4月, 2011 1 次提交
    • B
      powerpc/xics: Rewrite XICS driver · 0b05ac6e
      Benjamin Herrenschmidt 提交于
      This is a significant rework of the XICS driver, too significant to
      conveniently break it up into a series of smaller patches to be honest.
      
      The driver is moved to a more generic location to allow new platforms
      to use it, and is broken up into separate ICP and ICS "backends". For
      now we have the native and "hypervisor" ICP backends and one common
      RTAS ICS backend.
      
      The driver supports one ICP backend instanciation, and many ICS ones,
      in order to accomodate future platforms with multiple possibly different
      interrupt "sources" mechanisms.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0b05ac6e
  2. 24 3月, 2011 1 次提交
  3. 29 11月, 2010 1 次提交
  4. 14 10月, 2010 1 次提交
  5. 13 10月, 2010 1 次提交
  6. 12 11月, 2009 1 次提交
  7. 17 6月, 2009 1 次提交
  8. 16 6月, 2009 1 次提交
    • M
      powerpc: Add configurable -Werror for arch/powerpc · ba55bd74
      Michael Ellerman 提交于
      Add the option to build the code under arch/powerpc with -Werror.
      
      The intention is to make it harder for people to inadvertantly introduce
      warnings in the arch/powerpc code. It needs to be configurable so that
      if a warning is introduced, people can easily work around it while it's
      being fixed.
      
      The option is a negative, ie. don't enable -Werror, so that it will be
      turned on for allyes and allmodconfig builds.
      
      The default is n, in the hope that developers will build with -Werror,
      that will probably lead to some build breaks, I am prepared to be flamed.
      
      It's not enabled for math-emu, which is a steaming pile of warnings.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ba55bd74
  9. 07 6月, 2009 1 次提交
  10. 31 12月, 2008 1 次提交
  11. 18 10月, 2008 1 次提交
  12. 13 10月, 2008 1 次提交
  13. 23 9月, 2008 1 次提交
  14. 20 8月, 2008 1 次提交
    • M
      powerpc: Split-out common MSI bitmap logic into msi_bitmap.c · 7e302869
      Michael Ellerman 提交于
      There are now two almost identical implementations of an MSI bitmap
      allocator, one in mpic_msi.c and the other in fsl_msi.c.
      
      Merge them together and put the result in msi_bitmap.c.  Some of the
      MPIC bits will remain to provide a nicer interface for the MPIC users.
      
      In the process we fix two buglets.  The first is that the allocation
      routines, now msi_bitmap_alloc_hwirqs(), returned an unsigned result,
      even though they use -1 to indicate allocation failure.  Although all
      the callers were checking correctly, it is much better for the routine
      to just return an int.  At least until someone wants > ~2 billion MSIs.
      
      The second buglet is that the device tree reservation logic only
      allowed power-of-two reservations.  AFAICT that didn't effect any
      existing code but it's nicer if we can reserve arbitrary irqs from MSI
      use.
      
      We also add some selftests, which exposed the two buglets and now test
      for them, as well as some basic sanity tests.  The tests are only built
      when CONFIG_DEBUG_KERNEL=y.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7e302869
  15. 04 8月, 2008 1 次提交
  16. 11 6月, 2008 1 次提交
    • A
      powerpc/QE: switch to the cpm_muram implementation · 5093bb96
      Anton Vorontsov 提交于
      This is very trivial patch. We're transitioning to the cpm_muram_*
      calls. That's it.
      
      Less trivial changes:
      - BD_SC_* defines were defined in the cpm.h and qe.h, so to avoid redefines
        we remove BD_SC from the qe.h and use cpm.h along with cpm_muram_*
        prototypes;
      - qe_muram_dump was unused and thus removed;
      - added some code to the cpm_common.c to support legacy QE bindings
        (data-only node name).
      - For convenience, define qe_* calls to cpm_*. So drivers need not to be
        changed.
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      5093bb96
  17. 10 6月, 2008 1 次提交
    • A
      powerpc/sysdev: implement FSL GTM support · 83ff9dcf
      Anton Vorontsov 提交于
      GTM stands for General-purpose Timers Module and able to generate
      timer{1,2,3,4} interrupts. These timers are used by the drivers that
      need time precise interrupts (like for USB transactions scheduling for
      the Freescale USB Host controller as found in some QE and CPM chips),
      or these timers could be used as wakeup events from the CPU deep-sleep
      mode.
      
      Things unimplemented:
      1. Cascaded (32 bit) timers (1-2, 3-4).
         This is straightforward to implement when needed, two timers should
         be marked as "requested" and configured as appropriate.
      2. Super-cascaded (64 bit) timers (1-2-3-4).
         This is also straightforward to implement when needed, all timers
         should be marked as "requested" and configured as appropriate.
      Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      83ff9dcf
  18. 03 6月, 2008 1 次提交
    • J
      [POWERPC] fsl: PCIe MSI support for 83xx/85xx/86xx processors. · 34e36c15
      Jason Jin 提交于
      This MSI driver can be used on 83xx/85xx/86xx board.
      In this driver, virtual interrupt host and chip were
      setup. There are 256 MSI interrupts in this host, Every 32
      MSI interrupts cascaded to one IPIC/MPIC interrupt.
      The chip was treated as edge sensitive and some necessary
      functions were setup for this chip.
      
      Before using the MSI interrupt, PCI/PCIE device need to
      ask for a MSI interrupt in the 256 MSI interrupts. A 256bit
      bitmap show which MSI interrupt was used, reserve bit in
      the bitmap can be used to force the device use some designate
      MSI interrupt in the 256 MSI interrupts. Sometimes this is useful
      for testing the all the MSI interrupts. The msi-available-ranges
      property in the dts file was used for this purpose.
      Signed-off-by: NJason Jin <Jason.jin@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      34e36c15
  19. 16 5月, 2008 1 次提交
  20. 17 4月, 2008 1 次提交
  21. 26 3月, 2008 1 次提交
  22. 28 1月, 2008 1 次提交
  23. 25 1月, 2008 1 次提交
    • D
      [POWERPC] Enable RTC for Ebony and Walnut (v2) · 22258fa4
      David Gibson 提交于
      This patch extends the Ebony and Walnut platform code to instantiate
      the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip
      found on both those boards.  The patch uses a helper function to scan
      the device tree and instantiate the appropriate platform_device based
      on it, so it should be easy to extend for other boards which have mmio
      mapped RTC chips.
      
      Along with this, the device tree binding for the ds1743 chips is
      tweaked, based on the existing DS1385 OF binding found at:
      	http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt
      Although that document covers the NVRAM portion of the chip, whereas
      here we're interested in the RTC portion, so it's not entirely clear
      if that's a good model.
      
      This implements only RTC class driver support - that is /dev/rtc0, not
      /dev/rtc, and the low-level get/set time callbacks remain
      unimplemented.  That means in order to get at the clock you will
      either need a modified version of hwclock which will look at
      /dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      22258fa4
  24. 24 1月, 2008 2 次提交
  25. 24 12月, 2007 1 次提交
  26. 20 12月, 2007 1 次提交
    • O
      [POWERPC] pasemi: Implement MSI support · 38958dd9
      Olof Johansson 提交于
      Implement MSI support for PA Semi PWRficient platforms. MSI is done
      through a special range of sources on the openpic controller, and they're
      unfortunately breaking the usual concepts of how sources are programmed:
      
      * The source is calculated as 512 + the value written into the MSI
        register
      * The vector for this source is added to the source and reported
        through IACK
      
      This means that for simplicity, it makes much more sense to just set the
      vector to 0 for the source, since that's really the vector we expect to
      see from IACK.
      
      Also, the affinity/priority registers will affect 16 sources at a
      time. To avoid most (simple) users from being limited by this, allocate
      16 sources per device but use only one. This means that there's a total
      of 32 sources.
      
      If we get usage scenarions that need more sources, the allocator should
      probably be revised to take an alignment argument and size, not just do
      natural alignment.
      
      Finally, since I'm already touching the MPIC names on pasemi, rename
      the base one from the somewhat odd " PAS-OPIC  " to "PASEMI-OPIC".
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      Acked-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      38958dd9
  27. 17 10月, 2007 1 次提交
  28. 10 10月, 2007 1 次提交
  29. 04 10月, 2007 1 次提交
  30. 03 10月, 2007 2 次提交
  31. 22 9月, 2007 1 次提交
  32. 23 7月, 2007 1 次提交
  33. 21 7月, 2007 1 次提交
    • M
      [CELL] driver for DDR2 memory on AXON · dbdf04c4
      Maxim Shchetynin 提交于
      The Axon bridge chip used on new Cell/B.E. based blade servers
      comes with a DDR2 memory controller that can be used to
      attach cheap memory modules, as opposed to the high-speed
      XDR memory that is used by the CPU itself.
      
      Since the memory controller does not participate in the
      cache coherency protocol, we can not use the memory direcly
      for Linux applications, but by providing a block device
      it can be used for swap space, temporary file storage and
      through the use of the direct_access block device operation
      for mapping into user addresses, when it is mounted with
      an appropriate file system.
      Signed-off-by: NMaxim Shchetynin <maxim@de.ibm.com>
      Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
      dbdf04c4
  34. 11 7月, 2007 1 次提交
  35. 29 6月, 2007 2 次提交
  36. 25 6月, 2007 1 次提交
    • G
      [POWERPC] Don't link timer.o for powerpc systems using generic rtc · 1a06e0fe
      Guennadi Liakhovetski 提交于
      With both generic rtc and powerpc timer suspend / resume code now in the
      (powerpc.git) tree, powerpc platforms using the generic timer and enabling
      power management will have timer.o linked in the kernel, which they don't
      need. Moreover, it will likely WARN_ON(!ppc_md.get_rtc_time), save
      zero-time and return no error on suspend...
      
      As a possible solution we can choose not to build timer.o when RTC_CLASS
      is enabled.  However, I can imagine systems with 2 rtc's, one served by the
      ppc-rtc, another one generic built as a module, in which case using the
      ppc-rtc for suspend / resume will be impossible.  Not to say, that such a
      configuration would be ugly...
      Signed-off-by: NG. Liakhovetski <g.liakhovetski@gmx.de>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1a06e0fe
  37. 12 5月, 2007 1 次提交