- 20 4月, 2011 1 次提交
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由 Benjamin Herrenschmidt 提交于
This is a significant rework of the XICS driver, too significant to conveniently break it up into a series of smaller patches to be honest. The driver is moved to a more generic location to allow new platforms to use it, and is broken up into separate ICP and ICS "backends". For now we have the native and "hypervisor" ICP backends and one common RTAS ICS backend. The driver supports one ICP backend instanciation, and many ICS ones, in order to accomodate future platforms with multiple possibly different interrupt "sources" mechanisms. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 24 3月, 2011 1 次提交
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由 Alexandre Bounine 提交于
1. Add an option to include RapidIO support if the PCI is available. 2. Add FSL_RIO configuration option to enable controller selection. 3. Add RapidIO support option into x86 and MIPS architectures. Signed-off-by: NAlexandre Bounine <alexandre.bounine@idt.com> Acked-by: NKumar Gala <galak@kernel.crashing.org> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Li Yang <leoli@freescale.com> Cc: Thomas Moll <thomas.moll@sysgo.com> Cc: Micha Nelissen <micha@neli.hopto.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 29 11月, 2010 1 次提交
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由 Victor Gallardo 提交于
Add suspend/resume support for 4xx compatible CPUs. See /sys/power/state for available power states configured in. Add two different idle states (idle-wait and idle-doze) controlled via sysfs. Default is idle-wait. cat /sys/devices/system/cpu/cpu0/idle [wait] doze To save additional power, use idle-doze. echo doze > /sys/devices/system/cpu/cpu0/idle cat /sys/devices/system/cpu/cpu0/idle wait [doze] Signed-off-by: NVictor Gallardo <vgallardo@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 14 10月, 2010 1 次提交
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由 Harninder Rai 提交于
It adds cache-sram support in P1/P2 QorIQ platforms as under: * A small abstraction over powerpc's remote heap allocator * Exports mpc85xx_cache_sram_alloc()/free() APIs * Supports only one contiguous SRAM window * Drivers can do the following in Kconfig to use these APIs "select FSL_85XX_CACHE_SRAM if MPC85xx" * Required SRAM size and the offset where SRAM should be mapped must be provided at kernel command line as : cache-sram-size=<value> cache-sram-offset=<offset> Signed-off-by: NHarninder Rai <harninder.rai@freescale.com> Signed-off-by: NVivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 13 10月, 2010 1 次提交
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由 matt mooney 提交于
Replace EXTRA_CFLAGS with ccflags-y and EXTRA_AFLAGS with asflags-y. Signed-off-by: Nmatt mooney <mfm@muteddisk.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 12 11月, 2009 1 次提交
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由 Anton Vorontsov 提交于
This patch adds suspend/resume support for MPC8540 and MPC8641D- compatible CPUs. To reach sleep state, we just write the SLP bit into the PM control and status register. So far we don't support Deep Sleep mode as found in newer MPC85xx CPUs (i.e. MPC8536). It can be relatively easy implemented though, and for it we reserve 'mem' suspend type. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Acked-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 6月, 2009 1 次提交
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由 Wolfgang Denk 提交于
So far, MPC512x used mpc512x_find_ips_freq() to get the bus frequency, while MPC52xx used mpc52xx_find_ipb_freq(). Despite the different clock names (IPS vs. IPB) the code was identical. Use common code for both processor families. Signed-off-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 16 6月, 2009 1 次提交
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由 Michael Ellerman 提交于
Add the option to build the code under arch/powerpc with -Werror. The intention is to make it harder for people to inadvertantly introduce warnings in the arch/powerpc code. It needs to be configurable so that if a warning is introduced, people can easily work around it while it's being fixed. The option is a negative, ie. don't enable -Werror, so that it will be turned on for allyes and allmodconfig builds. The default is n, in the hope that developers will build with -Werror, that will probably lead to some build breaks, I am prepared to be flamed. It's not enabled for math-emu, which is a steaming pile of warnings. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 07 6月, 2009 1 次提交
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由 Roderick Colenbrander 提交于
This patch adds support for the Xilinx plbv46-pci-1.03.a PCI host bridge IPcore. Signed-off-by: NRoderick Colenbrander <thunderbird2k@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 31 12月, 2008 1 次提交
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由 Anton Vorontsov 提交于
The driver supports very simple GPIO controllers, that is, when a controller provides just a 'data' register. Such controllers may be found in various BCSRs (Board's FPGAs used to control board's switches, LEDs, chip-selects, Ethernet/USB PHY power, etc). So far we support only 1-byte GPIO banks. Support for other widths may be implemented when/if needed. p.s. To avoid "made up" compatible entries (like compatible = "simple-gpio"), boards must call simple_gpiochip_init() to pass the compatible string. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 18 10月, 2008 1 次提交
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由 Steven A. Falco 提交于
This patch adds support for the GPIO functions of PPC40x and PPC44x SOCs. Signed-off-by: NSteve Falco <sfalco@harris.com> Acked-by: NStefan Roese <sr@denx.de> Acked-by: NSean MacLennan <smaclennan@pikatech.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 13 10月, 2008 1 次提交
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由 Josh Boyer 提交于
There is an old workaround in the sysdev/Makefile for dealing with arch/ppc vs. arch/powerpc compiles. This is no longer needed as arch/ppc is dead. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 23 9月, 2008 1 次提交
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由 Peter Korsgaard 提交于
Structured similar to the existing QE GPIO support. Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk> Acked-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 20 8月, 2008 1 次提交
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由 Michael Ellerman 提交于
There are now two almost identical implementations of an MSI bitmap allocator, one in mpic_msi.c and the other in fsl_msi.c. Merge them together and put the result in msi_bitmap.c. Some of the MPIC bits will remain to provide a nicer interface for the MPIC users. In the process we fix two buglets. The first is that the allocation routines, now msi_bitmap_alloc_hwirqs(), returned an unsigned result, even though they use -1 to indicate allocation failure. Although all the callers were checking correctly, it is much better for the routine to just return an int. At least until someone wants > ~2 billion MSIs. The second buglet is that the device tree reservation logic only allowed power-of-two reservations. AFAICT that didn't effect any existing code but it's nicer if we can reserve arbitrary irqs from MSI use. We also add some selftests, which exposed the two buglets and now test for them, as well as some basic sanity tests. The tests are only built when CONFIG_DEBUG_KERNEL=y. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 04 8月, 2008 1 次提交
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由 Kumar Gala 提交于
Now that arch/ppc is gone and CONFIG_PPC_MERGE is always set, remove the dead code associated with !CONFIG_PPC_MERGE from arch/powerpc and include/asm-powerpc. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 11 6月, 2008 1 次提交
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由 Anton Vorontsov 提交于
This is very trivial patch. We're transitioning to the cpm_muram_* calls. That's it. Less trivial changes: - BD_SC_* defines were defined in the cpm.h and qe.h, so to avoid redefines we remove BD_SC from the qe.h and use cpm.h along with cpm_muram_* prototypes; - qe_muram_dump was unused and thus removed; - added some code to the cpm_common.c to support legacy QE bindings (data-only node name). - For convenience, define qe_* calls to cpm_*. So drivers need not to be changed. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 10 6月, 2008 1 次提交
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由 Anton Vorontsov 提交于
GTM stands for General-purpose Timers Module and able to generate timer{1,2,3,4} interrupts. These timers are used by the drivers that need time precise interrupts (like for USB transactions scheduling for the Freescale USB Host controller as found in some QE and CPM chips), or these timers could be used as wakeup events from the CPU deep-sleep mode. Things unimplemented: 1. Cascaded (32 bit) timers (1-2, 3-4). This is straightforward to implement when needed, two timers should be marked as "requested" and configured as appropriate. 2. Super-cascaded (64 bit) timers (1-2-3-4). This is also straightforward to implement when needed, all timers should be marked as "requested" and configured as appropriate. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 03 6月, 2008 1 次提交
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由 Jason Jin 提交于
This MSI driver can be used on 83xx/85xx/86xx board. In this driver, virtual interrupt host and chip were setup. There are 256 MSI interrupts in this host, Every 32 MSI interrupts cascaded to one IPIC/MPIC interrupt. The chip was treated as edge sensitive and some necessary functions were setup for this chip. Before using the MSI interrupt, PCI/PCIE device need to ask for a MSI interrupt in the 256 MSI interrupts. A 256bit bitmap show which MSI interrupt was used, reserve bit in the bitmap can be used to force the device use some designate MSI interrupt in the 256 MSI interrupts. Sometimes this is useful for testing the all the MSI interrupts. The msi-available-ranges property in the dts file was used for this purpose. Signed-off-by: NJason Jin <Jason.jin@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 16 5月, 2008 1 次提交
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由 Scott Wood 提交于
This adds a function to put a 6xx/7xx/7xxx/83xx family CPU into sleep mode, and return after an interrupt has occurred. It expects to be called with interrupts disabled, and returns with interrupts disabled. Interrupts are enabled while the processor is asleep, but the interrupt that wakes the processor is not handled; it is still pending when this function returns. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 17 4月, 2008 1 次提交
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由 Anton Vorontsov 提交于
Freescale UPM can be used to adjust localbus timings or to generate orbitrary, pre-programmed "patterns" on the external Localbus signals. This patch implements few routines so drivers could work with UPMs in safe and generic manner. So far there is just one user of these routines: Freescale UPM NAND driver. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 26 3月, 2008 1 次提交
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由 Stefan Roese 提交于
This patch adds support for the 256k L2 cache found on some IBM/AMCC 4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c) which currently "only" adds the L2 cache init code. Other common 4xx stuff can be added later here. The L2 cache handling code is a copy of Eugene's code in arch/ppc with small modifications. Tested on AMCC Taishan 440GX. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 28 1月, 2008 1 次提交
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由 Jochen Friedrich 提交于
Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the includes accordingly. Signed-off-by: NJochen Friedrich <jochen@scram.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 25 1月, 2008 1 次提交
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由 David Gibson 提交于
This patch extends the Ebony and Walnut platform code to instantiate the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip found on both those boards. The patch uses a helper function to scan the device tree and instantiate the appropriate platform_device based on it, so it should be easy to extend for other boards which have mmio mapped RTC chips. Along with this, the device tree binding for the ds1743 chips is tweaked, based on the existing DS1385 OF binding found at: http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt Although that document covers the NVRAM portion of the chip, whereas here we're interested in the RTC portion, so it's not entirely clear if that's a good model. This implements only RTC class driver support - that is /dev/rtc0, not /dev/rtc, and the low-level get/set time callbacks remain unimplemented. That means in order to get at the clock you will either need a modified version of hwclock which will look at /dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 24 1月, 2008 2 次提交
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由 Kumar Gala 提交于
Do just enough to move the RapidIO support code for 85xx over from arch/ppc into arch/powerpc and make it still build. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 John Rigby 提交于
IPIC is not just for 83xx anymore so make it a separate config option. Signed-off-by: NJohn Rigby <jrigby@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 24 12月, 2007 1 次提交
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由 Benjamin Herrenschmidt 提交于
This adds base support code for the 4xx PCI-X bridge. It also provides placeholders for the PCI and PCI-E version but they aren't supported with this patch. The bridges are configured based on device-tree properties. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 20 12月, 2007 1 次提交
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由 Olof Johansson 提交于
Implement MSI support for PA Semi PWRficient platforms. MSI is done through a special range of sources on the openpic controller, and they're unfortunately breaking the usual concepts of how sources are programmed: * The source is calculated as 512 + the value written into the MSI register * The vector for this source is added to the source and reported through IACK This means that for simplicity, it makes much more sense to just set the vector to 0 for the source, since that's really the vector we expect to see from IACK. Also, the affinity/priority registers will affect 16 sources at a time. To avoid most (simple) users from being limited by this, allocate 16 sources per device but use only one. This means that there's a total of 32 sources. If we get usage scenarions that need more sources, the allocator should probably be revised to take an alignment argument and size, not just do natural alignment. Finally, since I'm already touching the MPIC names on pasemi, rename the base one from the somewhat odd " PAS-OPIC " to "PASEMI-OPIC". Signed-off-by: NOlof Johansson <olof@lixom.net> Acked-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 17 10月, 2007 1 次提交
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由 Sylvain Munaut 提交于
This patch adds support for the core of the BestComm API for the Freescale MPC5200(b). The BestComm engine is a microcode-controlled / tasks-based DMA used by several of the onchip devices. Setting up the tasks / memory allocation and all common low level functions are handled by this patch. The specifics details of each tasks and their microcode are split-out in separate patches. This is not the official API, but a much cleaner one. (hopefully) Signed-off-by: NSylvain Munaut <tnt@246tNt.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 10 10月, 2007 1 次提交
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由 Grant Likely 提交于
dcr.c is an arch/powerpc only thing. Compiling ppc405 arch/ppc kernels throws warnings without this change. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 04 10月, 2007 1 次提交
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由 Scott Wood 提交于
This code assumes that the ports have been previously set up, with buffers in DPRAM. Signed-off-by: NScott Wood <scottwood@freescale.com> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 03 10月, 2007 2 次提交
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由 Grant Likely 提交于
Adds support for the Xilinx opb-intc interrupt controller Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Tony Breeds 提交于
With these functions implemented we cooperate better with the generic timekeeping code. This obsoletes the need for the timer sysdev as a bonus. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 22 9月, 2007 1 次提交
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由 Dale Farnsworth 提交于
Commit 69331af7, "Fixes and cleanups for earlyprintk aka boot console", resulted in printk output prior to the initialization of the mpsc console driver not being printed. That commit causes the mpsc's CON_PRINTBUFFER flag to be cleared since udbg should have printed the previous output. I guess we can no longer ignore udbg. :) This patch provides udbg_putc() and udbg_getc() functions for the Marvell mv64x60 chips. These functions are enabled if an mv64x60 port is to be used as the console as determined from the device tree. Signed-off-by: NDale Farnsworth <dale@farnsworth.org> Acked-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 23 7月, 2007 1 次提交
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由 Roy Zang 提交于
Move arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h as the base to unify 83xx/85xx/86xx pci and pcie. Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option. The code still works for 86xx platforms. Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 21 7月, 2007 1 次提交
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由 Maxim Shchetynin 提交于
The Axon bridge chip used on new Cell/B.E. based blade servers comes with a DDR2 memory controller that can be used to attach cheap memory modules, as opposed to the high-speed XDR memory that is used by the CPU itself. Since the memory controller does not participate in the cache coherency protocol, we can not use the memory direcly for Linux applications, but by providing a block device it can be used for swap space, temporary file storage and through the use of the direct_access block device operation for mapping into user addresses, when it is mounted with an appropriate file system. Signed-off-by: NMaxim Shchetynin <maxim@de.ibm.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
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- 11 7月, 2007 1 次提交
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由 Wade Farnsworth 提交于
In order to use the RTC CMOS driver, each architecture must register a platform device for the RTC. This creates a function to register the platform device based on the RTC device node and verifies that the RTC port against the hard-coded value in asm/mc146818rtc.h. Signed-off-by: NWade Farnsworth <wfarnsworth@mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 29 6月, 2007 2 次提交
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由 Zhang Wei 提交于
Remove errata for PCI-e support of Rev 1.0 of MPC8641 since its considered obselete and is not production level silicon from Freescale. Signed-off-by: NZhang Wei <wei.zhang@freescale.com> Acked-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
There are times that we need to know which controller we are on to decide how to exclude devices properly. We now pass the pci_controller that we are going to use down to the pci_exclude_device function. This will greatly simplify being able to exclude the PHBs in multiple controller setups. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 25 6月, 2007 1 次提交
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由 Guennadi Liakhovetski 提交于
With both generic rtc and powerpc timer suspend / resume code now in the (powerpc.git) tree, powerpc platforms using the generic timer and enabling power management will have timer.o linked in the kernel, which they don't need. Moreover, it will likely WARN_ON(!ppc_md.get_rtc_time), save zero-time and return no error on suspend... As a possible solution we can choose not to build timer.o when RTC_CLASS is enabled. However, I can imagine systems with 2 rtc's, one served by the ppc-rtc, another one generic built as a module, in which case using the ppc-rtc for suspend / resume will be impossible. Not to say, that such a configuration would be ugly... Signed-off-by: NG. Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 12 5月, 2007 1 次提交
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由 Dale Farnsworth 提交于
This patch adds PCI bridge support for the Marvell mv64x60 chip. We also provide the ability to read/write the mv64x60 hotswap register via sysfs if the hs_reg_valid property is set in the device tree. Signed-off-by: NDale Farnsworth <dale@farnsworth.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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