1. 17 8月, 2022 4 次提交
    • J
      ice: track and warn when PHC update is late · cd25507a
      Jacob Keller 提交于
      The ice driver requires a cached copy of the PHC time in order to perform
      timestamp extension on Tx and Rx hardware timestamp values. This cached PHC
      time must always be updated at least once every 2 seconds. Otherwise, the
      math used to perform the extension would produce invalid results.
      
      The updates are supposed to occur periodically in the PTP kthread work
      item, which is scheduled to run every half second. Thus, we do not expect
      an update to be delayed for so long. However, there are error conditions
      which can cause the update to be delayed.
      
      Track this situation by using jiffies to determine approximately how long
      ago the last update occurred. Add a new statistic and a dev_warn when we
      have failed to update the cached PHC time. This makes the error case more
      obvious.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      cd25507a
    • J
      ice: track Tx timestamp stats similar to other Intel drivers · f020481b
      Jacob Keller 提交于
      Several Intel networking drivers which support PTP track when Tx timestamps
      are skipped or when they timeout without a timestamp from hardware. The
      conditions which could cause these events are rare, but it can be useful to
      know when and how often they occur.
      
      Implement similar statistics for the ice driver, tx_hwtstamp_skipped,
      tx_hwtstamp_timeouts, and tx_hwtstamp_flushed.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      f020481b
    • J
      ice: initialize cached_phctime when creating Rx rings · cf6b82fd
      Jacob Keller 提交于
      When we create new Rx rings, the cached_phctime field is zero initialized.
      This could result in incorrect timestamp reporting due to the cached value
      not yet being updated. Although a background task will periodically update
      the cached value, ensure it matches the existing cached value in the PF
      structure at ring initialization.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      cf6b82fd
    • J
      ice: set tx_tstamps when creating new Tx rings via ethtool · b3b17374
      Jacob Keller 提交于
      When the user changes the number of queues via ethtool, the driver
      allocates new rings. This allocation did not initialize tx_tstamps. This
      results in the tx_tstamps field being zero (due to kcalloc allocation), and
      would result in a NULL pointer dereference when attempting a transmit
      timestamp on the new ring.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      b3b17374
  2. 29 7月, 2022 1 次提交
    • M
      ice: Introduce enabling promiscuous mode on multiple VF's · d7393425
      Michal Wilczynski 提交于
      In current implementation default VSI switch filter is only able to
      forward traffic to a single VSI. This limits promiscuous mode with
      private flag 'vf-true-promisc-support' to a single VF. Enabling it on
      the second VF won't work. Also allmulticast support doesn't seem to be
      properly implemented when vf-true-promisc-support is true.
      
      Use standard ice_add_rule_internal() function that already implements
      forwarding to multiple VSI's instead of constructing AQ call manually.
      
      Add switch filter for allmulticast mode when vf-true-promisc-support is
      enabled. The same filter is added regardless of the flag - it doesn't
      matter for this case.
      
      Remove unnecessary fields in switch structure. From now on book keeping
      will be done by ice_add_rule_internal().
      
      Refactor unnecessarily passed function arguments.
      
      To test:
      1) Create 2 VM's, and two VF's. Attach VF's to VM's.
      2) Enable promiscuous mode on both of them and check if
         traffic is seen on both of them.
      Signed-off-by: NMichal Wilczynski <michal.wilczynski@intel.com>
      Tested-by: NMarek Szlosek <marek.szlosek@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      d7393425
  3. 27 7月, 2022 1 次提交
  4. 22 6月, 2022 2 次提交
    • A
      ice: ethtool: Prohibit improper channel config for DCB · a632b2a4
      Anatolii Gerasymenko 提交于
      Do not allow setting less channels, than Traffic Classes there are
      via ethtool. There must be at least one channel per Traffic Class.
      
      If you set less channels, than Traffic Classes there are, then during
      ice_vsi_rebuild there would be allocated only the requested amount
      of tx/rx rings in ice_vsi_alloc_arrays. But later in ice_vsi_setup_q_map
      there would be requested at least one channel per Traffic Class. This
      results in setting num_rxq > alloc_rxq and num_txq > alloc_txq.
      Later, there would be a NULL pointer dereference in
      ice_vsi_map_rings_to_vectors, because we go beyond of rx_rings or
      tx_rings arrays.
      
      Change ice_set_channels() to return error if you try to allocate less
      channels, than Traffic Classes there are.
      Change ice_vsi_setup_q_map() and ice_vsi_setup_q_map_mqprio() to return
      status code instead of void.
      Add error handling for ice_vsi_setup_q_map() and
      ice_vsi_setup_q_map_mqprio() in ice_vsi_init() and ice_vsi_cfg_tc().
      
      [53753.889983] INFO: Flow control is disabled for this traffic class (0) on this vsi.
      [53763.984862] BUG: unable to handle kernel NULL pointer dereference at 0000000000000028
      [53763.992915] PGD 14b45f5067 P4D 0
      [53763.996444] Oops: 0002 [#1] SMP NOPTI
      [53764.000312] CPU: 12 PID: 30661 Comm: ethtool Kdump: loaded Tainted: GOE    --------- -  - 4.18.0-240.el8.x86_64 #1
      [53764.011825] Hardware name: Intel Corporation WilsonCity/WilsonCity, BIOS WLYDCRB1.SYS.0020.P21.2012150710 12/15/2020
      [53764.022584] RIP: 0010:ice_vsi_map_rings_to_vectors+0x7e/0x120 [ice]
      [53764.029089] Code: 41 0d 0f b7 b7 12 05 00 00 0f b6 d0 44 29 de 44 0f b7 c6 44 01 c2 41 39 d0 7d 2d 4c 8b 47 28 44 0f b7 ce 83 c6 01 4f 8b 04 c8 <49> 89 48 28 4                           c 8b 89 b8 01 00 00 4d 89 08 4c 89 81 b8 01 00 00 44
      [53764.048379] RSP: 0018:ff550dd88ea47b20 EFLAGS: 00010206
      [53764.053884] RAX: 0000000000000002 RBX: 0000000000000004 RCX: ff385ea42fa4a018
      [53764.061301] RDX: 0000000000000006 RSI: 0000000000000005 RDI: ff385e9baeedd018
      [53764.068717] RBP: 0000000000000010 R08: 0000000000000000 R09: 0000000000000004
      [53764.076133] R10: 0000000000000002 R11: 0000000000000004 R12: 0000000000000000
      [53764.083553] R13: 0000000000000000 R14: ff385e658fdd9000 R15: ff385e9baeedd018
      [53764.090976] FS:  000014872c5b5740(0000) GS:ff385e847f100000(0000) knlGS:0000000000000000
      [53764.099362] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [53764.105409] CR2: 0000000000000028 CR3: 0000000a820fa002 CR4: 0000000000761ee0
      [53764.112851] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      [53764.120301] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
      [53764.127747] PKRU: 55555554
      [53764.130781] Call Trace:
      [53764.133564]  ice_vsi_rebuild+0x611/0x870 [ice]
      [53764.138341]  ice_vsi_recfg_qs+0x94/0x100 [ice]
      [53764.143116]  ice_set_channels+0x1a8/0x3e0 [ice]
      [53764.147975]  ethtool_set_channels+0x14e/0x240
      [53764.152667]  dev_ethtool+0xd74/0x2a10
      [53764.156665]  ? __mod_lruvec_state+0x44/0x110
      [53764.161280]  ? __mod_lruvec_state+0x44/0x110
      [53764.165893]  ? page_add_file_rmap+0x15/0x170
      [53764.170518]  ? inet_ioctl+0xd1/0x220
      [53764.174445]  ? netdev_run_todo+0x5e/0x290
      [53764.178808]  dev_ioctl+0xb5/0x550
      [53764.182485]  sock_do_ioctl+0xa0/0x140
      [53764.186512]  sock_ioctl+0x1a8/0x300
      [53764.190367]  ? selinux_file_ioctl+0x161/0x200
      [53764.195090]  do_vfs_ioctl+0xa4/0x640
      [53764.199035]  ksys_ioctl+0x60/0x90
      [53764.202722]  __x64_sys_ioctl+0x16/0x20
      [53764.206845]  do_syscall_64+0x5b/0x1a0
      [53764.210887]  entry_SYSCALL_64_after_hwframe+0x65/0xca
      
      Fixes: 87324e74 ("ice: Implement ethtool ops for channels")
      Signed-off-by: NAnatolii Gerasymenko <anatolii.gerasymenko@intel.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      a632b2a4
    • A
      ice: ethtool: advertise 1000M speeds properly · c3d184c8
      Anatolii Gerasymenko 提交于
      In current implementation ice_update_phy_type enables all link modes
      for selected speed. This approach doesn't work for 1000M speeds,
      because both copper (1000baseT) and optical (1000baseX) standards
      cannot be enabled at once.
      
      Fix this, by adding the function `ice_set_phy_type_from_speed()`
      for 1000M speeds.
      
      Fixes: 48cb27f2 ("ice: Implement handlers for ethtool PHY/link operations")
      Signed-off-by: NAnatolii Gerasymenko <anatolii.gerasymenko@intel.com>
      Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      c3d184c8
  5. 14 5月, 2022 1 次提交
  6. 07 5月, 2022 1 次提交
  7. 09 3月, 2022 1 次提交
  8. 04 3月, 2022 4 次提交
    • J
      ice: convert VF storage to hash table with krefs and RCU · 3d5985a1
      Jacob Keller 提交于
      The ice driver stores VF structures in a simple array which is allocated
      once at the time of VF creation. The VF structures are then accessed
      from the array by their VF ID. The ID must be between 0 and the number
      of allocated VFs.
      
      Multiple threads can access this table:
      
       * .ndo operations such as .ndo_get_vf_cfg or .ndo_set_vf_trust
       * interrupts, such as due to messages from the VF using the virtchnl
         communication
       * processing such as device reset
       * commands to add or remove VFs
      
      The current implementation does not keep track of when all threads are
      done operating on a VF and can potentially result in use-after-free
      issues caused by one thread accessing a VF structure after it has been
      released when removing VFs. Some of these are prevented with various
      state flags and checks.
      
      In addition, this structure is quite static and does not support a
      planned future where virtualization can be more dynamic. As we begin to
      look at supporting Scalable IOV with the ice driver (as opposed to just
      supporting Single Root IOV), this structure is not sufficient.
      
      In the future, VFs will be able to be added and removed individually and
      dynamically.
      
      To allow for this, and to better protect against a whole class of
      use-after-free bugs, replace the VF storage with a combination of a hash
      table and krefs to reference track all of the accesses to VFs through
      the hash table.
      
      A hash table still allows efficient look up of the VF given its ID, but
      also allows adding and removing VFs. It does not require contiguous VF
      IDs.
      
      The use of krefs allows the cleanup of the VF memory to be delayed until
      after all threads have released their reference (by calling ice_put_vf).
      
      To prevent corruption of the hash table, a combination of RCU and the
      mutex table_lock are used. Addition and removal from the hash table use
      the RCU-aware hash macros. This allows simple read-only look ups that
      iterate to locate a single VF can be fast using RCU. Accesses which
      modify the hash table, or which can't take RCU because they sleep, will
      hold the mutex lock.
      
      By using this design, we have a stronger guarantee that the VF structure
      can't be released until after all threads are finished operating on it.
      We also pave the way for the more dynamic Scalable IOV implementation in
      the future.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NKonrad Jankowski <konrad0.jankowski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      3d5985a1
    • J
      ice: introduce VF accessor functions · fb916db1
      Jacob Keller 提交于
      Before we switch the VF data structure storage mechanism to a hash,
      introduce new accessor functions to define the new interface.
      
      * ice_get_vf_by_id is a function used to obtain a reference to a VF from
        the table based on its VF ID
      * ice_has_vfs is used to quickly check if any VFs are configured
      * ice_get_num_vfs is used to get an exact count of how many VFs are
        configured
      
      We can drop the old ice_validate_vf_id function, since every caller was
      just going to immediately access the VF table to get a reference
      anyways. This way we simply use the single ice_get_vf_by_id to both
      validate the VF ID is within range and that there exists a VF with that
      ID.
      
      This change enables us to more easily convert the codebase to the hash
      table since most callers now properly use the interface.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NKonrad Jankowski <konrad0.jankowski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      fb916db1
    • J
      ice: factor VF variables to separate structure · 000773c0
      Jacob Keller 提交于
      We maintain a number of values for VFs within the ice_pf structure. This
      includes the VF table, the number of allocated VFs, the maximum number
      of supported SR-IOV VFs, the number of queue pairs per VF, the number of
      MSI-X vectors per VF, and a bitmap of the VFs with detected MDD events.
      
      We're about to add a few more variables to this list. Clean this up
      first by extracting these members out into a new ice_vfs structure
      defined in ice_virtchnl_pf.h
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NKonrad Jankowski <konrad0.jankowski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      000773c0
    • J
      ice: convert ice_for_each_vf to include VF entry iterator · c4c2c7db
      Jacob Keller 提交于
      The ice_for_each_vf macro is intended to be used to loop over all VFs.
      The current implementation relies on an iterator that is the index into
      the VF array in the PF structure. This forces all users to perform a
      look up themselves.
      
      This abstraction forces a lot of duplicate work on callers and leaks the
      interface implementation to the caller. Replace this with an
      implementation that includes the VF pointer the primary iterator. This
      version simplifies callers which just want to iterate over every VF, as
      they no longer need to perform their own lookup.
      
      The "i" iterator value is replaced with a new unsigned int "bkt"
      parameter, as this will match the necessary interface for replacing
      the VF array with a hash table. For now, the bkt is the VF ID, but in
      the future it will simply be the hash bucket index. Document that it
      should not be treated as a VF ID.
      
      This change aims to simplify switching from the array to a hash table. I
      considered alternative implementations such as an xarray but decided
      that the hash table was the simplest and most suitable implementation. I
      also looked at methods to hide the bkt iterator entirely, but I couldn't
      come up with a feasible solution that worked for hash table iterators.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NKonrad Jankowski <konrad0.jankowski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      c4c2c7db
  9. 10 2月, 2022 1 次提交
    • B
      ice: Add ability for PF admin to enable VF VLAN pruning · f1da5a08
      Brett Creeley 提交于
      VFs by default are able to see all tagged traffic regardless of trust
      and VLAN filters. Based on legacy devices (i.e. ixgbe, i40e), customers
      expect VFs to receive all VLAN tagged traffic with a matching
      destination MAC.
      
      Add an ethtool private flag 'vf-vlan-pruning' and set the default to
      off so VFs will receive all VLAN traffic directed towards them. When
      the flag is turned on, VF will only be able to receive untagged
      traffic or traffic with VLAN tags it has created interfaces for.
      
      Also, the flag cannot be changed while any VFs are allocated. This was
      done to simplify the implementation. So, if this flag is needed, then
      the PF admin must enable it. If the user tries to enable the flag while
      VFs are active, then print an unsupported message with the
      vf-vlan-pruning flag included. In case multiple flags were specified, this
      makes it clear to the user which flag failed.
      Signed-off-by: NBrett Creeley <brett.creeley@intel.com>
      Tested-by: NGurucharan G <gurucharanx.g@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      f1da5a08
  10. 28 1月, 2022 1 次提交
  11. 16 12月, 2021 1 次提交
  12. 15 12月, 2021 5 次提交
  13. 22 11月, 2021 1 次提交
  14. 30 10月, 2021 1 次提交
    • M
      ice: Hide bus-info in ethtool for PRs in switchdev mode · bfaaba99
      Marcin Szycik 提交于
      Disable showing bus-info information for port representors in switchdev
      mode. This fixes a bug that caused displaying wrong netdev descriptions in
      lshw tool - one port representor displayed PF branding string, and in turn
      one PF displayed a "generic" description. The bug occurs when many devices
      show the same bus-info in ethtool, which was the case in switchdev mode (PF
      and its port representors displayed the same bus-info). The bug occurs only
      if a port representor netdev appears before PF netdev in /proc/net/dev.
      
      In the examples below:
      ens6fX is PF
      ens6fXvY is VF
      ethX is port representor
      One irrelevant column was removed from output
      
      Before:
      $ sudo lshw -c net -businfo
      Bus info          Device      Description
      =========================================
      pci@0000:02:00.0  eth102       Ethernet Controller E810-XXV for SFP
      pci@0000:02:00.1  ens6f1       Ethernet Controller E810-XXV for SFP
      pci@0000:02:01.0  ens6f0v0     Ethernet Adaptive Virtual Function
      pci@0000:02:01.1  ens6f0v1     Ethernet Adaptive Virtual Function
      pci@0000:02:01.2  ens6f0v2     Ethernet Adaptive Virtual Function
      pci@0000:02:00.0  ens6f0       Ethernet interface
      
      Notice that eth102 and ens6f0 have the same bus-info and their descriptions
      are swapped.
      
      After:
      $ sudo lshw -c net -businfo
      Bus info          Device      Description
      =========================================
      pci@0000:02:00.0  ens6f0      Ethernet Controller E810-XXV for SFP
      pci@0000:02:00.1  ens6f1      Ethernet Controller E810-XXV for SFP
      pci@0000:02:01.0  ens6f0v0    Ethernet Adaptive Virtual Function
      pci@0000:02:01.1  ens6f0v1    Ethernet Adaptive Virtual Function
      pci@0000:02:01.2  ens6f0v2    Ethernet Adaptive Virtual Function
      
      Fixes: 7aae80ce ("ice: add port representor ethtool ops and stats")
      Signed-off-by: NMarcin Szycik <marcin.szycik@linux.intel.com>
      Tested-by: NSandeep Penigalapati <sandeep.penigalapati@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      bfaaba99
  15. 21 10月, 2021 1 次提交
    • K
      ice: enable ndo_setup_tc support for mqprio_qdisc · fbc7b27a
      Kiran Patil 提交于
      Add support in driver for TC_QDISC_SETUP_MQPRIO. This support
      enables instantiation of channels in HW using existing MQPRIO
      infrastructure which is extended to be offloadable. This
      provides a mechanism to configure dedicated set of queues for
      each TC.
      
      Configuring channels using "tc mqprio":
      --------------------------------------
      tc qdisc add dev <ethX> root mqprio num_tc 3 map 0 1 2 \
      	queues 4@0 4@4 4@8  hw 1 mode channel
      
      Above command configures 3 TCs having 4 queues each. "hw 1 mode channel"
      implies offload of channel configuration to HW. When driver processes
      configuration received via "ndo_setup_tc: QDISC_SETUP_MQPRIO", each
      TC maps to HW VSI with specified queues.
      
      User can optionally specify bandwidth min and max rate limit per TC
      (see example below). If shaper params like min and/or max bandwidth
      rate limit are specified, driver configures VSI specific rate limiter
      in HW.
      
      Configuring channels and bandwidth shaper parameters using "tc mqprio":
      ----------------------------------------------------------------
      tc qdisc add dev <ethX> root mqprio \
      	num_tc 4 map 0 1 2 3 queues 4@0 4@4 4@8 4@12 hw 1 mode channel \
      	shaper bw_rlimit min_rate 1Gbit 2Gbit 3Gbit 4Gbit \
      	max_rate 4Gbit 5Gbit 6Gbit 7Gbit
      
      Command to view configured TCs:
      -----------------------------
      tc qdisc show dev <ethX>
      
      Deleting TCs:
      ------------
      tc qdisc del dev <ethX> root mqprio
      Signed-off-by: NKiran Patil <kiran.patil@intel.com>
      Signed-off-by: NAmritha Nambiar <amritha.nambiar@intel.com>
      Signed-off-by: NSudheer Mogilappagari <sudheer.mogilappagari@intel.com>
      Tested-by: NBharathi Sreenivas <bharathi.sreenivas@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      fbc7b27a
  16. 20 10月, 2021 2 次提交
  17. 15 10月, 2021 3 次提交
  18. 08 10月, 2021 1 次提交
  19. 29 9月, 2021 1 次提交
  20. 24 8月, 2021 1 次提交
  21. 11 6月, 2021 3 次提交
    • J
      ice: enable transmit timestamps for E810 devices · ea9b847c
      Jacob Keller 提交于
      Add support for enabling Tx timestamp requests for outgoing packets on
      E810 devices.
      
      The ice hardware can support multiple outstanding Tx timestamp requests.
      When sending a descriptor to hardware, a Tx timestamp request is made by
      setting a request bit, and assigning an index that represents which Tx
      timestamp index to store the timestamp in.
      
      Hardware makes no effort to synchronize the index use, so it is up to
      software to ensure that Tx timestamp indexes are not re-used before the
      timestamp is reported back.
      
      To do this, introduce a Tx timestamp tracker which will keep track of
      currently in-use indexes.
      
      In the hot path, if a packet has a timestamp request, an index will be
      requested from the tracker. Unfortunately, this does require a lock as
      the indexes are shared across all queues on a PHY. There are not enough
      indexes to reliably assign only 1 to each queue.
      
      For the E810 devices, the timestamp indexes are not shared across PHYs,
      so each port can have its own tracking.
      
      Once hardware captures a timestamp, an interrupt is fired. In this
      interrupt, trigger a new work item that will figure out which timestamp
      was completed, and report the timestamp back to the stack.
      
      This function loops through the Tx timestamp indexes and checks whether
      there is now a valid timestamp. If so, it clears the PHY timestamp
      indication in the PHY memory, locks and removes the SKB and bit in the
      tracker, then reports the timestamp to the stack.
      
      It is possible in some cases that a timestamp request will be initiated
      but never completed. This might occur if the packet is dropped by
      software or hardware before it reaches the PHY.
      
      Add a task to the periodic work function that will check whether
      a timestamp request is more than a few seconds old. If so, the timestamp
      index is cleared in the PHY, and the SKB is released.
      
      Just as with Rx timestamps, the Tx timestamps are only 40 bits wide, and
      use the same overall logic for extending to 64 bits of nanoseconds.
      
      With this change, E810 devices should be able to perform basic PTP
      functionality.
      
      Future changes will extend the support to cover the E822-based devices.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      ea9b847c
    • J
      ice: enable receive hardware timestamping · 77a78115
      Jacob Keller 提交于
      Add SIOCGHWTSTAMP and SIOCSHWTSTAMP ioctl handlers to respond to
      requests to enable timestamping support. If the request is for enabling
      Rx timestamps, set a bit in the Rx descriptors to indicate that receive
      timestamps should be reported.
      
      Hardware captures receive timestamps in the PHY which only captures part
      of the timer, and reports only 40 bits into the Rx descriptor. The upper
      32 bits represent the contents of GLTSYN_TIME_L at the point of packet
      reception, while the lower 8 bits represent the upper 8 bits of
      GLTSYN_TIME_0.
      
      The networking and PTP stack expect 64 bit timestamps in nanoseconds. To
      support this, implement some logic to extend the timestamps by using the
      full PHC time.
      
      If the Rx timestamp was captured prior to the PHC time, then the real
      timestamp is
      
        PHC - (lower_32_bits(PHC) - timestamp)
      
      If the Rx timestamp was captured after the PHC time, then the real
      timestamp is
      
        PHC + (timestamp - lower_32_bits(PHC))
      
      These calculations are correct as long as neither the PHC timestamp nor
      the Rx timestamps are more than 2^32-1 nanseconds old. Further, we can
      detect when the Rx timestamp is before or after the PHC as long as the
      PHC timestamp is no more than 2^31-1 nanoseconds old.
      
      In that case, we calculate the delta between the lower 32 bits of the
      PHC and the Rx timestamp. If it's larger than 2^31-1 then the Rx
      timestamp must have been captured in the past. If it's smaller, then the
      Rx timestamp must have been captured after PHC time.
      
      Add an ice_ptp_extend_32b_ts function that relies on a cached copy of
      the PHC time and implements this algorithm to calculate the proper upper
      32bits of the Rx timestamps.
      
      Cache the PHC time periodically in all of the Rx rings. This enables
      each Rx ring to simply call the extension function with a recent copy of
      the PHC time. By ensuring that the PHC time is kept up to date
      periodically, we ensure this algorithm doesn't use stale data and
      produce incorrect results.
      
      To cache the time, introduce a kworker and a kwork item to periodically
      store the Rx time. It might seem like we should use the .do_aux_work
      interface of the PTP clock. This doesn't work because all PFs must cache
      this time, but only one PF owns the PTP clock device.
      
      Thus, the ice driver will manage its own kthread instead of relying on
      the PTP do_aux_work handler.
      
      With this change, the driver can now report Rx timestamps on all
      incoming packets.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      77a78115
    • J
      ice: report the PTP clock index in ethtool .get_ts_info · 67569a7f
      Jacob Keller 提交于
      Now that the driver registers a PTP clock device that represents the
      clock hardware, it is important that the clock index is reported via the
      ethtool .get_ts_info callback.
      
      The underlying hardware resource is shared between multiple PF
      functions. Only one function owns the hardware resources associated with
      a timer, but multiple functions may be associated with it for the
      purposes of timestamping.
      
      To support this, the owning PF will store the clock index into the
      driver shared parameters buffer in firmware. Other PFs will look up the
      clock index by reading the driver shared parameter on demand when
      requested via the .get_ts_info ethtool function.
      
      In this way, all functions which are tied to the same timer are able to
      report the clock index. Userspace software such as ptp4l performs
      a look up on the netdev to determine the associated clock, and all
      commands to control or configure the clock will be handled through the
      controlling PF.
      Signed-off-by: NJacob Keller <jacob.e.keller@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      67569a7f
  22. 07 6月, 2021 1 次提交
  23. 04 6月, 2021 1 次提交
    • P
      ice: report supported and advertised autoneg using PHY capabilities · 5cd349c3
      Paul Greenwalt 提交于
      Ethtool incorrectly reported supported and advertised auto-negotiation
      settings for a backplane PHY image which did not support auto-negotiation.
      This can occur when using media or PHY type for reporting ethtool
      supported and advertised auto-negotiation settings.
      
      Remove setting supported and advertised auto-negotiation settings based
      on PHY type in ice_phy_type_to_ethtool(), and MAC type in
      ice_get_link_ksettings().
      
      Ethtool supported and advertised auto-negotiation settings should be
      based on the PHY image using the AQ command get PHY capabilities with
      media. Add setting supported and advertised auto-negotiation settings
      based get PHY capabilities with media in ice_get_link_ksettings().
      
      Fixes: 48cb27f2 ("ice: Implement handlers for ethtool PHY/link operations")
      Signed-off-by: NPaul Greenwalt <paul.greenwalt@intel.com>
      Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
      Signed-off-by: NTony Nguyen <anthony.l.nguyen@intel.com>
      5cd349c3
  24. 15 4月, 2021 1 次提交