- 01 5月, 2020 5 次提交
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由 Andy Shevchenko 提交于
There is no competition to get more LOCs into the kernel, and driver can look better and have improved readability without those additional line breaks. While at it, shorten info structures that they are all PCI, at the end it's a PCI driver for Intel hardware. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
There are useless conditions like func() { ... int ret; ... ret = foo(); if (ret) return ret; return 0; } which may be replaced with direct return statement, what we have done here. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
pci_enable_msi() is deprecated API, thus, switch to modern pci_alloc_irq_vectors(). Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
Copy'n'paste without thinking is not a good idea and in this case it brought unnecessary loop over PCI BAR resources which was needed to workaround one of STMicro RVP boards. Remove unnecessary loops from Intel driver. Fixes: 58da0cfa ("net: stmmac: create dwmac-intel.c to contain all Intel platform") Cc: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
clk_prepare_enable() might fail, we have to check its returned value. Besides that we have to call clk_disable_unprepare() on the error and remove paths. Do above in the dwmac-intel driver. While at it, remove leftover in stmmac_pci and remove unneeded condition for NULL-aware clk_unregister_fixed_rate() call. Fixes: 58da0cfa ("net: stmmac: create dwmac-intel.c to contain all Intel platform") Cc: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 4月, 2020 1 次提交
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由 Voon Weifeng 提交于
This patch is to enable Intel SERDES power up/down sequence. The SERDES converts 8/10 bits data to SGMII signal. Below is an example of HW configuration for SGMII mode. The SERDES is located in the PHY IF in the diagram below. <-----------------GBE Controller---------->|<--External PHY chip--> +----------+ +----+ +---+ +----------+ | EQoS | <-GMII->| DW | < ------ > |PHY| <-SGMII-> | External | | MAC | |xPCS| |IF | | PHY | +----------+ +----+ +---+ +----------+ ^ ^ ^ ^ | | | | +---------------------MDIO-------------------------+ PHY IF configuration and status registers are accessible through mdio address 0x15 which is defined as mdio_adhoc_addr. During D0, The driver will need to power up PHY IF by changing the power state to P0. Likewise, for D3, the driver sets PHY IF power state to P3. Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 3月, 2020 3 次提交
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由 Voon Weifeng 提交于
Add EHL SGMII 2.5Gbps PCI info and PCI ID Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Voon Weifeng 提交于
Add EHL PSE0/1 RGMII & SGMII 1Gbps PCI info and PCI ID Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Voon Weifeng 提交于
As stmmac_pci.c file is getting bigger and more complex, it is reasonable to separate all the Intel specific dwmac pci device to a different file. This move includes Intel Quark, TGL and EHL. A new kernel config CONFIG_DWMAC_INTEL is introduced and depends on X86. For this initial patch, all the necessary function such as probe() and exit() are identical besides the function name. Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 2月, 2020 1 次提交
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由 Andy Shevchenko 提交于
Since PCI core provides a generic PCI_DEVICE_DATA() macro, replace STMMAC_DEVICE() with former one. No functional change intended. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 2月, 2020 1 次提交
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由 Voon Weifeng 提交于
The recent patch to support passive mode converter did not take care the phy interface configuration in PCI platform data. Hence, converting all the PCI platform data from plat->interface to plat->phy_interface as the default mode is meant for PHY. Fixes: 0060c878 ("net: stmmac: implement support for passive mode converters via dt") Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Tested-by: NTan, Tee Min <tee.min.tan@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 1月, 2020 1 次提交
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由 Jose Abreu 提交于
Enable TBS support on GMAC5 PCI entry for all Queues except Queue 0. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
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- 10 1月, 2020 1 次提交
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由 Dejin Zheng 提交于
All members of mdio_bus_data are cleared to 0 when it was obtained by devm_kzalloc(). so It doesn't need to set phy_mask as 0 again. Signed-off-by: NDejin Zheng <zhengdejin5@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 10月, 2019 1 次提交
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由 Denis Efremov 提交于
Code that iterates over all standard PCI BARs typically uses PCI_STD_RESOURCE_END. However, that requires the unusual test "i <= PCI_STD_RESOURCE_END" rather than something the typical "i < PCI_STD_NUM_BARS". Add a definition for PCI_STD_NUM_BARS and change loops to use the more idiomatic C style to help avoid fencepost errors. Link: https://lore.kernel.org/r/20190927234026.23342-1-efremov@linux.com Link: https://lore.kernel.org/r/20190927234308.23935-1-efremov@linux.com Link: https://lore.kernel.org/r/20190916204158.6889-3-efremov@linux.comSigned-off-by: NDenis Efremov <efremov@linux.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: Sebastian Ott <sebott@linux.ibm.com> # arch/s390/ Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> # video/fbdev/ Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> # pci/controller/dwc/ Acked-by: Jack Wang <jinpu.wang@cloud.ionos.com> # scsi/pm8001/ Acked-by: Martin K. Petersen <martin.petersen@oracle.com> # scsi/pm8001/ Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # memstick/
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- 12 9月, 2019 1 次提交
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由 Jose Abreu 提交于
Add the support for Synopsys HAPS board that uses GMAC5. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 8月, 2019 4 次提交
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由 Voon Weifeng 提交于
EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, ptp clock and ptp_max_adj to 200MHz. Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Voon Weifeng 提交于
Added EHL RGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Voon Weifeng 提交于
Added TGL SGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Voon Weifeng 提交于
Added EHL SGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by: NVoon Weifeng <weifeng.voon@intel.com> Signed-off-by: NOng Boon Leong <boon.leong.ong@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 7月, 2019 1 次提交
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由 Thierry Reding 提交于
The Tegra EQOS driver already resets the MDIO bus at probe time via the reset GPIO specified in the phy-reset-gpios device tree property. There is no need to reset the bus again later on. This avoids the need to query the device tree for the snps,reset GPIO, which is not part of the Tegra EQOS device tree bindings. This quiesces an error message from the generic bus reset code if it doesn't find the snps,reset related delays. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 6月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details the full gnu general public license is included in this distribution in the file called copying this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope [that] it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details the full gnu general public license is included in this distribution in the file called copying extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 57 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAlexios Zavras <alexios.zavras@intel.com> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.515993066@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 01 5月, 2019 1 次提交
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由 Jan Kiszka 提交于
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 4月, 2019 1 次提交
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由 Heiner Kallweit 提交于
Use new helper pci_dev_id() to simplify the code. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 19 4月, 2019 1 次提交
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由 Su Bao Cheng 提交于
Since there are more IOT2040 variants with identical hardware but different asset tags, the asset tag matching should be adjusted to support them. For the board name "SIMATIC IOT2000", currently there are 2 types of hardware, IOT2020 and IOT2040. The IOT2020 is identified by its unique asset tag. Match on it first. If we then match on the board name only, we will catch all IOT2040 variants. In the future there will be no other devices with the "SIMATIC IOT2000" DMI board name but different hardware. Signed-off-by: NSu Bao Cheng <baocheng.su@siemens.com> Reviewed-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 1月, 2019 1 次提交
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由 Jose Abreu 提交于
Since commit b7d0f08e, the enable / disable of PCI device is not managed which will result in IO regions not being automatically unmapped. As regions continue mapped it is currently not possible to remove and then probe again the PCI module of stmmac. Fix this by manually unmapping regions on remove callback. Changes from v1: - Fix build error Cc: Joao Pinto <jpinto@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Fixes: b7d0f08e ("net: stmmac: Fix WoL for PCI-based setups") Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 8月, 2018 1 次提交
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由 Arnd Bergmann 提交于
The newly added suspend/resume functions cause a build warning when CONFIG_PM is disabled: drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:324:12: error: 'stmmac_pci_resume' defined but not used [-Werror=unused-function] drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c:306:12: error: 'stmmac_pci_suspend' defined but not used [-Werror=unused-function] Mark them as __maybe_unused so gcc can drop them silently. Fixes: b7d0f08e ("net: stmmac: Fix WoL for PCI-based setups") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 8月, 2018 1 次提交
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由 Jose Abreu 提交于
WoL won't work in PCI-based setups because we are not saving the PCI EP state before entering suspend state and not allowing D3 wake. Fix this by using a wrapper around stmmac_{suspend/resume} which correctly sets the PCI EP state. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Joao Pinto <jpinto@synopsys.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 6月, 2017 5 次提交
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由 Jan Kiszka 提交于
Avoids reimplementation of DMI matching in stmmac_pci_find_phy_addr. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jan Kiszka 提交于
No need to carry this reference in stmmac_pci_info - the Quark-specific setup handler knows that it needs to use the Quark-specific DMI table. This also allows to drop the stmmac_pci_info reference from the setup handler parameter list. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jan Kiszka 提交于
Move the special case for the early Galileo firmware into quark_default_setup. This allows to use stmmac_pci_find_phy_addr for non-quark cases. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jan Kiszka 提交于
Make stmmac_default_data compatible with stmmac_pci_info.setup and use an info structure for all devices. This allows to make the probing more regular. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jan Kiszka 提交于
By removing the PCI device reference from the structure and passing it as parameters to the interested functions, we can make quark_pci_info const. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 5月, 2017 4 次提交
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由 Andy Shevchenko 提交于
New helper is added in order to prevent misconfiguration happened for one of the platforms when configuration data is expanded. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
The commit abe80fdc ("net: stmmac: RX queue routing configuration") missed Intel Quark configuration. Append it here. Fixes: abe80fdc ("net: stmmac: RX queue routing configuration") Cc: Joao Pinto <Joao.Pinto@synopsys.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
The commit a8f5102a ("net: stmmac: TX and RX queue priority configuration") missed Intel Quark configuration. Append it here. Fixes: a8f5102a ("net: stmmac: TX and RX queue priority configuration") Cc: Joao Pinto <Joao.Pinto@synopsys.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andy Shevchenko 提交于
The commit 26d6851f ("net: stmmac: set default number of rx and tx queues in stmmac_pci") missed Intel Quark configuration. Append it here. Fixes: 26d6851f ("net: stmmac: set default number of rx and tx queues in stmmac_pci") Cc: Joao Pinto <Joao.Pinto@synopsys.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NJoao Pinto <jpinto@synopsys.com> Acked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 5月, 2017 1 次提交
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由 Jan Kiszka 提交于
The IOT2000 is industrial controller platform, derived from the Intel Galileo Gen2 board. The variant IOT2020 comes with one LAN port, the IOT2040 has two of them. They can be told apart based on the board asset tag in the DMI table. Based on patch by Sascha Weisenberger. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NSascha Weisenberger <sascha.weisenberger@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 3月, 2017 2 次提交
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由 Joao Pinto 提交于
This patch adds the configuration of RX queues' routing. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Joao Pinto 提交于
This patch adds the configuration of RX and TX queues' priority. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 3月, 2017 1 次提交
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由 Joao Pinto 提交于
This patch configures default number of RX and TX queues when using the pci glue driver. Signed-off-by: NJoao Pinto <jpinto@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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