- 10 2月, 2021 1 次提交
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由 Weili Qian 提交于
Enable PASID by setting 'sqc' and 'cqc' pasid bits per queue in Kunpeng 930. For Kunpeng 920, PASID is effective for all queues once set in SVA scenarios. Signed-off-by: NWeili Qian <qianweili@huawei.com> Signed-off-by: NHui Tang <tanghui20@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 14 1月, 2021 1 次提交
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由 Kai Ye 提交于
Add 'uacce_mode' parameter for ZIP, which can be set as 0(default) or 1. '0' means ZIP is only registered to kernel crypto, and '1' means it's registered to both kernel crypto and UACCE. Signed-off-by: NKai Ye <yekai13@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 20 11月, 2020 1 次提交
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由 Yang Shen 提交于
The patch 'irqchip/gic-v3-its: Balance initial LPI affinity across CPUs' set the IRQ to an uncentain CPU. If an IRQ is bound to the CPU used by the thread which is sending request, the throughput will be just half. So allocate a 'work_queue' and set as 'WQ_UNBOUND' to do the back half work on some different CPUS. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 06 11月, 2020 1 次提交
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由 Weili Qian 提交于
Since 'qm_create_debugfs_file' always returns 0, change it as 'void'. Signed-off-by: NWeili Qian <qianweili@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 02 10月, 2020 4 次提交
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由 Sihang Chen 提交于
The 'qm->curr_qm_qp_num' is not initialized, which will result in failure to write the current_q file. Signed-off-by: NSihang Chen <chensihang1@hisilicon.com> Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
As before, when the ZIP device is too busy to creat a request, it will return '-EBUSY'. But the crypto process think the '-EBUSY' means a successful request and wait for its completion. So replace '-EBUSY' with '-EAGAIN' to show crypto this request is failed. Fixes: 62c455ca("crypto: hisilicon - add HiSilicon ZIP...") Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Zhou Wang 提交于
The zero length input will cause a call trace when use GZIP decompress like this: Unable to handle kernel paging request at virtual address ... lr : get_gzip_head_size+0x7c/0xd0 [hisi_zip] Judge the input length and return '-EINVAL' when input is invalid. Fixes: 62c455ca("crypto: hisilicon - add HiSilicon ZIP...") Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NYang Shen <shenyang39@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Hao Fang 提交于
ZIP debug registers aren't cleared even if its driver is removed, so add a clearing operation when remove driver. Signed-off-by: NHao Fang <fanghao11@huawei.com> Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 25 9月, 2020 1 次提交
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由 Yang Shen 提交于
The parameter type of 'pci_set_drvdata' is 'struct hisi_qm', so here the return type of 'pci_get_drvdata' should be 'struct hisi_qm' too. Signed-off-by: NYang Shen <shenyang39@huawei.com> Signed-off-by: NWeili Qian <qianweili@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 18 9月, 2020 11 次提交
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由 Longfang Liu 提交于
In order to pass kernel CRYPTO test, ZIP module parameter 'pf_q_num' needs to be set as greater than 1. Signed-off-by: NLongfang Liu <liulongfang@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
1.Unified alignment styles 2.Remove unnecessary goto branch 3.Remove address printf Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Supplement some comments. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Some macros which are defined in 'zip.h' are related to the struct 'hisi_zip_sqe' and are only used in 'zip_crypto.c'. So move them from 'zip.h' to 'zip_crypto.c'. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Fix some code for PClint warning: Warning - Suspicious Cast Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Add print for some error branches. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Macros 'QPC_COMP', 'QPC_DECOMP' and 'HZIP_CTX_Q_NUM' are relative and incremental. So, use an enum instead. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Replace 'sprintf' with 'scnprintf' to avoid overrun. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
Update debugfs interface parameters Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
1.Add prefix 'HZIP' for some macros 2.Add prefix 'hisi_zip' for some functions Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
1.Remove the macro 'HZIP_VF_NUM'. 2.Remove 'list' of the struct 'hisi_zip' Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 8月, 2020 4 次提交
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由 Yang Shen 提交于
When the devices are removed or not existing, the corresponding algorithms which are registered by 'hisi-zip' driver can't be used. Move 'hisi_zip_register_to_crypto' from 'hisi_zip_init' to 'hisi_zip_probe'. The algorithms will be registered to crypto only when there is device bind on the driver. And when the devices are removed, the algorithms will be unregistered. In the previous process, the function 'xxx_register_to_crypto' need a lock and a static variable to judge if the registration is the first time. Move this action into the function 'hisi_qm_alg_register'. Each device will call 'hisi_qm_alg_register' to add itself to qm list in probe process and registering algs when the qm list is empty. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Weili Qian 提交于
Call trace will appear in the Hisilicon crypto driver unbinding or disabling SRIOV during task running with TFMs on the corresponding function. The log looks like this: [ 293.908078] Call trace: [ 293.908080] __queue_work+0x494/0x548 [ 293.908081] queue_work_on+0x84/0xd8 [ 293.908092] qm_irq+0x4c/0xd0 [hisi_qm] [ 293.908096] __handle_irq_event_percpu+0x74/0x2a0 [ 293.908098] handle_irq_event_percpu+0x40/0x98 [ 293.908099] handle_irq_event+0x4c/0x80 [ 293.908101] handle_fasteoi_irq+0xb0/0x170 [ 293.908102] generic_handle_irq+0x3c/0x58 [ 293.908103] __handle_domain_irq+0x68/0xc0 [ 293.908104] gic_handle_irq+0xb4/0x298 [ 293.908105] el1_irq+0xcc/0x180 [ 293.908107] arch_cpu_idle+0x38/0x228 [ 293.908110] default_idle_call+0x20/0x40 [ 293.908113] do_idle+0x1cc/0x2b8 [ 293.908114] cpu_startup_entry+0x2c/0x30 [ 293.908115] rest_init+0xdc/0xe8 [ 293.908117] arch_call_rest_init+0x14/0x1c [ 293.908117] start_kernel+0x490/0x4c4 This patch adds a waiting logic as user doing the above two operations to avoid panic. The two operations will hold on in the driver remove function until the tasks release all their relative TFMs. Signed-off-by: NHui Tang <tanghui20@huawei.com> Signed-off-by: NWeili Qian <qianweili@huawei.com> Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Since the drivers such as HPRE/SEC/ZIP do not implement 'pci_driver.shutdow', a RAS will be triggered at OS rebooting or shutting down as the hardware device is processing request. The log looks like this: NOTICE: [NimbusSecNodeType1]:[2372L]This is sec, Base = 0x141800000 NOTICE: [NimbusSecHandle]:[2319L] SecIntSt = 0x3 NOTICE: [NimbusSecHandle]:[2320L] SecQmIntStatus = 0x2 NOTICE: [PrintSecurityType]:[344L] SecurityType is RECOVERABLE! This patch offers a new API in qm to shutdown devices, and add shutdown callbacks in ACC driver based on this new API. So the running devices will be stopped when the OS reboot or shutdown. Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yang Shen 提交于
Now, there are three reasons of stopping: 'NORMAL', 'SOFT_RESET' and 'FLR'. In order to keep this, explicitly pass the stop reason as an input parameter of 'hisi_qm_stop' function. Fixes: b67202e8("crypto: hisilicon/qm - add state machine for QM") Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Signed-off-by: NYang Shen <shenyang39@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 09 7月, 2020 1 次提交
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由 Barry Song 提交于
If users don't specify NUMA node, the driver will use the ZIP module near the CPU allocating acomp. Otherwise, it uses the ZIP module according to the requirement of users. Cc: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NBarry Song <song.bao.hua@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 28 5月, 2020 1 次提交
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由 Weili Qian 提交于
In order to be compatible with devices of different versions, V1 in the accelerator driver is now isolated, and other versions are the previous V2 processing flow. Signed-off-by: NWeili Qian <qianweili@huawei.com> Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 22 5月, 2020 2 次提交
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由 Shukun Tan 提交于
Add dump information of SQC/CQC/EQC/AEQC/SQE/CQE/EQE/AEQE. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Longfang Liu 提交于
Hisilicon ZIP engine driver uses debugfs to provides IO operation debug information Signed-off-by: NLongfang Liu <liulongfang@huawei.com> Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 15 5月, 2020 8 次提交
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由 Zhou Wang 提交于
Currently zip sqe is stored in hisi_zip_qp_ctx, which will bring corruption with multiple parallel users of the crypto tfm. This patch removes the zip_sqe in hisi_zip_qp_ctx and uses a temporary sqe instead. Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NJonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
The hardware device can be configured to report directly through MSI, but this method will not go through RAS, configure all hardware errors that should be processed by driver to NFE. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Weili Qian 提交于
Some initial value assignment of struct hisi_qm could put into QM. Signed-off-by: NWeili Qian <qianweili@huawei.com> Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
The codes related use_dma_api is useless which should be removed. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
Add callback reset_prepare and reset_done in QM, The callback reset_prepare will uninit device error configuration and stop the QM, the callback reset_done will init the device error configuration and restart the QM. Uninit the error configuration will disable device block master OOO when Multi-bit ECC error occurs to avoid the request of FLR will not return. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
put q_num_set similar code into qm to reduce the redundancy. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Longfang Liu 提交于
Misc fixes on coding style: 1.Merge QM initialization code into a function 2.Merge QM's PF and VF initialization into a function Signed-off-by: NLongfang Liu <liulongfang@huawei.com> Signed-off-by: NZaibo Xu <xuzaibo@huawei.com> Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Rikard Falkeborn 提交于
hzip_dfx_regs is never changed and can be made const. This allows the compiler to put it in the text section instead of the data section. Before: text data bss dec hex filename 15236 6160 480 21876 5574 drivers/crypto/hisilicon/zip/zip_main.o After: text data bss dec hex filename 15620 5776 480 21876 5574 drivers/crypto/hisilicon/zip/zip_main.o Signed-off-by: NRikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 16 4月, 2020 4 次提交
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由 Shukun Tan 提交于
Register controller reset handle with PCIe AER. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Hao Fang 提交于
The vfs_num module parameter has been used in zip driver, this patch adds this for HPRE and SEC driver. Signed-off-by: NHao Fang <fanghao11@huawei.com> Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
Clean the duplicate SR-IOV related codes, put all into qm.c. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Shukun Tan 提交于
We plan to move vfs_num related code into qm.c, put the param vfs_num into struct hisi_qm first. Signed-off-by: NShukun Tan <tanshukun1@huawei.com> Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com> Reviewed-by: NZaibo Xu <xuzaibo@huawei.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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