1. 01 4月, 2015 9 次提交
  2. 27 3月, 2015 2 次提交
  3. 01 8月, 2014 2 次提交
  4. 04 7月, 2014 4 次提交
  5. 08 5月, 2014 1 次提交
  6. 20 10月, 2013 2 次提交
  7. 16 5月, 2013 1 次提交
  8. 09 11月, 2012 1 次提交
  9. 21 10月, 2012 2 次提交
  10. 18 10月, 2012 1 次提交
  11. 13 9月, 2012 1 次提交
    • T
      ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+ · dbc04161
      Tony Lindgren 提交于
      As the plat and mach includes need to disappear for single zImage work,
      we need to remove plat/hardware.h.
      
      Do this by splitting plat/hardware.h into omap1 and omap2+ specific files.
      
      The old plat/hardware.h already has omap1 only defines, so it gets moved
      to mach/hardware.h for omap1. For omap2+, we use the local soc.h
      that for now just includes the related SoC headers to keep this patch more
      readable.
      
      Note that the local soc.h still includes plat/cpu.h that can be dealt
      with in later patches. Let's also include plat/serial.h from common.h for
      all the board-*.c files. This allows making the include files local later
      on without patching these files again.
      
      Note that only minimal changes are done in this patch for the
      drivers/watchdog/omap_wdt.c driver to keep things compiling. Further
      patches are needed to eventually remove cpu_is_omap usage in the drivers.
      
      Also only minimal changes are done to sound/soc/omap/* to remove the
      unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's
      no need to include omap44xx.h.
      
      While at it, also sort some of the includes in the standard way.
      
      Cc: linux-watchdog@vger.kernel.org
      Cc: alsa-devel@alsa-project.org
      Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
      Cc: Jarkko Nikula <jarkko.nikula@bitmer.com>
      Cc: Liam Girdwood <lrg@ti.com>
      Acked-by: NWim Van Sebroeck <wim@iguana.be>
      Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      dbc04161
  12. 19 6月, 2012 1 次提交
    • O
      ARM: OMAP2+: control: new APIs to configure boot address and mode · 90f1380e
      Omar Ramirez Luna 提交于
      SCM contains boot addr and boot mode registers to control
      other processors on different OMAP versions. It controls the
      boot address and mode for DSP based subsystems like: IVA 2.1
      (OMAP2430), IVA 2.2 (OMAP3) and DSP (OMAP4).
      
      If contained within SCM registers, when a processor is
      booting it uses BOOTADDR to start running the code at that
      location. BOOTMOD register specifies a different set of
      modes for the processor to execute when booting (from direct,
      idle, self-loop, user and default).
      
      Since there was no offset associated with OMAP4, this patch
      defines it.
      Signed-off-by: NOmar Ramirez Luna <omar.luna@linaro.org>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      90f1380e
  13. 08 3月, 2012 1 次提交
    • T
      ARM: OMAP2+: Fix build error after merge · 2b43e4e5
      Tony Lindgren 提交于
      Commit 9890ce44 (ARM: get rid of asm/irq.h in asm/prom.h)
      removed include of asm/irq.h in asm/prom.h. This commit
      together with recent omap cleanup to remove io.h causes
      build breakage:
      
      arrch/arm/mach-omap2/control.c: In function 'omap3_ctrl_write_boot_mode':
      arch/arm/mach-omap2/control.c:238: error:
      'OMAP343X_CTRL_BASE' undeclared (first use in this function)
      ...
      
      Fix this by including hardware.h directly where needed
      instead of relying on asm/irq.h in asm/prom.h.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      2b43e4e5
  14. 25 2月, 2012 1 次提交
  15. 18 11月, 2011 1 次提交
  16. 20 10月, 2011 1 次提交
  17. 24 6月, 2011 1 次提交
  18. 21 4月, 2011 2 次提交
    • E
      OMAP3: PM: Do not rely on ROM code to restore CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL · a8ae645c
      Eduardo Valentin 提交于
      As per OMAP3 erratum (i671), ROM code adds extra latencies while
      restoring CM_AUTOIDLE_PLL register, if AUTO_PERIPH_DPLL is equal to 1.
      
      This patch stores 0's in scratchpad content area corresponding to
      AUTO_PERIPH_DPLL, to prevent ROM code to try to lock per DPLL, since
      it won't respect proper programing scheme.
      
      This register is then stored in prcm context. The saving and restore
      is now done by kernel side.
      
      Here follow the erratum description
      
      DESCRIPTION
      
      After OFF mode transition, among many restorations, the ROM Code restores the
      CM_AUTOIDLE_PLL register, and after that, it tries to relock the PER DPLL.
      
      In case the restoration data stored in scratchpad memory contains a field
      CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL = 1, then the way the ROM Code restores and
      locks the PER DPLL does not respect the PER DPLL programming scheme.
      
      In that case, the DPLL might not lock. Meanwhile, when trying to lock the PER
      DPLL, the ROM Code does not hang. Only extra latencies are introduced at
      wake-up.
      
      WORKAROUND
      
      When saving the context-restore structure in scratchpad memory, in order to
      respect the PER DPLL programming scheme, it is advised to store 0 in the
      CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL field of the saved structure.
      
      After wake-up, the application should store in CM_AUTOIDLE_PLL register the
      right desired value.
      Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      a8ae645c
    • E
      OMAP2+: PM: Fix the saving of CM_AUTOIDLE_PLL register on scratchpad area · 8bc2e98b
      Eduardo Valentin 提交于
      The saving of CCR.CM_AUTOIDLE_PLL is done in scratchpad area.
      
      However, in current code, the saving is done for CM_AUTOIDLE2_PLL
      (offset 0x34) instead of CM_AUTOIDLE_PLL (offset 0x30).
      
      This patch changes the code to save the correct register.
      Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      8bc2e98b
  19. 22 12月, 2010 6 次提交