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      clk: tegra: Fix Tegra PWM parent clock · c461c677
      Jon Hunter 提交于
      Commit 8c193f47 ("pwm: tegra: Optimize period calculation") updated
      the period calculation in the Tegra PWM driver and now returns an error
      if the period requested is less than minimum period supported. This is
      breaking PWM support on various Tegra platforms. For example, on the
      Tegra210 Jetson Nano platform this is breaking the PWM fan support and
      probing the PWM fan driver now fails ...
      
       pwm-fan pwm-fan: Failed to configure PWM: -22
       pwm-fan: probe of pwm-fan failed with error -22
      
      The problem is that the default parent clock for the PWM on Tegra210 is
      a 32kHz clock and is unable to support the requested PWM period.
      
      Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
      updating the parent clock for the PWM to be the PLL_P.
      
      Fixes: 8c193f47 ("pwm: tegra: Optimize period calculation")
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Tested-by: Robert Eckelmann <longnoserob@gmail.com> # TF101 T20
      Tested-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> # TF101 T20
      Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # TF201 T30
      Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # TF700T T3
      Link: https://lore.kernel.org/r/20221010100046.6477-1-jonathanh@nvidia.comAcked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NStephen Boyd <sboyd@kernel.org>
      c461c677