1. 05 11月, 2020 9 次提交
  2. 22 9月, 2020 1 次提交
    • A
      drm/msm: Fix premature purging of BO · 9d8baa2b
      Akhil P Oommen 提交于
      In the case where we have a back-to-back submission that shares the same
      BO, this BO will be prematurely moved to inactive_list while retiring the
      first submit. But it will be still part of the second submit which is
      being processed by the GPU. Now, if the shrinker happens to be triggered at
      this point, it will result in a premature purging of this BO.
      
      To fix this, we need to refcount BO while doing submit and retire. Then,
      it should be moved to inactive list when this refcount becomes 0.
      Signed-off-by: NAkhil P Oommen <akhilpo@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@chromium.org>
      9d8baa2b
  3. 13 9月, 2020 2 次提交
  4. 19 5月, 2020 1 次提交
  5. 20 3月, 2020 2 次提交
  6. 13 8月, 2019 1 次提交
  7. 19 6月, 2019 2 次提交
  8. 14 5月, 2019 1 次提交
  9. 20 4月, 2019 2 次提交
  10. 12 12月, 2018 4 次提交
    • J
      drm/msm: Add a name field for gem objects · 0815d774
      Jordan Crouse 提交于
      For debugging purposes it is useful to assign descriptions
      to buffers so that we know what they are used for. Add
      a field to the buffer object and use that to name the various
      kernel side allocations which ends up looking like like this
      in /d/dri/X/gem:
      
         flags       id ref  offset   kaddr            size     madv      name
         00040000: I  0 ( 1) 00000000 0000000070b79eca 00004096           memptrs
            vmas: [gpu: 01000000,mapped,inuse=1]
         00020000: I  0 ( 1) 00000000 0000000031ed4074 00032768           ring0
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      0815d774
    • J
      drm/msm: Count how many times iova memory is pinned · 7ad0e8cf
      Jordan Crouse 提交于
      Add a reference count to track how many times a particular
      chunk of iova memory is pinned (mapped) in the iomu and
      add msm_gem_unpin_iova to give up references.
      
      It is important to note that msm_gem_unpin_iova replaces
      msm_gem_put_iova because the new implicit behavior
      that an assigned iova in a given vma is now valid for the
      life of the buffer and what we are really focusing on is
      the use of that iova.
      
      For now the unmappings are lazy; once the reference counts
      go to zero they *COULD* be unmapped dynamically but that
      will require an outside force such as a shrinker or
      mm_notifiers.  For now, we're just focusing on getting
      the counting right and setting ourselves up to be ready
      for the future.
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      7ad0e8cf
    • J
      drm/msm: Split msm_gem_get_iova into two steps · c0ee9794
      Jordan Crouse 提交于
      Split the operation of msm_gem_get_iova into two operations:
      1) allocate an iova and 2) map (pin) the backing memory int the
      iommu. This is the first step toward allowing memory pinning
      to occur independently of the iova management.
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      c0ee9794
    • J
      drm/msm/gpu: Add trace events for tracking GPU submissions · 4241db42
      Jordan Crouse 提交于
      Add trace events to track the progress of a GPU submission
      msm_gpu_submit occurs at the beginning of the submissions,
      msm_gpu_submit_flush happens when the submission is put on
      the ringbuffer and msm_submit_flush_retired is sent when
      the operation is retired.
      
      To make it easier to track the operations a unique sequence
      number is assigned to each submission and displayed in each
      event output so a human or a script can easily associate
      the events related to a specific submission.
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      4241db42
  11. 20 2月, 2018 1 次提交
    • R
      drm/msm: add sudo flag to submit ioctl · 6a8bd08d
      Rob Clark 提交于
      This flags cause cmdstream to be executed from the ringbuffer (RB)
      instead of IB1.  Normally not something you'd ever want to do, but
      it is super useful for firmware debugging.
      
      Hidden behind CAP_SYS_RAWIO and a default=n kconfig option which
      depends on EXPERT (and has a suitably scary warning), to prevent
      it from being used on accident.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      6a8bd08d
  12. 28 10月, 2017 2 次提交
    • J
      drm/msm: Support multiple ringbuffers · f97decac
      Jordan Crouse 提交于
      Add the infrastructure to support the idea of multiple ringbuffers.
      Assign each ringbuffer an id and use that as an index for the various
      ring specific operations.
      
      The biggest delta is to support legacy fences. Each fence gets its own
      sequence number but the legacy functions expect to use a unique integer.
      To handle this we return a unique identifier for each submission but
      map it to a specific ring/sequence under the covers. Newer users use
      a dma_fence pointer anyway so they don't care about the actual sequence
      ID or ring.
      
      The actual mechanics for multiple ringbuffers are very target specific
      so this code just allows for the possibility but still only defines
      one ringbuffer for each target family.
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      f97decac
    • J
      drm/msm: Add per-instance submit queues · f7de1545
      Jordan Crouse 提交于
      Currently the behavior of a command stream is provided by the user
      application during submission and the application is expected to internally
      maintain the settings for each 'context' or 'rendering queue' and specify
      the correct ones.
      
      This works okay for simple cases but as applications become more
      complex we will want to set context specific flags and do various
      permission checks to allow certain contexts to enable additional
      privileges.
      
      Add kernel-side submit queues to be analogous to 'contexts' or
      'rendering queues' on the application side. Each file descriptor
      instance will maintain its own list of queues. Queues cannot be
      shared between file descriptors.
      
      For backwards compatibility context id '0' is defined as a default
      context specifying no priority and no special flags. This is
      intended to be the usual configuration for 99% of applications so
      that a garden variety application can function correctly without
      creating a queue. Only those applications requiring the specific
      benefit of different queues need create one.
      Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      f7de1545
  13. 17 6月, 2017 1 次提交
  14. 16 6月, 2017 3 次提交
  15. 08 4月, 2017 1 次提交
  16. 29 11月, 2016 1 次提交
    • R
      drm/msm: convert iova to 64b · 78babc16
      Rob Clark 提交于
      For a5xx the gpu is 64b so we need to change iova to 64b everywhere.  On
      the display side, iova is still 32b so it can ignore the upper bits.
      (Although all the armv8 devices have an iommu that can map 64b pa to 32b
      iova.)
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      78babc16
  17. 28 11月, 2016 1 次提交
  18. 25 10月, 2016 1 次提交
    • C
      dma-buf: Rename struct fence to dma_fence · f54d1867
      Chris Wilson 提交于
      I plan to usurp the short name of struct fence for a core kernel struct,
      and so I need to rename the specialised fence/timeline for DMA
      operations to make room.
      
      A consensus was reached in
      https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
      that making clear this fence applies to DMA operations was a good thing.
      Since then the patch has grown a bit as usage increases, so hopefully it
      remains a good thing!
      
      (v2...: rebase, rerun spatch)
      v3: Compile on msm, spotted a manual fixup that I broke.
      v4: Try again for msm, sorry Daniel
      
      coccinelle script:
      @@
      
      @@
      - struct fence
      + struct dma_fence
      @@
      
      @@
      - struct fence_ops
      + struct dma_fence_ops
      @@
      
      @@
      - struct fence_cb
      + struct dma_fence_cb
      @@
      
      @@
      - struct fence_array
      + struct dma_fence_array
      @@
      
      @@
      - enum fence_flag_bits
      + enum dma_fence_flag_bits
      @@
      
      @@
      (
      - fence_init
      + dma_fence_init
      |
      - fence_release
      + dma_fence_release
      |
      - fence_free
      + dma_fence_free
      |
      - fence_get
      + dma_fence_get
      |
      - fence_get_rcu
      + dma_fence_get_rcu
      |
      - fence_put
      + dma_fence_put
      |
      - fence_signal
      + dma_fence_signal
      |
      - fence_signal_locked
      + dma_fence_signal_locked
      |
      - fence_default_wait
      + dma_fence_default_wait
      |
      - fence_add_callback
      + dma_fence_add_callback
      |
      - fence_remove_callback
      + dma_fence_remove_callback
      |
      - fence_enable_sw_signaling
      + dma_fence_enable_sw_signaling
      |
      - fence_is_signaled_locked
      + dma_fence_is_signaled_locked
      |
      - fence_is_signaled
      + dma_fence_is_signaled
      |
      - fence_is_later
      + dma_fence_is_later
      |
      - fence_later
      + dma_fence_later
      |
      - fence_wait_timeout
      + dma_fence_wait_timeout
      |
      - fence_wait_any_timeout
      + dma_fence_wait_any_timeout
      |
      - fence_wait
      + dma_fence_wait
      |
      - fence_context_alloc
      + dma_fence_context_alloc
      |
      - fence_array_create
      + dma_fence_array_create
      |
      - to_fence_array
      + to_dma_fence_array
      |
      - fence_is_array
      + dma_fence_is_array
      |
      - trace_fence_emit
      + trace_dma_fence_emit
      |
      - FENCE_TRACE
      + DMA_FENCE_TRACE
      |
      - FENCE_WARN
      + DMA_FENCE_WARN
      |
      - FENCE_ERR
      + DMA_FENCE_ERR
      )
       (
       ...
       )
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Acked-by: NSumit Semwal <sumit.semwal@linaro.org>
      Acked-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
      f54d1867
  19. 16 7月, 2016 4 次提交