- 31 8月, 2015 1 次提交
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由 Koji Matsuoka 提交于
The upper limit of Tx/Rx FIFO size is 64 word by the specification of H/W. This patch corrects to 64 word from 256 word. Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: NYoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 30 8月, 2015 1 次提交
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由 Axel Lin 提交于
devm_ioremap_resource() returns ERR_PTR on error. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 29 8月, 2015 3 次提交
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由 Heiner Kallweit 提交于
Add runtime PM and use autosuspend instead of suspending the SPI controller after each transfer. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Heiner Kallweit 提交于
Now that most cleanup is done automatically the remove functions can be significantly simplified. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Heiner Kallweit 提交于
Migrate fsl-espi and fsl-spi to using the managed devm_ functions for resource handling. This simplifies the cleanup. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 28 8月, 2015 1 次提交
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由 Leilk Liu 提交于
enable pause interrupt should use SPI_CMD_PAUSE_IE MACRO, so fix it. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 27 8月, 2015 1 次提交
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由 Stefan Brüns 提交于
This allows drivers for devices connected via SPI to check if the controller supports a given bits_per_word value during setup. Currently any BPW value is accepted durings setup, and transfers are rejected later. Signed-off-by: NStefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 26 8月, 2015 5 次提交
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由 Leilk Liu 提交于
This patch replaces *_time name in mtk_spi_prepare_transfer(). Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Leilk Liu 提交于
This patch adds PM clk_prepare_enable fail flow. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Leilk Liu 提交于
this patch replaces int with u32, deletes TAB, and defines MTK_SPI_PAUSE_INT_STATUS marco. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Leilk Liu 提交于
mediatek spi driver uses readl/writel, so add linux/io.h, even so it's implicitly imported by spi/spi.h Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Jonas Gorski 提交于
Add support for dual read/writes on spi-bcm63xx-hsspi. This has been tested with a s25fl129p1 dual read capable spi flash, with a nice speed improvement: serial read: root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192 2032+0 records in 2032+0 records out real 0m 4.39s user 0m 0.00s sys 0m 1.55s dual read: root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192 2032+0 records in 2032+0 records out real 0m 3.09s user 0m 0.00s sys 0m 1.56s Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 22 8月, 2015 3 次提交
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由 Michal Hocko 提交于
Commit c48a11c7 ("netvm: propagate page->pfmemalloc to skb") added checks for page->pfmemalloc to __skb_fill_page_desc(): if (page->pfmemalloc && !page->mapping) skb->pfmemalloc = true; It assumes page->mapping == NULL implies that page->pfmemalloc can be trusted. However, __delete_from_page_cache() can set set page->mapping to NULL and leave page->index value alone. Due to being in union, a non-zero page->index will be interpreted as true page->pfmemalloc. So the assumption is invalid if the networking code can see such a page. And it seems it can. We have encountered this with a NFS over loopback setup when such a page is attached to a new skbuf. There is no copying going on in this case so the page confuses __skb_fill_page_desc which interprets the index as pfmemalloc flag and the network stack drops packets that have been allocated using the reserves unless they are to be queued on sockets handling the swapping which is the case here and that leads to hangs when the nfs client waits for a response from the server which has been dropped and thus never arrive. The struct page is already heavily packed so rather than finding another hole to put it in, let's do a trick instead. We can reuse the index again but define it to an impossible value (-1UL). This is the page index so it should never see the value that large. Replace all direct users of page->pfmemalloc by page_is_pfmemalloc which will hide this nastiness from unspoiled eyes. The information will get lost if somebody wants to use page->index obviously but that was the case before and the original code expected that the information should be persisted somewhere else if that is really needed (e.g. what SLAB and SLUB do). [akpm@linux-foundation.org: fix blooper in slub] Fixes: c48a11c7 ("netvm: propagate page->pfmemalloc to skb") Signed-off-by: NMichal Hocko <mhocko@suse.com> Debugged-by: NVlastimil Babka <vbabka@suse.com> Debugged-by: NJiri Bohac <jbohac@suse.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: David Miller <davem@davemloft.net> Acked-by: NMel Gorman <mgorman@suse.de> Cc: <stable@vger.kernel.org> [3.6+] Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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The commit dd114443 ("spi: dw-spi: Convert 16bit accesses to 32bit accesses") changed all 16bit accesses in the DW_apb_ssi driver to 32bit. This, unfortunately, breaks data register access on picoXcell, where the DW IP needs data register accesses to be word accesses (all other accesses appear to be OK). This change introduces a new master variable to allow interface drivers to specify that 16bit data transfer I/O is required. This change also introduces the ability to set this variable via device tree bindings in the MMIO interface driver. Both the core and the MMIO interface driver default to the current 32bit behaviour. Before this change, on a picoXcell pc3x3: spi_master spi32766: interrupt_transfer: fifo overrun/underrun m25p80 spi32766.0: error -5 reading 9f m25p80: probe of spi32766.0 failed with error -5 After this change: m25p80 spi32766.0: m25p40 (512 Kbytes) Fixes: dd114443 ("spi: dw-spi: Convert 16bit accesses to 32bit accesses") Signed-off-by: NMichael van der Westhuizen <michael@smart-africa.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Mark Brown 提交于
If a slave appears with no maximum transfer speed specified fall back to using the maximum for the master instead. It's questionable if we should let slaves do this but let's be defensive. Signed-off-by: NMark Brown <broonie@kernel.org>
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- 21 8月, 2015 6 次提交
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由 Dave Airlie 提交于
We apparantly get a hotplug irq before we've initialised modesetting, [drm] Loading R100 Microcode BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<c125f56f>] __mutex_lock_slowpath+0x23/0x91 *pde = 00000000 Oops: 0002 [#1] Modules linked in: radeon(+) drm_kms_helper ttm drm i2c_algo_bit backlight pcspkr psmouse evdev sr_mod input_leds led_class cdrom sg parport_pc parport floppy intel_agp intel_gtt lpc_ich acpi_cpufreq processor button mfd_core agpgart uhci_hcd ehci_hcd rng_core snd_intel8x0 snd_ac97_codec ac97_bus snd_pcm usbcore usb_common i2c_i801 i2c_core snd_timer snd soundcore thermal_sys CPU: 0 PID: 15 Comm: kworker/0:1 Not tainted 4.2.0-rc7-00015-gbf674028 #111 Hardware name: MicroLink /D850MV , BIOS MV85010A.86A.0067.P24.0304081124 04/08/2003 Workqueue: events radeon_hotplug_work_func [radeon] task: f6ca5900 ti: f6d3e000 task.ti: f6d3e000 EIP: 0060:[<c125f56f>] EFLAGS: 00010282 CPU: 0 EIP is at __mutex_lock_slowpath+0x23/0x91 EAX: 00000000 EBX: f5e900fc ECX: 00000000 EDX: fffffffe ESI: f6ca5900 EDI: f5e90100 EBP: f5e90000 ESP: f6d3ff0c DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068 CR0: 8005003b CR2: 00000000 CR3: 36f61000 CR4: 000006d0 Stack: f5e90100 00000000 c103c4c1 f6d2a5a0 f5e900fc f6df394c c125f162 f8b0faca f6d2a5a0 c138ca00 f6df394c f7395600 c1034741 00d40000 00000000 f6d2a5a0 c138ca00 f6d2a5b8 c138ca10 c1034b58 00000001 f6d40000 f6ca5900 f6d0c940 Call Trace: [<c103c4c1>] ? dequeue_task_fair+0xa4/0xb7 [<c125f162>] ? mutex_lock+0x9/0xa [<f8b0faca>] ? radeon_hotplug_work_func+0x17/0x57 [radeon] [<c1034741>] ? process_one_work+0xfc/0x194 [<c1034b58>] ? worker_thread+0x18d/0x218 [<c10349cb>] ? rescuer_thread+0x1d5/0x1d5 [<c103742a>] ? kthread+0x7b/0x80 [<c12601c0>] ? ret_from_kernel_thread+0x20/0x30 [<c10373af>] ? init_completion+0x18/0x18 Code: 42 08 e8 8e a6 dd ff c3 57 56 53 83 ec 0c 8b 35 48 f7 37 c1 8b 10 4a 74 1a 89 c3 8d 78 04 8b 40 08 89 63 Reported-and-Tested-by: NMeelis Roos <mroos@linux.ee> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Bjorn Helgaas 提交于
Meelis and Helge reported that 3a9ad0b4 ("PCI: Add pci_bus_addr_t") caused HPMCs on A500 and hangs on rp5470. PA-RISC does not set ARCH_DMA_ADDR_T_64BIT, even for 64-bit kernels, so prior to 3a9ad0b4, we always used 32-bit PCI addresses. After 3a9ad0b4, we do use 64-bit PCI addresses in 64-bit kernels, and apparently there's some PA-RISC problem related to them. Fixes: 3a9ad0b4 ("PCI: Add pci_bus_addr_t") Link: http://lkml.kernel.org/r/alpine.LRH.2.11.1507260929000.30065@math.ut.eeReported-by: NMeelis Roos <mroos@linux.ee> Reported-by: NHelge Deller <deller@gmx.de> Tested-by: NHelge Deller <deller@gmx.de> Based-on-idea-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NYinghai Lu <yinghai@kernel.org> CC: stable@vger.kernel.org # v3.19+
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由 Vincent Pelletier 提交于
GPIOF_IN flag was lost in: Commit 633a21d8("input: gpio_keys_polled: Add support for GPIO descriptors"). Without this flag, legacy code path (for non-descriptor GPIO declarations) would configure GPIO as output (0 meaning GPIOF_DIR_OUT | GPIOF_INIT_LOW). Cc: stable@vger.kernel.org Signed-off-by: NVincent Pelletier <plr.vincent@gmail.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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由 Leilk Liu 提交于
This patch removes SPI_CMD_*_OFFSET defines, and uses the BIT(x) defines instead. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Leilk Liu 提交于
The quirks are true/false, so define these as bool. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Leilk Liu 提交于
TX_ENDIAN/RX_ENDIAN bits define whether to reverse the endian order of the data DMA from/to memory. The endian order should keep the same with cpu endian. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 20 8月, 2015 6 次提交
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由 Guenter Roeck 提交于
Commit 6dd74782 ("ARM: imx: move timer resources into a structure") moved initialization parameters into a data structure, but neglected to set the irq field in that data structure for non-DT boots. This causes the system to hang if a non-DT boot is attempted. Fixes: 6dd74782 ("ARM: imx: move timer resources into a structure") Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1440066441-13930-1-git-send-email-linux@roeck-us.netSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Grygorii Strashko 提交于
The TI crossbar irqchip doesn't provides any facility to configure the wakeup sources, but the conversion to hierarchical irqdomains set the irq_set_wake callback to irq_chip_set_wake_parent. The parent chip (OMAP wakeupgen) has no irq_set_wake function either so the call will fail with -ENOSYS. As a result the irq_set_wake() call in the resume path will trigger an 'Unbalanced wake disable' warning. Before the conversion the GIC irqchip was the top level irqchip and correctly flagged with IRQCHIP_SKIP_SET_WAKE. Restore the correct behaviour by removing the irq_set_type callback from the crossbar irqchip and set the IRQCHIP_SKIP_SET_WAKE flag which lets the irq_set_irq_wake() call from the driver succeed. [ tglx: Massaged changelog ] Fixes: 783d3186 ('irqchip: crossbar: Convert dra7 crossbar...') Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: <linux@arm.linux.org.uk> Cc: <nsekhar@ti.com> Cc: <jason@lakedaemon.net> Cc: <balbi@ti.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <tony@atomide.com> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org # 4.1 Link: http://lkml.kernel.org/r/1439554830-19502-7-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Grygorii Strashko 提交于
The ARM GIC requires that all interrupts which are not used as a wakeup source have to be masked during suspend. The conversion of the crossbar irqchip to hierarchical irq domains failed to mark the crossbar irqchip with the IRQCHIP_MASK_ON_SUSPEND flag and therefor broke the suspend requirement of the GIC. Before the conversion the flags were visible because the GIC was the top level irqchip. After the conversion the crossbar irqchip is the top level irq chip whose flags are evaluated in suspend_device_irq(). As the flag is not set the masking of the non-wakeup irqs is not invoked which breaks suspend. Add the IRQCHIP_MASK_ON_SUSPEND flag to the crossbar irqchip, so the GIC interrupts get masked properly. [ tglx: Massaged changelog ] Fixes: 783d3186 ('irqchip: crossbar: Convert dra7 crossbar...') Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: <linux@arm.linux.org.uk> Cc: <nsekhar@ti.com> Cc: <jason@lakedaemon.net> Cc: <balbi@ti.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <tony@atomide.com> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org # 4.1 Link: http://lkml.kernel.org/r/1439554830-19502-6-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Grygorii Strashko 提交于
The conversion of the crossbar irqchip to hierarchical irq domains failed to provide a mechanism to properly set the trigger type of an interrupt. The crossbar irq chip itself has no mechanism and therefor no irq_set_type() callback. The code before the conversion relayed the trigger configuration directly to the underlying GIC. Restore the correct behaviour by setting the crossbar irq_set_type callback to irq_chip_set_type_parent(). This propagates the set_trigger() call to the underlying GIC irqchip. [ tglx: Massaged changelog ] Fixes: 783d3186 ('irqchip: crossbar: Convert dra7 crossbar...') Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: <linux@arm.linux.org.uk> Cc: <nsekhar@ti.com> Cc: <jason@lakedaemon.net> Cc: <balbi@ti.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <tony@atomide.com> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org # 4.1 Link: http://lkml.kernel.org/r/1439554830-19502-4-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Yijing Wang 提交于
We should not assume any particular hardware topology. Commit d0751b98 ("PCI: Add dev->has_secondary_link to track downstream PCIe links") relied on the assumption that every PCIe hierarchy is rooted at a Root Port. But we can't rely on any assumption about what hardware we will find; we just have to deal with the world as it is. On some platforms, PCIe devices (endpoints, switch upstream ports, etc.) appear directly on the root bus, and there is no Root Port in the PCI bus hierarchy. For example, Meelis observed these top-level devices on a Sparc V245: 0000:02:00.0 PCI bridge to [bus 03-0d] Switch Upstream Port 0001:02:00.0 PCI bridge to [bus 03] PCIe to PCI/PCI-X Bridge These devices *look* like they have links going upstream, but there really are no upstream devices. In set_pcie_port_type(), we used the parent device to figure out which side of a switch port has a link, so if the parent device did not exist, we dereferenced a NULL parent pointer. Check whether the parent device exists before dereferencing it. Meelis observed this oops on Sparc V245 and T2000. Ben Herrenschmidt says this is also possible on IBM PowerVM guests on PowerPC. [bhelgaas: changelog, comment] Link: http://lkml.kernel.org/r/alpine.LRH.2.20.1508122118210.18637@math.ut.eeReported-by: NMeelis Roos <mroos@linux.ee> Tested-by: NMeelis Roos <mroos@linux.ee> Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NDavid S. Miller <davem@davemloft.net>
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由 Leilk Liu 提交于
clock in prepare_hardware/unprepare_hardware is redundant with pm_runtime, so remove them. Signed-off-by: NLeilk Liu <leilk.liu@mediatek.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 19 8月, 2015 13 次提交
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11020/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Fabio Estevam 提交于
Current code assigns 0 to variable 'err', which makes mantis_dma_init() to return success even if mantis_alloc_buffers() fails. Fix it by checking the return value from mantis_alloc_buffers() and propagating it in the case of error. Reported-by: NRUC_Soft_Sec <zy900702@163.com> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit 9869da5b. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit 1d971d92. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit a0466f15. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit cf257e28. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit 0d830b2d. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit 2e4ebde2. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 David Härdeman 提交于
This reverts commit da7ee60b. The current code is not mature enough, the API should allow a single protocol to be specified. Also, the current code contains heuristics that will depend on module load order. Signed-off-by: NDavid Härdeman <david@hardeman.nu> Acked-by: NAntti Seppälä <a.seppala@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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由 Thulasimani,Sivakumar 提交于
This patch removes TP3 support on CHV since there is no support for HBR2 on this platform. v2: rename the function to indicate it checks source rates (Jani) v3: update comment to indicate TP3 dependency on HBR2 supported hardware (Jani) Cc: stable@vger.kernel.org # v4.1+ Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NSivakumar Thulasimani <sivakumar.thulasimani@intel.com> [Jani: fixed a couple of checkpatch warnings.] Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 Thulasimani,Sivakumar 提交于
This patch removes 5.4Gbps from supported link rate for CHV since it is not supported in it. v2: change the ordering for better readability (Ville) Cc: stable@vger.kernel.org # v4.1+ Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NSivakumar Thulasimani <sivakumar.thulasimani@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 Thulasimani,Sivakumar 提交于
This reverts commit fe51bfb9. Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Thu Mar 12 17:10:38 2015 +0200 CHV does not support intermediate frequencies so reverting the patch that added it in the first place Cc: stable@vger.kernel.org # v4.1+ Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NSivakumar Thulasimani <sivakumar.thulasimani@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 Jani Nikula 提交于
This reverts commit 047fe6e6 Author: David Weinehall <david.weinehall@linux.intel.com> Date: Tue Aug 4 16:55:52 2015 +0300 drm/i915: Allow parsing of variable size child device entries from VBT That commit is not valid for v4.2, however it will be valid for v4.3. It was simply queued too early. The referenced regressing commit is just fine until the size of struct common_child_dev_config changes, and that won't happen until v4.3. Indeed, the expected size checks here rely on the increased size of the struct, breaking new platforms. Fixes: 047fe6e6 ("drm/i915: Allow parsing of variable size child device entries from VBT") Cc: Daniel Vetter <daniel@ffwll.ch> Cc: David Weinehall <david.weinehall@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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