- 22 4月, 2013 2 次提交
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由 Arto Merilainen 提交于
Both host1x and drm drivers have host1x structures. This patch renames the host1x structure under drm to follow name host1x_drm. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Terje Bergstrom 提交于
Make drm part of host1x driver. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 22 2月, 2013 3 次提交
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由 Thierry Reding 提交于
This list is most useful to inspect whether framebuffer reference counting works as expected. The code is loosely based on the i915 implementation. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
All the necessary support bits like .mode_set_base() and VBLANK are now available, so page-flipping case easily be implemented on top. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
Implement support for the VBLANK IOCTL. Note that Tegra is somewhat special in this case because it doesn't use the generic IRQ support provided by the DRM core (DRIVER_HAVE_IRQ) but rather registers one interrupt handler for each display controller. While at it, clean up the way that interrupts are enabled to ensure that the VBLANK interrupt only gets enabled when required. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 29 1月, 2013 1 次提交
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由 Prashant Gaikwad 提交于
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 20 11月, 2012 1 次提交
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由 Thierry Reding 提交于
This commit adds a KMS driver for the Tegra20 SoC. This includes basic support for host1x and the two display controllers found on the Tegra20 SoC. Each display controller can drive a separate RGB/LVDS output. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NMark Zhang <markz@nvidia.com> Reviewed-by: NMark Zhang <markz@nvidia.com> Tested-by: NMark Zhang <markz@nvidia.com> Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com> Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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