1. 10 12月, 2016 5 次提交
    • E
      udp: copy skb->truesize in the first cache line · c84d9490
      Eric Dumazet 提交于
      In UDP RX handler, we currently clear skb->dev before skb
      is added to receive queue, because device pointer is no longer
      available once we exit from RCU section.
      
      Since this first cache line is always hot, lets reuse this space
      to store skb->truesize and thus avoid a cache line miss at
      udp_recvmsg()/udp_skb_destructor time while receive queue
      spinlock is held.
      Signed-off-by: NEric Dumazet <edumazet@google.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c84d9490
    • E
      udp: add busylocks in RX path · 4b272750
      Eric Dumazet 提交于
      Idea of busylocks is to let producers grab an extra spinlock
      to relieve pressure on the receive_queue spinlock shared by consumer.
      
      This behavior is requested only once socket receive queue is above
      half occupancy.
      
      Under flood, this means that only one producer can be in line
      trying to acquire the receive_queue spinlock.
      
      These busylock can be allocated on a per cpu manner, instead of a
      per socket one (that would consume a cache line per socket)
      
      This patch considerably improves UDP behavior under stress,
      depending on number of NIC RX queues and/or RPS spread.
      Signed-off-by: NEric Dumazet <edumazet@google.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4b272750
    • D
      Merge branch 'qcom-emac' · d96dac14
      David S. Miller 提交于
      Timur Tabi says:
      
      ====================
      net: qcom/emac: simplify support for different SOCs
      
      On SOCs that have the Qualcomm EMAC network controller, the internal
      PHY block is always different.  Sometimes the differences are small,
      sometimes it might be a completely different IP.  Either way, using version
      numbers to differentiate them and putting all of the init code in one
      file does not scale.
      
      This patchset does two things:  The first breaks up the current code into
      different files, and the second patch adds support for a third SOC, the
      Qualcomm Technologies QDF2400 ARM Server SOC.
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      d96dac14
    • T
      net: qcom/emac: add support for the Qualcomm Technologies QDF2400 · a51f4047
      Timur Tabi 提交于
      The QDF2432 and the QDF2400 have slightly different internal PHYs,
      so there are some programming differences.  Some of the registers in
      the QDF2400 have moved, and some registers require different values
      during initialization.
      
      Because of the differences, and because HIDs are a scare resource,
      the ACPI tables specify the hardware version in an _HRV property.
      Version 1 is the QDF2432, and version 2 is the QDF2400.  Any future
      SOC that has the same internal PHY but different programming
      requirements will be assigned the next available version number.
      Signed-off-by: NTimur Tabi <timur@codeaurora.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a51f4047
    • T
      net: qcom/emac: move phy init code to separate files · 1e88ab6f
      Timur Tabi 提交于
      The internal PHY of the EMAC differs on each SOC, and the list will
      only continue to grow.  By separating the code into individual files,
      we can add support for more SOCs more cleanly.
      
      Note: The internal PHY is also sometimes called the SGMII device.
      
      We also stop referring to the various PHY variations by version number,
      so no more "v2", "v3", etc.  Instead, the devices are named after the
      SOC they are, which is in sync with the device tree property names.
      
      Future patches will probably rearrange more code among the files.
      Signed-off-by: NTimur Tabi <timur@codeaurora.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1e88ab6f
  2. 09 12月, 2016 35 次提交