1. 23 8月, 2016 1 次提交
  2. 20 8月, 2016 3 次提交
  3. 31 7月, 2016 1 次提交
  4. 10 6月, 2016 3 次提交
  5. 09 6月, 2016 1 次提交
  6. 05 6月, 2016 1 次提交
  7. 12 5月, 2016 1 次提交
  8. 18 4月, 2016 1 次提交
  9. 14 4月, 2016 4 次提交
  10. 09 4月, 2016 2 次提交
  11. 15 3月, 2016 2 次提交
  12. 24 2月, 2016 1 次提交
  13. 27 10月, 2015 2 次提交
  14. 09 9月, 2015 1 次提交
    • F
      net: dsa: bcm_sf2: Fix ageing conditions and operation · 39797a27
      Florian Fainelli 提交于
      The comparison check between cur_hw_state and hw_state is currently
      invalid because cur_hw_state is right shifted by G_MISTP_SHIFT, while
      hw_state is not, so we end-up comparing bits 2:0 with bits 7:5, which is
      going to cause an additional aging to occur. Fix this by not shifting
      cur_hw_state while reading it, but instead, mask the value with the
      appropriately shitfted bitmask.
      
      The other problem with the fast-ageing process is that we did not set
      the EN_AGE_DYNAMIC bit to request the ageing to occur for dynamically
      learned MAC addresses. Finally, write back 0 to the FAST_AGE_CTRL
      register to avoid leaving spurious bits sets from one operation to the
      other.
      
      Fixes: 12f460f2 ("net: dsa: bcm_sf2: add HW bridging support")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      39797a27
  15. 22 7月, 2015 1 次提交
    • F
      net: dsa: bcm_sf2: Do not override speed settings · d2eac98f
      Florian Fainelli 提交于
      The SF2 driver currently overrides speed settings for its port
      configured using a fixed PHY, this is both unnecessary and incorrect,
      because we keep feedback to the hardware parameters that we read from
      the PHY device, which in the case of a fixed PHY cannot possibly change
      speed.
      
      This is a required change to allow the fixed PHY code to allow
      registering a PHY with a link configured as DOWN by default and avoid
      some sort of circular dependency where we require the link_update
      callback to run to program the hardware, and we then utilize the fixed
      PHY parameters to program the hardware with the same settings.
      
      Fixes: 246d7f77 ("net: dsa: add Broadcom SF2 switch driver")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      d2eac98f
  16. 21 7月, 2015 1 次提交
    • F
      net: dsa: bcm_sf2: do not use indirect reads and writes for 7445E0 · b8c6cd1d
      Florian Fainelli 提交于
      7445E0 contains an ECO which disconnected the internal SF2 pseudo-PHY which was
      known to conflict with the external pseudo-PHY of BCM53125 switches. This
      motivated the need to utilize the internal SF2 MDIO controller via indirect
      register reads/writes to control external Broadcom switches due to this address
      conflict (both responded at address 30d).
      
      For 7445E0, the internal pseudo-PHY of the SF2 switch got disconnected, and as
      a consequence this prevents the internal SF2 MDIO bus controller from reading
      data (reads back everything as 0) since the MDI line is tied low.
      
      Fix this by making the indirect register reads and writes conditional to
      7445D0, on 7445E0 we can utilize the SWITCH_MDIO controller (backed by
      mdio-unimac and not the DSA created slave MII bus).
      
      We utilize of_machine_is_compatible() here since this is the only way for use
      to differentiate between these two chips in a way that does not violate layers
      or becomes (too) vendor-specific.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b8c6cd1d
  17. 11 6月, 2015 1 次提交
  18. 18 5月, 2015 1 次提交
    • F
      net: dsa: bcm_sf2: properly propagate carrier down state for MoCA · 4ab7f913
      Florian Fainelli 提交于
      MoCA interfaces require the use of an user-space daemon (mocad) which
      will typically use cmd->autoneg to force the link. This is causing other
      network manager applications not to get proper carrier down
      notifications because of the following sequence of events:
      
      - link down interrupt is received, link is set to 0 by the interrupt
        handler
      - fixed_link update callback runs and updates the BMSR register
        accordingly
      - PHY library polls the PHY for link status, sees the link is down,
        proceeds with reporting that
      - mocad gets notified of the link state and call phy_ethtool_sset()
        with cmd->autoneg set to the link status (0)
      - phy_start_aneg() is called at the end of phy_ethtool_sset() and sets
        the PHY state to PHY_FORCING
      
      Just make sure we notify the interface carrier appropriately when we
      detect that the link is down in our fixed_link update callback. This is
      made local to the bcm_sf2 driver as the PHY library does the right thing
      in any case. This is similar to the GENET change introduced in
      54d7c01d ("net: bcmgenet: enable MoCA
      link state change detection").
      
      Fixes: 246d7f77 ("net: dsa: add Broadcom SF2 switch driver")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4ab7f913
  19. 26 2月, 2015 1 次提交
    • F
      net: dsa: bcm_sf2: add HW bridging support · 12f460f2
      Florian Fainelli 提交于
      Implement the bridge join, leave and set_stp callbacks by making that
      we do the following:
      
      - when a port joins the bridge, all existing ports in the bridge get
        their VLAN control register updated with that joining port
      - the joining port is including all existing bridge ports in its own
        VLAN control register
      
      The leave operation is fairly similar, special care must be taken to
      make sure that port leaving the bridging is not removing itself from its
      own VLAN control register.
      
      Since the various BR_* states apply directly to our HW semantics, we
      just need to translate these constants into their corresponding HW
      settings, and voila!
      
      We make sure to trigger a fast-ageing process for ports that are
      joining/leaving the bridge and transition from incompatible states, this
      is equivalent to triggering an ARL flush for that port.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      12f460f2
  20. 08 2月, 2015 2 次提交
  21. 26 1月, 2015 1 次提交
  22. 12 12月, 2014 1 次提交
  23. 27 11月, 2014 2 次提交
  24. 29 9月, 2014 3 次提交
  25. 23 9月, 2014 2 次提交