- 09 5月, 2014 2 次提交
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由 Heiko Stübner 提交于
Introduce the syscons for grf and pmu and deprecate the previous register areas. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NMax Schwarz <max.schwarz@online.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Heiko Stübner 提交于
Deprecate secondary register area for rk3188 pulls. Instead use big enough initial mapping of grf registers to catch all. The now deprecated register is still supported though. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NMax Schwarz <max.schwarz@online.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 10月, 2013 1 次提交
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由 Heiko Stübner 提交于
Besides the pull registers sitting in a separate place, the rk3188 also has the peculiarity that the pull registers of the first bank are split and the first half is sitting in the register space of the pmu. Therefore this adds a special bank-type for the first bank, to handle the two register sources. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 6月, 2013 1 次提交
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由 Heiko Stübner 提交于
This driver adds support the Cortex-A9 based SoCs from Rockchip, so at least the RK2928, RK3066 (a and b) and RK3188. Earlier Rockchip SoCs seem to use similar mechanics for gpio handling so should be supportable with relative small changes. Pull handling on the rk3188 is currently a stub, due to it being a bit different to the earlier SoCs. Pinmuxing as well as gpio (and interrupt-) handling tested on a rk3066a based machine. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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