1. 28 5月, 2019 1 次提交
    • V
      drm/i915: Make sure we have enough memory bandwidth on ICL · c457d9cf
      Ville Syrjälä 提交于
      ICL has so many planes that it can easily exceed the maximum
      effective memory bandwidth of the system. We must therefore check
      that we don't exceed that limit.
      
      The algorithm is very magic number heavy and lacks sufficient
      explanation for now. We also have no sane way to query the
      memory clock and timings, so we must rely on a combination of
      raw readout from the memory controller and hardcoded assumptions.
      The memory controller values obviously change as the system
      jumps between the different SAGV points, so we try to stabilize
      it first by disabling SAGV for the duration of the readout.
      
      The utilized bandwidth is tracked via a device wide atomic
      private object. That is actually not robust because we can't
      afford to enforce strict global ordering between the pipes.
      Thus I think I'll need to change this to simply chop up the
      available bandwidth between all the active pipes. Each pipe
      can then do whatever it wants as long as it doesn't exceed
      its budget. That scheme will also require that we assume that
      any number of planes could be active at any time.
      
      TODO: make it robust and deal with all the open questions
      
      v2: Sleep longer after disabling SAGV
      v3: Poll for the dclk to get raised (seen it take 250ms!)
          If the system has 2133MT/s memory then we pointlessly
          wait one full second :(
      v4: Use the new pcode interface to get the qgv points rather
          that using hardcoded numbers
      v5: Move the pcode stuff into intel_bw.c (Matt)
          s/intel_sagv_info/intel_qgv_info/
          Do the NV12/P010 as per spec for now (Matt)
          s/IS_ICELAKE/IS_GEN11/
      v6: Ignore bandwidth limits if the pcode query fails
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      Acked-by: NClint Taylor <Clinton.A.Taylor@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190524153614.32410-1-ville.syrjala@linux.intel.com
      c457d9cf
  2. 08 4月, 2019 3 次提交
  3. 05 3月, 2019 1 次提交
  4. 16 2月, 2019 1 次提交
  5. 08 2月, 2019 2 次提交
  6. 26 1月, 2019 1 次提交
  7. 17 1月, 2019 1 次提交
  8. 09 1月, 2019 1 次提交
  9. 29 11月, 2018 3 次提交
  10. 15 11月, 2018 1 次提交
  11. 24 10月, 2018 1 次提交
    • M
      drm/i915/gen11: Link nv12 Y and UV planes in the atomic state, v5. · 1ab554b0
      Maarten Lankhorst 提交于
      To make NV12 working on icl, we need to update 2 planes simultaneously.
      I've chosen to do this in the CRTC step after plane validation is done,
      so we know what planes are (in)visible. The linked Y plane will get
      updated in intel_plane_update_planes_on_crtc(), by the call to
      update_slave, which gets the master's plane_state as argument.
      
      The link requires both planes for atomic_update to work,
      so make sure skl_ddb_add_affected_planes() adds both states.
      
      Changes since v1:
      - Introduce icl_is_nv12_y_plane(), instead of hardcoding sprite numbers.
      - Put all the state updating login in intel_plane_atomic_check_with_state().
      - Clean up changes in intel_plane_atomic_check().
      Changes since v2:
      - Fix intel_atomic_get_old_plane_state() to actually return old state.
      - Move visibility changes to preparation patch.
      - Only try to find a Y plane on gen11, earlier platforms only require
        a single plane.
      Changes since v3:
      - Fix checkpatch warning about to_intel_crtc() usage.
      - Add affected planes from icl_add_linked_planes() before check_planes(),
        it's a cleaner way to do this. (Ville)
      Changes since v4:
      - Clear plane links in icl_check_nv12_planes() for clarity.
      - Only pass crtc_state to icl_check_nv12_planes().
      - Use for_each_new_intel_plane_in_state() in icl_check_nv12_planes.
      - Rename aux to linked. (Ville)
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20181022135152.15324-1-maarten.lankhorst@linux.intel.com
      [mlankhorst: Change bool slave to u32, to satisfy checkpatch]
      [mlankhorst: Add WARN_ON's based on Ville's suggestion]
      1ab554b0
  12. 08 10月, 2018 1 次提交
  13. 22 9月, 2018 2 次提交
  14. 12 9月, 2018 2 次提交
  15. 29 8月, 2018 2 次提交
  16. 19 6月, 2018 1 次提交
  17. 12 6月, 2018 1 次提交
  18. 11 5月, 2018 1 次提交
  19. 21 2月, 2018 1 次提交
    • C
      drm/i915: Move the policy for placement of the GGTT vma into the caller · 5935485f
      Chris Wilson 提交于
      Currently we make the unilateral decision inside
      i915_gem_object_pin_to_display() where the VMA should resided (inside
      the fence and mappable region or above?). This is not our decision to
      make as it impacts on how the display engine can use the resulting
      scanout object, and it would rather instruct us where to place the VMA so
      that it can enable the features it wants. As such, make the pin flags an
      argument to i915_gem_object_pin_to_display() and control them from
      intel_pin_and_fence_fb_obj()
      
      Whilst taking control of the mapping for ourselves, start tracking how
      we use it to avoid trying to free a fence we never claimed:
      
      <3>[  227.151869] GEM_BUG_ON(vma->fence->pin_count <= 0)
      <4>[  227.152064] ------------[ cut here ]------------
      <2>[  227.152068] kernel BUG at drivers/gpu/drm/i915/i915_vma.h:391!
      <4>[  227.152084] invalid opcode: 0000 [#1] PREEMPT SMP KASAN PTI
      <0>[  227.152092] Dumping ftrace buffer:
      <0>[  227.152099]    (ftrace buffer empty)
      <4>[  227.152102] Modules linked in: i915 snd_hda_codec_analog snd_hda_codec_generic coretemp snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me mei prime_numbers
      <4>[  227.152131] CPU: 1 PID: 1587 Comm: kworker/u16:49 Tainted: G     U           4.16.0-rc1-gbab67b2f6177-kasan_7+ #1
      <4>[  227.152134] Hardware name: Dell Inc. OptiPlex 755                 /0PU052, BIOS A08 02/19/2008
      <4>[  227.152236] Workqueue: events_unbound intel_atomic_commit_work [i915]
      <4>[  227.152292] RIP: 0010:intel_unpin_fb_vma+0x23a/0x2a0 [i915]
      <4>[  227.152295] RSP: 0018:ffff88005aad7b68 EFLAGS: 00010286
      <4>[  227.152300] RAX: 0000000000000026 RBX: ffff88005c359580 RCX: 0000000000000000
      <4>[  227.152304] RDX: 0000000000000026 RSI: ffffffff8707d840 RDI: ffffed000b55af63
      <4>[  227.152307] RBP: ffff880056817e58 R08: 0000000000000001 R09: 0000000000000000
      <4>[  227.152311] R10: ffff88005aad7b88 R11: 0000000000000000 R12: ffff8800568184d0
      <4>[  227.152314] R13: ffff880065b5ab08 R14: 0000000000000000 R15: dffffc0000000000
      <4>[  227.152318] FS:  0000000000000000(0000) GS:ffff88006ac40000(0000) knlGS:0000000000000000
      <4>[  227.152322] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      <4>[  227.152325] CR2: 00007f5fb25550a8 CR3: 0000000068c78000 CR4: 00000000000006e0
      <4>[  227.152328] Call Trace:
      <4>[  227.152385]  intel_cleanup_plane_fb+0x6b/0xd0 [i915]
      <4>[  227.152395]  drm_atomic_helper_cleanup_planes+0x166/0x280
      <4>[  227.152452]  intel_atomic_commit_tail+0x159d/0x3380 [i915]
      <4>[  227.152463]  ? process_one_work+0x66e/0x1460
      <4>[  227.152516]  ? skl_update_crtcs+0x9c0/0x9c0 [i915]
      <4>[  227.152523]  ? lock_acquire+0x13d/0x390
      <4>[  227.152527]  ? lock_acquire+0x13d/0x390
      <4>[  227.152534]  process_one_work+0x71a/0x1460
      <4>[  227.152540]  ? __schedule+0x815/0x1e20
      <4>[  227.152547]  ? pwq_dec_nr_in_flight+0x2b0/0x2b0
      <4>[  227.152553]  ? _raw_spin_lock_irq+0xa/0x40
      <4>[  227.152559]  worker_thread+0xdf/0xf60
      <4>[  227.152569]  ? process_one_work+0x1460/0x1460
      <4>[  227.152573]  kthread+0x2cf/0x3c0
      <4>[  227.152578]  ? _kthread_create_on_node+0xa0/0xa0
      <4>[  227.152583]  ret_from_fork+0x3a/0x50
      <4>[  227.152591] Code: c6 00 11 86 c0 48 c7 c7 e0 bd 85 c0 e8 60 e7 a9 c4 0f ff e9 1f fe ff ff 48 c7 c6 40 10 86 c0 48 c7 c7 e0 ca 85 c0 e8 2b 95 bd c4 <0f> 0b 48 89 ef e8 4c 44 e8 c4 e9 ef fd ff ff e8 42 44 e8 c4 e9
      <1>[  227.152720] RIP: intel_unpin_fb_vma+0x23a/0x2a0 [i915] RSP: ffff88005aad7b68
      
      v2: i915_vma_pin_fence() is a no-op if a fence isn't required, so check
      vma->fence as well.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180220134208.24988-2-chris@chris-wilson.co.uk
      5935485f
  20. 06 2月, 2018 1 次提交
  21. 23 1月, 2018 1 次提交
  22. 01 9月, 2017 1 次提交
  23. 04 7月, 2017 1 次提交
  24. 22 5月, 2017 1 次提交
  25. 11 5月, 2017 1 次提交
  26. 10 5月, 2017 1 次提交
  27. 03 3月, 2017 2 次提交
  28. 01 2月, 2017 1 次提交
  29. 19 1月, 2017 1 次提交
  30. 20 12月, 2016 1 次提交
  31. 15 12月, 2016 1 次提交
    • V
      drm: Nuke fb->pixel_format · 438b74a5
      Ville Syrjälä 提交于
      Replace uses of fb->pixel_format with fb->format->format.
      Less duplicated information is a good thing.
      
      Note that coccinelle failed to eliminate the
      "/* fourcc format */" comment from drm_framebuffer.h, so I had
      to do that part manually.
      
      @@
      struct drm_framebuffer *FB;
      expression E;
      @@
       drm_helper_mode_fill_fb_struct(...) {
      	...
      -	FB->pixel_format = E;
      	...
       }
      
      @@
      struct drm_framebuffer *FB;
      expression E;
      @@
       i9xx_get_initial_plane_config(...) {
      	...
      -	FB->pixel_format = E;
      	...
       }
      
      @@
      struct drm_framebuffer *FB;
      expression E;
      @@
       ironlake_get_initial_plane_config(...) {
      	...
      -	FB->pixel_format = E;
      	...
       }
      
      @@
      struct drm_framebuffer *FB;
      expression E;
      @@
       skylake_get_initial_plane_config(...) {
      	...
      -	FB->pixel_format = E;
      	...
       }
      
      @@
      struct drm_framebuffer *a;
      struct drm_framebuffer b;
      @@
      (
      - a->pixel_format
      + a->format->format
      |
      - b.pixel_format
      + b.format->format
      )
      
      @@
      struct drm_plane_state *a;
      struct drm_plane_state b;
      @@
      (
      - a->fb->pixel_format
      + a->fb->format->format
      |
      - b.fb->pixel_format
      + b.fb->format->format
      )
      
      @@
      struct drm_crtc *CRTC;
      @@
      (
      - CRTC->primary->fb->pixel_format
      + CRTC->primary->fb->format->format
      |
      - CRTC->primary->state->fb->pixel_format
      + CRTC->primary->state->fb->format->format
      )
      
      @@
      struct drm_mode_set *set;
      @@
      (
      - set->fb->pixel_format
      + set->fb->format->format
      |
      - set->crtc->primary->fb->pixel_format
      + set->crtc->primary->fb->format->format
      )
      
      @@
      @@
       struct drm_framebuffer {
      	 ...
      -	 uint32_t pixel_format;
      	 ...
       };
      
      v2: Fix commit message (Laurent)
          Rebase due to earlier removal of many fb->pixel_format uses,
          including the 'fb->format = drm_format_info(fb->format->format);'
          snafu
      v3: Adjusted the semantic patch a bit and regenerated due to code
          changes
      
      Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
      Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1481751175-18463-1-git-send-email-ville.syrjala@linux.intel.com
      438b74a5