We reserve the 3.75GB - 4GB region of PCIe address space for device to
device transfers, making the corresponding physical memory under
direct mapping unavailable for DMA.

To allow for PCIe DMA to all physical memory we map this chunk of
physical memory with BAR1.  Because of the resulting discontinuity in
the mapping function, we remove a page of memory at each end of the
range so multi-page DMA buffers can never be allocated that span the
range.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1535/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

MSI-X interrupts are not supported yet for Octeon, return error if
MSI-X interrupts are requested by driver so that the driver will fall
back to use MSI interrupts.
Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com>
To: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: https://patchwork.linux-mips.org/patch/1506/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1507/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The use of handle_percpu_irq() is not really what we want for MSI, use
handle_simple_irq() instead.  This is probably the prototypical case
for using handle_simple_irq(), because all the MSIs are dispatched from
the root interrupt service routine.

Also since the base IRQ is not shared, don't pass IRQF_SHARED.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1488/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

MSI IRQ numbers are allocated dynamically, so there is no reason to
have all these static definitions.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1487/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Put all the MSI code in one place (msi-octeon.c).  This simplifies
octeon-irq.c and gets rid of some ugly #ifdefs
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1484/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

arch/mips/pci/ops-titan-ht.c:36: ERROR: "foo * bar" should be "foo *bar"
arch/mips/pci/ops-titan-ht.c:68: ERROR: "foo * bar" should be "foo *bar"
Signed-off-by: NAndrea Gelmini <andrea.gelmini@gelma.net>
Cc: Tejun Heo <tj@kernel.org>
Cc: Christoph Lameter <cl@linux-foundation.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1277/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Several MIPS platforms don't set pci_controller::io_map_base for their
PCI bridges.  This results in a panic in pci_iomap().  (The panic is
conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI
MIPS systems.)
Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
Cc: linux-mips@linux-mips.org
Cc: Martin Michlmayr <tbm@cyrius.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: 584784@bugs.debian.org
Patchwork: https://patchwork.linux-mips.org/patch/1377/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

| arch/mips/pci/pci-sb1250.c: In function sb1250_pcibios_init:
| arch/mips/pci/pci-sb1250.c:257: warning: assignment makes integer from pointer without a cast
| arch/mips/pci/pci-sb1250.c:285: error: MAX_NR_CONSOLES undeclared (first use in this function)
| arch/mips/pci/pci-sb1250.c:285: error: (Each undeclared identifier is reported only once
| arch/mips/pci/pci-sb1250.c:285: error: for each function it appears in.)
Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1136/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

On Lemote 2F CS5536 MSRs are accessed through a index / data register pair.
The access sequence must be protected by a spinlock to be atomic.

Without this rebooting in fs2f_reboot() may fail.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1058/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: NTejun Heo <tj@kernel.org>
Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>

The GT-64111 PCI host bridge has no address translation mechanism, so
it can't generate legacy port accesses.  This quirk fixes legacy device
port resources to contain the bus addresses actually generated by the
GT-64111.

I think this is the approach Ben Herrenschmidt suggested long ago:
    http://marc.info/?l=linux-kernel&m=119733290624544&w=2

This allows us to remove the IORESOURCE_PCI_FIXED hack from
pcibios_fixup_device_resources(), which converts bus addresses to CPU
addresses.  IORESOURCE_PCI_FIXED denotes resources that can't be moved;
it has nothing to do with converting bus to CPU addresses.
Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-mips@linux-mips.org
Tested-by: NYoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/998/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Recent git versions now warn about those and they've always been a bit of
an annoyance.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
To: linux-mips@linux-mips.org
To: Andrew Morton <akpm@linux-foundation.org>
To: LKML <linux-kernel@vger.kernel.org>
Patchwork: http://patchwork.linux-mips.org/patch/860/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/829/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Without this patch, when copying large amounts of data between the USB
storage devices and the hard disk, the USB device will disconnect
regularly.
Signed-off-by: NHu Hongbing <huhb@lemote.com>
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/822/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

The platform has never been fully merged 
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Acked-by: NWim Van Sebroeck <wim@iguana.be>

PCI support for the Fuloong 2E and Lemote Loongson 2F family machines is
mostly identical with the exception of CS5536 support.

Rename ops-fuloong2e.c to ops-loongson2.c then add the CS5536 support to
share most of the source code among Loongson machines.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not
identical with it.  To avoid influencing the original bonito64 support and
make the loongson support more maintainable, it's better to separate the
Bonito64 code from the Loongson code.

This also prepares the kernel for the coming Loongson 2f machines family
support.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com,
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Produce an error if request_irq() fails.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Cc: "Ithamar R. Adema" <ithamar.adema@team-embedded.nl>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NMaxime Bizon <mbizon@freebox.fr>
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

To make source code of loongson sharable to the machines(such as gdium)
made by the other companies, we rename arch/mips/lemote to
arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e
to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to
FULOONG2E to make it distinguishable to the future FULOONG2F.  and also,
some other relative tuning is needed.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

With the help of script/checkpatch.pl, i have cleaned up the coding
style.

1. remove un-needed header files and tune some comments.
2. remove some un-needed { }

add a new header file loongson.h:

3. move some common header files to loongson.h
4. move some common extern declartions to loongson.h

and this new header file is needed for future loongson2f support.
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Some SiliconImage PCIe SATA controlers are not detected when the bus
numbers differ.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

They tend to get not updated when files are moved around or copied and
lack any obvious use.  While at it zap some only too obvious comments and
as per Shinya's suggestion, add a copyright header to extable.c.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Acked-by: NShinya Kuribayashi <shinya.kuribayashi@necel.com>
Acked-by: NThadeu Lima de Souza Cascardo <cascardo@holoscopio.com>

Move the cavium PCI files to the arch/mips/pci directory.  Also cleanup
comment formatting and code layout.  Code from pci-common.c, was moved
into other files.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NYoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Some of the were relying into smp.h being dragged in by another header
which of course is fragile.  <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The code is rather based on trial-and-error than knowledge. Verified Via
Rhine functionality in PIO as well as MMIO mode.

[Looks sane -- Ralf]
Signed-off-by: NPhil Sutter <n0-1@freewrt.org>
Tested-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use the generic pci_common_swizzle() instead of arch-specific code.

Note that pci_common_swizzle() loops based on dev->bus->self, not
dev->bus->parent as the mips common_swizzle() did.  I think they
are equivalent for this purpose.
Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code.
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Certain X11 servers such as the SIS server will only work if PCI mmap is
implemented.  This patch implements PCI mmap but to be on the same side
so close to a release it only supports uncached mappings so performance
will not be optimal for some uses such as framebuffers.

Thanks to Zhang Le <r0bertz@gentoo.org> for the original report and
testing.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

We'll put all EMMA related headers there in the future.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

- Move EMMA related stuff into arch/mips/emma/Kconfig
- Create CONFIG_SOC_EMMA* to handle more EMMA SoCs effectively
- Rename CONFIG_MARKEINS into CONFIG_NEC_MARKEINS
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

mips/pci/fixup-rc32434.c must #include <asm/mach-rc32434/irq.h>

This patch fixes the following compile error caused by
commit 606a083b
(MIPS: RB532: Cleanup the headers again):

<--  snip  -->

...
  CC      arch/mips/pci/fixup-rc32434.o
arch/mips/pci/fixup-rc32434.c: In function 'pcibios_map_irq':
arch/mips/pci/fixup-rc32434.c:46: error: 'GROUP4_IRQ_BASE' undeclared (first use in this function)
arch/mips/pci/fixup-rc32434.c:46: error: (Each undeclared identifier is reported only once
arch/mips/pci/fixup-rc32434.c:46: error: for each function it appears in.)
make[2]: *** [arch/mips/pci/fixup-rc32434.o] Error 1

<--  snip  -->

A virtually identical patch was also submitted by Yoichi Yuasa
<yoichi_yuasa@tripeaks.co.jp>.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>