- 17 8月, 2015 9 次提交
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由 Ivan T. Ivanov 提交于
There is no reason to use polling for card detection state change when drivers are using dedicated GPIO for this. Don't poll in this case. Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ivan T. Ivanov 提交于
Controller could have BROKEN_CARD_DETECTION quirk set, but drivers could use GPIO to detect card present state. Let, when defined, GPIO take precedence, so drivers could properly detect card state and not use polling. Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ivan T. Ivanov 提交于
Ensure SDCC is working with maximum clock otherwise card detection could be extremely slow, up to 7 seconds. Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org> Reviewed-by: NGeorgi Djakov <georgi.djakov@linaro.org> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
It's excessive to use prefix for the parameters when you do modprobe mmc-block mmcblk.perdev_minors=16 Make this available only for built-in case. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Fabian Frederick 提交于
See Documentation/DMA-API.txt - Part Id Signed-off-by: NFabian Frederick <fabf@skynet.be> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Suneel Garapati 提交于
adding SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,SDHCI_QUIRK2_PRESET_VALUE_BROKEN flags for arasan sdhc. Signed-off-by: NSuneel Garapati <suneel.garapati@xilinx.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Suneel Garapati 提交于
adds quirk for controllers whose clock divider zero is broken, sdhci_set_clock function will incorporate this modification. Signed-off-by: NSuneel Garapati <suneel.garapati@xilinx.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Daniel Mack 提交于
Switch over pxamci to dmaengine. This prepares the devicetree full support of pxamci. This was successfully tested on a PXA3xx board, as well as PXA27x. Signed-off-by: NDaniel Mack <zonque@gmail.com> [adapted to pxa-dma] Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 David Jander 提交于
In the (not so unlikely) case that the mmc controller timeout budget is enough for exactly one erase-group, the simplification of allowing one sector has an enormous performance penalty. We optimize this special case by introducing a flag that prohibits erase-group boundary crossing, so that we can allow trimming more than one sector at a time. Signed-off-by: NDavid Jander <david@protonic.nl> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 24 7月, 2015 12 次提交
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由 Jingju Hou 提交于
pdev->dev.platform_data is not initialized if match is true in function sdhci_pxav3_probe. Just local variable pdata is assigned the return value from function pxav3_get_mmc_pdata(). static int sdhci_pxav3_probe(struct platform_device *pdev) { struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; ... if (match) { ret = mmc_of_parse(host->mmc); if (ret) goto err_of_parse; sdhci_get_of_property(pdev); pdata = pxav3_get_mmc_pdata(dev); } ... } Signed-off-by: NJingju Hou <houjingj@marvell.com> Fixes: b650352d("mmc: sdhci-pxa: Add device tree support") Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
After commit 8d86e4fc ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()"), it's not used anymore. Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com> Reviewed-by: NJohan Derycke <johan.derycke@barco.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
After commit 8d86e4fc ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()"), we do not need those duplicated parsing anymore. Note: fsl,cd-controller is also deleted due to the driver does not support controller card detection anymore after switch to runtime pm. And there's no user of it right now in device tree. wp-gpios is kept because we're still support fsl,wp-controller, so we need a way to check if it's gpio wp or controller wp. Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com> Reviewed-by: NJohan Derycke <johan.derycke@barco.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
Device tree provides option to specify the max freqency with property "max-frequency" in dts and common parse function mmc_of_parse() will parse it and use this value to set host->f_max to tell the MMC core the maxinum frequency the host works. However, current sdhci driver will finally overwrite this value with host->max_clk regardless of the max-frequency property. This patch makes sure not overwrite the max-frequency set from device tree and do basic sanity check. Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com> Reviewed-by: NJohan Derycke <johan.derycke@barco.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
This is an incremental fix of commit e62bd351b("mmc: sdhci-esdhc-imx: Do not break platform data boards"). After commit 8d86e4fc ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()"), we do not need to run the check of boarddata->wp_type/cd_type/max_bus_width again for dt platform since those are already handled by mmc_of_parse(). Current code only exclude the checking of wp_type for dt platform which does not make sense. This patch moves all non dt probe code into one function. Besides, since we only support SD3.0/eMMC HS200 for dt platform, the support_vsel checking and ultra high speed pinctrl state are also merged into sdhci_esdhc_imx_probe_dt. Then we have two separately probe function for dt and non dt type. This can make the driver probe more clearly. Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com> Reviewed-by: NJohan Derycke <johan.derycke@barco.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
Current card detect probe process is that when driver finds a valid ESDHC_CD_GPIO, it will clear the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION which is set by default for all esdhc/usdhc controllers. Then host driver will know there's a valid card detect function. Commit 8d86e4fc ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()") breaks GPIO CD function for dt platform that it will return directly when find ESDHC_CD_GPIO for dt platform which result in the later wrongly to keep SDHCI_QUIRK_BROKEN_CARD_DETECTION for all dt platforms. Then MMC_CAP_NEEDS_POLL will be used instead even there's a valid GPIO card detect. This patch adds back this function and follows the original approach to clear the quirk if find an valid CD GPIO for dt platforms. Fixes: 8d86e4fc ("mmc: sdhci-esdhc-imx: Call mmc_of_parse()") Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com> Reviewed-by: NJohan Derycke <johan.derycke@barco.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Joakim Tjernlund 提交于
Support for 8BIT bus with was added some time ago to sdhci-esdhc but then missed to remove the 8BIT from the reserved bit mask which made 8BIT non functional. Fixes: 66b50a00 ("mmc: esdhc: Add support for 8-bit bus width and..") Signed-off-by: NJoakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Tomas Winkler 提交于
Enclosing mmc_blk_put() is missing in power_ro_lock_show() sysfs handler, let's add it. Fixes: add710ea ("mmc: boot partition ro lock support") Signed-off-by: NTomas Winkler <tomas.winkler@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Geert Uytterhoeven 提交于
If NO_DMA=y: ERROR: "dma_alloc_coherent" [drivers/mmc/host/mtk-sd.ko] undefined! ERROR: "dma_unmap_sg" [drivers/mmc/host/mtk-sd.ko] undefined! ERROR: "dma_map_sg" [drivers/mmc/host/mtk-sd.ko] undefined! ERROR: "dma_free_coherent" [drivers/mmc/host/mtk-sd.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Peng Fan 提交于
We should not call dma_free_coherent if host->adma_table is NULL, otherwise may trigger panic. Fixes: d1e49f77 ("mmc: sdhci: convert ADMA descriptors to a...") Signed-off-by: NPeng Fan <van.freenix@gmail.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Vignesh R 提交于
Sometimes BADA, DEB or CEB error interrupts occur when sd card is unplugged during data transfer. These interrupts are currently ignored by the interrupt handler. But, this results in card not being recognised on subsequent insertion. This is because mmcqd is waiting forever for the data transfer(for which error occurred) to complete. Fix this, by reporting BADA, DEB, CEB errors to mmc-core as -EILSEQ, so that the core can do appropriate handling. Signed-off-by: NVignesh R <vigneshr@ti.com> Tested-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Kishon Vijay Abraham I 提交于
DTO/DCRC errors were not being informed to the mmc core since commit ae4bf788 ("mmc: omap_hsmmc: consolidate error report handling of HSMMC IRQ"). This commit made sure 'end_trans' is never set on DTO/DCRC errors. This is because after this commit 'host->data' is checked after it has been cleared to NULL by omap_hsmmc_dma_cleanup(). Because 'end_trans' is never set, omap_hsmmc_xfer_done() is never invoked making core layer not to be aware of DTO/DCRC errors. Because of this any command invoked after DTO/DCRC error leads to a hang. Fix this by checking for 'host->data' before it is actually cleared. Fixes: ae4bf788 ("mmc: omap_hsmmc: consolidate error report handling of HSMMC IRQ") CC: stable@vger.kernel.org Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NVignesh R <vigneshr@ti.com> Tested-by: NAndreas Fenkart <afenkart@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 18 7月, 2015 1 次提交
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由 Viresh Kumar 提交于
Switch to my kernel.org alias instead of a badly named gmail address, which I rarely use. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 18 6月, 2015 3 次提交
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由 Rabin Vincent 提交于
On systems with CONFIG_PREEMPT=n, under certain circumstances, mmcqd can continuously process requests for several seconds without blocking, triggering the soft lockup watchdog. For example, this can happen if mmcqd runs on the CPU which services the controller's interrupt, and a process on a different CPU continuously writes to the MMC block device. NMI watchdog: BUG: soft lockup - CPU#0 stuck for 22s! [mmcqd/0:664] CPU: 0 PID: 664 Comm: mmcqd/0 Not tainted 4.1.0-rc7+ #4 PC is at _raw_spin_unlock_irqrestore+0x24/0x28 LR is at mmc_start_request+0x104/0x134 ... [<805112a8>] (_raw_spin_unlock_irqrestore) from [<803db664>] (mmc_start_request+0x104/0x134) [<803db664>] (mmc_start_request) from [<803dc008>] (mmc_start_req+0x274/0x394) [<803dc008>] (mmc_start_req) from [<803eb2c4>] (mmc_blk_issue_rw_rq+0xd0/0xb98) [<803eb2c4>] (mmc_blk_issue_rw_rq) from [<803ebe8c>] (mmc_blk_issue_rq+0x100/0x470) [<803ebe8c>] (mmc_blk_issue_rq) from [<803ecab8>] (mmc_queue_thread+0xd0/0x170) [<803ecab8>] (mmc_queue_thread) from [<8003fd14>] (kthread+0xe0/0xfc) [<8003fd14>] (kthread) from [<8000f768>] (ret_from_fork+0x14/0x2c) Fix it by adding a cond_resched() in the request handling loop so that other processes get a chance to run. Signed-off-by: NRabin Vincent <rabin.vincent@axis.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chaotian Jing 提交于
Add PM support for Mediatek MMC driver Save/restore registers when PM Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chaotian Jing 提交于
Add Mediatek MMC driver code Support eMMC/SD/SDIO Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 16 6月, 2015 3 次提交
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由 Ding Wang 提交于
The current handler of MMC_BLK_CMD_ERR in mmc_blk_issue_rw_rq function may cause new coming request permanent missing when the ongoing request (previoulsy started) complete end. The problem scenario is as follows: (1) Request A is ongoing; (2) Request B arrived, and finally mmc_blk_issue_rw_rq() is called; (3) Request A encounters the MMC_BLK_CMD_ERR error; (4) In the error handling of MMC_BLK_CMD_ERR, suppose mmc_blk_cmd_err() end request A completed and return zero. Continue the error handling, suppose mmc_blk_reset() reset device success; (5) Continue the execution, while loop completed because variable ret is zero now; (6) Finally, mmc_blk_issue_rw_rq() return without processing request B. The process related to the missing request may wait that IO request complete forever, possibly crashing the application or hanging the system. Fix this issue by starting new request when reset success. Signed-off-by: NDing Wang <justin.wang@spreadtrum.com> Fixes: 67716327 ("mmc: block: add eMMC hardware reset support") Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Jiri Slaby 提交于
When dma mapping (dma_map_sg) fails in sdhci_pre_dma_transfer, -EINVAL is returned. There are 3 callers of sdhci_pre_dma_transfer: * sdhci_pre_req and sdhci_adma_table_pre: handle negative return * sdhci_prepare_data: handles 0 (error) and "else" (good) only sdhci_prepare_data is therefore broken. When it receives -EINVAL from sdhci_pre_dma_transfer, it assumes 1 sg mapping was mapped. Later, this non-existent mapping with address 0 is kmap'ped and written to: Corrupted low memory at ffff880000001000 (1000 phys) = 22b7d67df2f6d1cf Corrupted low memory at ffff880000001008 (1008 phys) = 63848a5216b7dd95 Corrupted low memory at ffff880000001010 (1010 phys) = 330eb7ddef39e427 Corrupted low memory at ffff880000001018 (1018 phys) = 8017ac7295039bda Corrupted low memory at ffff880000001020 (1020 phys) = 8ce039eac119074f ... So teach sdhci_prepare_data to understand negative return values from sdhci_pre_dma_transfer and disable DMA in that case, as well as for zero. It was introduced in 348487cb (mmc: sdhci: use pipeline mmc requests to improve performance). The commit seems to be suspicious also by assigning host->sg_count both in sdhci_pre_dma_transfer and sdhci_adma_table_pre. Signed-off-by: NJiri Slaby <jslaby@suse.cz> Cc: stable@vger.kernel.org # 4.0+ Fixes: 348487cb Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Vincent Wan 提交于
Change this quirk to apply to AMD Carrizo platform. Signed-off-by: NWan ZongShun <Vincent.Wan@amd.com> Tested-by: NNath, Arindam <Arindam.Nath@amd.com> Tested-by: NRamesh, Ramya <Ramya.Ramesh@amd.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 15 6月, 2015 1 次提交
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由 Fabian Frederick 提交于
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by: NFabian Frederick <fabf@skynet.be> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 12 6月, 2015 1 次提交
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由 Prabu Thangamuthu 提交于
Remove module of dw_mmc driver will hung for eMMC devices if we follow the steps which are listed below, insmod dw_mmc.ko insmod dw_mmc-pci.ko rmmod dw_mmc-pci.ko The root cause for this issue is, dw_mci_remove() will disable all the interrupts by programming 0x0 to INTMASK register then it will call dw_mci_cleanup_slot(). But dw_mci_cleanup_slot() is issuing CMD6 to disable the eMMC boot partition and it is waiting for Command Complete interrupt. Since INTMASK was already cleared by dw_mci_remove(), Command Complete interrupt is not reaching the system. This leads to process hung. Signed-off-by: NPrabu Thangamuthu <prabu.t@synopsys.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 08 6月, 2015 1 次提交
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由 Ulf Hansson 提交于
Commit 3a48edc4 ("mmc: sdhci: Use mmc core regulator infrastucture") changed the behavior for how to assign the ocr_avail mask for the mmc host. More precisely it started to mask the bits instead of assigning them. Restore the behavior, but also make it clear that an OCR mask created from an external regulator overrides the other ones. The OCR mask is determined by one of the following with this priority: 1. Supported ranges of external regulator if one supplies VDD 2. Host OCR mask if set by the driver (based on DT properties) 3. The capabilities reported by the controller itself Fixes: 3a48edc4 ("mmc: sdhci: Use mmc core regulator infrastucture") Cc: Tim Kryger <tim.kryger@gmail.com> Reported-by: NYangbo Lu <yangbo.lu@freescale.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NTim Kryger <tim.kryger@gmail.com>
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- 04 6月, 2015 4 次提交
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由 Jisheng Zhang 提交于
MMC_PM_KEEP_POWER doesn't imply MMC_PM_WAKE_SDIO_IRQ, we should only enable device wake up when MMC_PM_WAKE_SDIO_IRQ is set. And "pm_flags" is the requested pm features, we should not set it in the host driver. At the same time, device wakeup is disabled by default, so there's no need to disable device wakeup explicitly. This patch fixes the warning as following: [ 64.616651] ------------[ cut here ]------------ [ 64.616665] WARNING: CPU: 0 PID: 79 at linux/kernel/irq/manage.c:603 irq_set_irq_wake+0xf0/0x11c() [ 64.616667] Unbalanced IRQ 87 wake disable Signed-off-by: NJisheng Zhang <jszhang@marvell.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Other subsystem buses attach PM domains during probe, but prior calling the driver's ->probe() method. During the removal phase, detaching the PM domain will be done after invoking the driver's ->remove() callback. Convert the SDIO bus to follow this behavior and add error handling. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Since the ->reset() callback is implemented for SD, the ->power_restore() callback has become redundant, let's remove it. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Since the ->reset() callback is implemented for MMC, the ->power_restore() callback has become redundant, let's remove it. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 01 6月, 2015 5 次提交
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由 Eric Anholt 提交于
We're currently using a fixed frequency clock specified in the DT, so enabling is a no-op. However, the RPi firmware-based clocks driver can actually disable unused clocks, so when switching to use it we ended up losing our MMC clock once all devices were probed. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yangbo Lu 提交于
Enable interrupt mode to detect card instead of polling mode for P1020/P4080/P5020/P5040/T1040 by removing the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION. This could improve data transferring performance and avoid the call trace caused by polling card status sometime. Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
The iMX6Q/DL can not support HS200 mode while iMX6SL and iMX6SX can, so introduce a new flag to distinguish them. Signed-off-by: NDong Aisheng <aisheng.dong@freescale.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Dong Aisheng 提交于
The imx6sx usdhc is derived from imx6sl, the difference is minor. imx6sx have the errata ESDHC_FLAG_ERR004536 fixed. So introduce a new compatible string for imx6sx to distinguish them. Signed-off-by: NDong Aisheng <b29396@freescale.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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