1. 13 1月, 2013 1 次提交
    • Y
      PCI: pciehp: Use per-slot workqueues to avoid deadlock · c2be6f93
      Yijing Wang 提交于
      When we have a hotplug-capable PCIe port with a second hotplug-capable
      PCIe port below it, removing the device below the upstream port causes
      a deadlock.
      
      The deadlock happens because we use the pciehp_wq workqueue to run
      pciehp_power_thread(), which uses pciehp_disable_slot() to remove devices
      below the upstream port.  When we remove the downstream PCIe port, we call
      pciehp_remove(), the pciehp driver's .remove() method.  That calls
      flush_workqueue(pciehp_wq), which deadlocks because the
      pciehp_power_thread() work item is still running.
      
      This patch avoids the deadlock by creating a workqueue for every PCIe port
      and removing the single shared workqueue.
      
      Here's the call path that leads to the deadlock:
      
        pciehp_queue_pushbutton_work
          queue_work(pciehp_wq)                   # queue pciehp_power_thread
          ...
      
        pciehp_power_thread
          pciehp_disable_slot
            remove_board
      	pciehp_unconfigure_device
      	  pci_stop_and_remove_bus_device
      	    ...
      	      pciehp_remove                 # pciehp driver .remove method
      		pciehp_release_ctrl
      		  pcie_cleanup_slot
      		    flush_workqueue(pciehp_wq)
      
      This is fairly urgent because it can be caused by simply unplugging a
      Thunderbolt adapter, as reported by Daniel below.
      
      [bhelgaas: changelog]
      Reference: http://lkml.kernel.org/r/CAMVG2ssiRgcTD1bej2tkUUfsWmpL5eNtPcNif9va2-Gzb2u8nQ@mail.gmail.comReported-and-tested-by: NDaniel J Blueman <daniel@quora.org>
      Reviewed-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NYijing Wang <wangyijing@huawei.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: stable@vger.kernel.org
      c2be6f93
  2. 13 7月, 2012 1 次提交
  3. 13 1月, 2012 1 次提交
  4. 07 1月, 2012 1 次提交
  5. 06 12月, 2011 1 次提交
  6. 18 10月, 2010 1 次提交
    • T
      pciehp: update workqueue usage · a827ea30
      Tejun Heo 提交于
      * Rename pciehp_wq to pciehp_ordered_wq and add non-ordered pciehp_wq
        which is used instead of the system workqueue.  This is to remove
        the use of flush_scheduled_work() which is deprecated and scheduled
        for removal.
      
      * With cmwq in place, there's no point in creating workqueues lazily.
        Create both pciehp_wq and pciehp_ordered_wq upfront.
      
      * Include workqueue.h from pciehp.h.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      a827ea30
  7. 26 8月, 2010 1 次提交
  8. 25 8月, 2010 1 次提交
    • R
      PCI: PCIe: Ask BIOS for control of all native services at once · 28eb5f27
      Rafael J. Wysocki 提交于
      After commit 852972ac (ACPI: Disable
      ASPM if the platform won't provide _OSC control for PCIe) control of
      the PCIe Capability Structure is unconditionally requested by
      acpi_pci_root_add(), which in principle may cause problems to
      happen in two ways.  First, the BIOS may refuse to give control of
      the PCIe Capability Structure if it is not asked for any of the
      _OSC features depending on it at the same time.  Second, the BIOS may
      assume that control of the _OSC features depending on the PCIe
      Capability Structure will be requested in the future and may behave
      incorrectly if that doesn't happen.  For this reason, control of
      the PCIe Capability Structure should always be requested along with
      control of any other _OSC features that may depend on it (ie. PCIe
      native PME, PCIe native hot-plug, PCIe AER).
      
      Rework the PCIe port driver so that (1) it checks which native PCIe
      port services can be enabled, according to the BIOS, and (2) it
      requests control of all these services simultaneously.  In
      particular, this causes pcie_portdrv_probe() to fail if the BIOS
      refuses to grant control of the PCIe Capability Structure, which
      means that no native PCIe port services can be enabled for the PCIe
      Root Complex the given port belongs to.  If that happens, ASPM is
      disabled to avoid problems with mishandling it by the part of the
      PCIe hierarchy for which control of the PCIe Capability Structure
      has not been received.
      
      Make it possible to override this behavior using 'pcie_ports=native'
      (use the PCIe native services regardless of the BIOS response to the
      control request), or 'pcie_ports=compat' (do not use the PCIe native
      services at all).
      
      Accordingly, rework the existing PCIe port service drivers so that
      they don't request control of the services directly.
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      28eb5f27
  9. 25 11月, 2009 1 次提交
  10. 18 9月, 2009 15 次提交
  11. 15 9月, 2009 2 次提交
  12. 17 6月, 2009 1 次提交
    • K
      PCI: Remove untested Electromechanical Interlock (EMI) support in pciehp. · bd3d99c1
      Kenji Kaneshige 提交于
      The EMI support in pciehp is obviously broken. It is implemented using
      struct hotplug_slot_attribute, but sysfs_ops for pci_slot_ktype is NOT
      for struct hotplug_slot_attribute, but for struct pci_slot_attribute.
      This bug had been there for a long time, maybe it was introduced when
      PCI slot framework was introduced. The reason why this bug didn't
      cause any problem is maybe the EMI support is not tested at all
      because of lack of test environment.
      
      As described above, the EMI support in pciehp seems not to be tested
      at all. So this patch removes EMI support from pciehp, instead of
      fixing the bug.
      Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      bd3d99c1
  13. 20 3月, 2009 3 次提交
  14. 25 2月, 2009 1 次提交
  15. 08 1月, 2009 1 次提交
    • K
      PCI: pciehp: add ACPI based slot detection · c9ffa5a5
      Kenji Kaneshige 提交于
      There is a problem that some non hot-pluggable PCIe slots are detected
      as hot-pluggable by pciehp on some platforms. The immediate cause of
      this problem is that hot-plug capable bit in the Slot Capabilities
      register is set even for non hot-pluggable slots on those platforms.
      It seems a BIOS/hardware problem, but we need workaround about that.
      
      Some of those platforms define hot-pluggable PCIe slots on ACPI
      namespace properly, while hot-plug capable bit in the Slot
      Capabilities register is set improperly. So using ACPI namespace
      information in pciehp to detect PCIe hot-pluggable slots would be a
      workaround.
      
      This patch adds 'pciehp_detect_mode' module option. When 'acpi' is
      specified, pciehp uses ACPI namespace information to detect PCIe
      hot-pluggable slots.
      Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      c9ffa5a5
  16. 31 12月, 2008 1 次提交
  17. 24 10月, 2008 1 次提交
  18. 23 10月, 2008 2 次提交
  19. 21 10月, 2008 2 次提交
  20. 22 8月, 2008 1 次提交
    • A
      PCI: pciehp: Rename duplicate slot name N as N-1, N-2, N-M... · 167e782e
      Alex Chiang 提交于
      Commit 3800345f (pciehp: fix slot name)
      introduces the pciehp_slot_with_bus module parameter, which was intended
      to help work around broken firmware that assigns the same name to multiple
      slots.
      
      Commit 9e4f2e8d (pciehp: add message about
      pciehp_slot_with_bus option) tells the user to use the above parameter
      in the event of a name collision.
      
      This approach is sub-optimal because it requires too much work from
      the user.
      
      Instead, let's rename the slot on behalf of the user. If firmware
      assigns the name N to multiple slots, then:
      
      	The first registered slot is assigned N
      	The second registered slot is assigned N-1
      	The third registered slot is assigned N-2
      	The Mth registered slot becomes N-M
      
      In the event we overflow the slot->name parameter, we report an
      error to the user.
      
      This is a temporary fix until the entire PCI core can be reworked
      such that individual drivers no longer have to manage their own
      slot names.
      Tested-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Acked-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NAlex Chiang <achiang@hp.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      167e782e
  21. 16 7月, 2008 1 次提交