- 15 8月, 2015 5 次提交
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由 John Ogness 提交于
That bitfield is modified by read + or + write operation. If someone sets any of the other two bits it might render the lock useless. While at it, remove other bitfields as well to avoid more such errors. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NJohn Ogness <john.ogness@linutronix.de> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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The 8250-omap driver requires the DMA-engine driver to support the pause command in order to properly turn off programmed RX transfer before the driver stars manually reading from the FIFO. The lacking support of the requirement has been discovered recently. In order to stay safe here we disable RX-DMA completly on probe. The rx_dma_broken assignment on probe could be removed once we working pause function in omap-dma. Cc: <stable@vger.kernel.org> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Qipeng Zha 提交于
Since the serial core is informed that this device is doing automatic flow control, it is not necessary to alter CTS and DCTS of the MSR as the core no longer attempts stop the port in uart_handle_cts_change(). Signed-off-by: NHuiquan Zhong <huiquan.zhong@intel.com> Signed-off-by: NQipeng Zha <qipeng.zha@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Maciej S. Szmigiero 提交于
This way this device can be used with irtty-sir - at least on Toshiba Satellite A20-S103 it is not configured by default and needs PNP activation before it starts to respond on I/O ports. This device has actually its own driver (ali-ircc), but this driver seems to be non-functional for a very long time (see http://permalink.gmane.org/gmane.linux.irda.general/484 http://permalink.gmane.org/gmane.network.protocols.obex.openobex.user/943 https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=535070 ). Signed-off-by: NMaciej Szmigiero <mail@maciej.szmigiero.name> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Maciej S. Szmigiero 提交于
SMSC IrCC SIR/FIR port should not be bound to by (legacy) serial driver so its own driver (smsc-ircc2) can bind to it. Signed-off-by: NMaciej Szmigiero <mail@maciej.szmigiero.name> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 06 8月, 2015 1 次提交
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由 Peter Hung 提交于
Fix RS232/485 mode incorrect setting after S3/S4 resume for F81504/508/512 We had add RS232/485 RTS control with fecf27a3. But when it resume from S3/S4, the mode register 0x40 + 0x08 * idx + 7 will rewrite to 0x01 (RS232 mode). This patch will modify 2 sections. One is pci_fintek_init(), if it called when first init, it will write mode register with 0x01. If it called from S3/S4 resume, it's will get the relative port data and pass it to pci_fintek_rs485_config() with NULL rs485 parameter. The another modification is in pci_fintek_rs485_config(). It'll re-apply old configuration when the parameter rs485 is NULL. Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 05 8月, 2015 2 次提交
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由 Adam Lee 提交于
Pericom PI7C9X795[1248] are Uno/Dual/Quad/Octal UART devices, this patch enables them, also defines PCI_VENDOR_ID_PERICOM here. Signed-off-by: NAdam Lee <adam.lee@canonical.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Qipeng Zha 提交于
According to DesignWare 8250 spec, if auto flow control mode is enabled, a change in CTS does not cause an interrupt, so sw-assisted CTS flow control mode will not work properly. There reported an GPS firmware download failure issue, and we verified the root cause is, the default sw-assisted CTS flow control mode can not work properly since no interrupt when got CTS signal. This patch is to enable auto CTS mode by defaut if CRTSCTS is enable for DesignWare 8250 controller. Signed-off-by: NHuiquan Zhong <huiquan.zhong@intel.com> Signed-off-by: NQipeng Zha <qipeng.zha@intel.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 8月, 2015 2 次提交
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由 Masahiro Yamada 提交于
If serial8250_register_8250_port() fails, disable and unprepare the clock before exiting. Fixes: 1a8d2903 ("serial: 8250_uniphier: add UniPhier serial driver") Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Peter Hung 提交于
Add RS485 control for Fintek F81504/508/512 F81504/508/512 can control their RTS with H/W mode. PCI configuration space for each port is 0x40 + idx * 8 + 7. When it set with 0x01, it's configured with RS232 mode. RTS is controlled by MCR. When it set with 0x11, it's configured with RS485 mode. RTS is controlled by H/W, RTS low with idle & RX, high with TX. When it set with 0x31, it's configured with RS485 mode. RTS is controlled by H/W, RTS high with idle & RX, low with TX. We will force 0x01 on pci_fintek_setup(). Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 24 7月, 2015 16 次提交
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由 Krzysztof Kozlowski 提交于
platform_driver does not need to set an owner because platform_driver_register() will set it. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Joerg Roedel 提交于
The XR17V35X UART needs the ECB bit set in its XR_EFR register to enable access to IER [7:5], ISR [5:4], FCR[5:4], MCR[7:5], and MSR [7:0]. Also reset the IER register to mask interrupts after access to all bits of this register has been enabled. This makes my 8-port XR17V35X working with the in-kernel serial driver. Cc: Joe Schultz <jschultz@xes-inc.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Reviewed-by: NMichael Welling <mwelling@ieee.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Peter Hurley 提交于
An already-active sender can swamp the interrupt handler with "too much work" if the rx interrupts are enabled when the fifo is disabled and operating in single-byte mode. Defer rx and line status interrupt enable until after the fifos are enabled in set_termios(), but at least initialize the shadow IER value with the interrupts which will be enabled. Signed-off-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Vineet Gupta 提交于
Commit ed71871b ("tty/8250_early: Turn serial_in/serial_out into weak symbols") made these routines weak to allow platform specific Big endian override However recent updates to core, specifically ebc5e200 ("serial: of_serial: Support big-endian register accesses") and 6e63be3f ("serial: earlycon: Add support for big-endian MMIO accesses") means that round about way to overide the early serial accessors is no longer needed. Cc: Jiri Slaby <jslaby@suse.cz> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Rob Herring <robh@kernel.org> Cc: Kevin Cernekee <cernekee@gmail.com> Acked-by: NNoam Camus <noamc@ezchip.com> Signed-off-by: NVineet Gupta <vgupta@synopsys.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Peter Hurley 提交于
Refactor base port operations into new file; 8250_port.c. Legacy irq handling, RSA port support, port storage for universal driver, driver definition, module parameters and linkage remain in 8250_core.c The source file split and resulting modules is diagrammed below: 8250_core.c ====> 8250_core.c __ \ \ \ +-- 8250.ko (alias 8250_core) \ 8250_pnp.c __/ (universal driver) \ => 8250_port.c __ \ +-- 8250_base.ko 8250_dma.c __/ (port operations) Signed-off-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Peter Hurley 提交于
OMAP h/w-assisted IXON flow control is borked. The transmitter becomes stuck if XON is never received; clearing the fifos or resetting the rx flow control bits has no effect. Remove auto-IXANY as well, since without auto-IXON, it has no purpose. Signed-off-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
Due to Advisory 21 as documented in AM437x errata document, UART module cannot be disabled once DMA is used. The only workaround is to softreset the module before disabling it. DRA7x UARTs are compatible to AM437x UARTs in terms of this errata and prescribed workaround. Enable usage of workaround for this errata on DRA7x SoCs. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
AM335x, AM437x and DRA7x SoCs have an errata[1] due to which UART cannot be idled after it has been used with DMA. OMAP3 has a similar sounding errata which has been worked around in a2fc3661 ("ARM: OMAP3: Use manual idle for UARTs because of DMA errata"). But the workaround used there does not apply to AM335x, AM437x SoCs. After using DMA, the UART module on these SoCs must be soft reset to go to idle. This patch implements that errata workaround. It is expected that UART will be used with DMA so no explicit check for DMA usage has been added for errata applicability. MDR1 register needs to be restored right after soft-reset because "UART mode" must be set in that register for module wake-up on AM335x to work. As a result, SCR register is now used to determine if context was lost during sleep. [1] See Advisory 21 in AM437x errata SPRZ408B, updated April 2015. http://www.ti.com/lit/er/sprz408b/sprz408b.pdfSigned-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
Use of of_machine_is_compatible() for handling AM335x specific "DMA kick" quirk in 8250_omap driver makes it ugly to extend the quirk for other platforms. Instead use a new compatible. The new compatible will also make it easier to take care of other quirks on AM335x and like SoCs. In order to not break backward DTB compatibility for users of 8250_omap driver on AM335x based boards, existing use of of_machine_is_compatible() has not been removed. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
The silicon errata[1] workaround implemented in a follow-on patch, "serial: 8250_omap: workaround errata on disabling UART after using DMA", requires MDR1 register programming. Extract MDR1 register update into helper function, omap8250_update_mdr1() to help with that. [1] Advisory 21 in http://www.ti.com/lit/er/sprz408b/sprz408b.pdfSigned-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
omap_device infrastructure has a suspend_noirq hook which runtime suspends all devices late in the suspend cycle (see _od_suspend_noirq() in arch/arm/mach-omap2/omap_device.c) This leads to a NULL pointer exception in 8250_omap driver since by the time omap8250_runtime_suspend() is called, 8250_dma driver has already set rxchan to NULL via serial8250_release_dma(). Make an explicit check to see if rxchan is NULL in runtime_{suspend|resume} hooks to fix this. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Fintek chip can be configured for io addresses different than the standard. Query the chip for the configured addresses and try to match it with the pnp address. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Chip can be configured to use entry key different than 0x77. Try all the valid keys until one gives out the right chip id. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
There are some chips with the same interface but different chip ip. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Fintek chip can be connected at address 0x4e and also 0x2e. Add some logic to find out the address of the chip. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Save the port index and the line id in a private structure. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 22 6月, 2015 1 次提交
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由 Paul Burton 提交于
Introduce a driver suitable for use with the UARTs present in Ingenic SoCs such as the JZ4740 & JZ4780. These are described as being ns16550 compatible but aren't quite - they require the setting of an extra bit in the FCR register to enable the UART module. The serial_out implementation is the same as that in arch/mips/jz4740/serial.c - which will shortly be removed. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-serial@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Alan Cox <alan@linux.intel.com> Cc: linux-kernel@vger.kernel.org Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/10159/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 13 6月, 2015 2 次提交
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由 Soeren Grunewald 提交于
The internal clock of the master chip, which is usually 125MHz, is only half (62.5MHz) for the slave chips. So we have to adjust the uartclk for all the slave ports. Therefor we add a new function to determine if a slave chip is present and update pci_xr17v35x_setup accordingly. Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Soeren Grunewald 提交于
The Exar XR17V358 can also be combined with a XR17V354 chip to act as a single 12 port chip. This works the same way as the combining two XR17V358 chips. But the reported device id then is 0x4358. Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 6月, 2015 1 次提交
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由 Tony Lindgren 提交于
We can now use generic wakeirq handling and remove the custom handling for the wake-up interrupts. Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 6月, 2015 5 次提交
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The currently in-use port->startup and port->shutdown are "okay". The startup part for instance does the tiny omap extra part and invokes serial8250_do_startup() for the remaining pieces. The workflow in serial8250_do_startup() is okay except for the part where UART_RX is read without a check if there is something to read. I tried to workaround it in commit 0aa525d1 ("tty: serial: 8250_core: read only RX if there is something in the FIFO") but then reverted it later in commit ca8bb4ae ("serial: 8250: Revert "tty: serial: 8250_core: read only RX if there is something in the FIFO""). This is the second attempt to get it to work on older OMAPs without breaking other chips this time Peter Hurley suggested to pull in the few needed lines from serial8250_do_startup() and drop everything else that is not required including making it simpler like using just request_irq() instead the chain handler like it is doing now. So lets try that. Fixes: ca8bb4ae ("serial: 8250: Revert "tty: serial: 8250_core: read only RX if there is something in the FIFO"") Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Joachim Eastwood 提交于
Serial port driver for the 8250-based UART found on LPC18xx/43xx devices. The UART is 16550A compatible with additional features like RS485 support, synchronous mode, IrDA, and DMA. For now only basic UART and RS485 operation is supported. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Masahiro Yamada 提交于
Add the driver for on-chip UART used on UniPhier SoCs. This hardware is similar to 8250, but the register mapping is slightly different: - The offset to FCR, MCR is different. - The divisor latch access bit does not exist. Instead, the divisor latch register is available at offset 9. This driver overrides serial_{in,out}, dl_{read,write} callbacks, but wants to borrow most of code from 8250_core.c. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Heikki Krogerus 提交于
On many new Intel SoCs the UART has an integrated DMA engine (iDMA). In order to use it a special filter function is needed. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Masahiro Yamada 提交于
serial8250_set_mctrl() is a void type function. Returning something does not look nice. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 25 5月, 2015 2 次提交
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由 Arnd Bergmann 提交于
If the mediatek serial port driver is built-in, but serial console is disabled in Kconfig (e.g. when the serial driver itself is a loadable module), we get this build error: drivers/built-in.o: In function `early_mtk8250_setup': undefined reference to `early_serial8250_setup' To avoid that problem, this patch encloses the early_mtk8250_setup function in #ifdef CONFIG_SERIAL_8250_CONSOLE, the same symbol that guards the early_serial8250_setup function. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NEddie Huang <eddie.huang@mediatek.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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The currently in-use port->startup and port->shutdown are "okay". The startup part for instance does the tiny omap extra part and invokes serial8250_do_startup() for the remaining pieces. The workflow in serial8250_do_startup() is okay except for the part where UART_RX is read without a check if there is something to read. I tried to workaround it in commit 0aa525d1 ("tty: serial: 8250_core: read only RX if there is something in the FIFO") but then reverted it later in commit ca8bb4ae ("serial: 8250: Revert "tty: serial: 8250_core: read only RX if there is something in the FIFO""). This is the second attempt to get it to work on older OMAPs without breaking other chips this time Peter Hurley suggested to pull in the few needed lines from serial8250_do_startup() and drop everything else that is not required including making it simpler like using just request_irq() instead the chain handler like it is doing now. So lets try that. Fixes: ca8bb4ae ("serial: 8250: Revert "tty: serial: 8250_core: read only RX if there is something in the FIFO"") Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 11 5月, 2015 3 次提交
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由 Masahiro Yamada 提交于
The port.fifosize member has already been copied at 8 lines above. Maybe the compiler optimization can clean it away, but just in case. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
When nr_uarts was set to 0 (via config or 8250_core.nr_uarts), we crash early on x86 because serial8250_isa_init_ports dereferences base_ops which remains NULL. In fact, there is nothing to do for all the callers of serial8250_isa_init_ports if there are no uarts. Based on suggestions by Peter Hurley. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Eddie Huang 提交于
Add 8250 MTK UART driver to support earlycon device tree. Earlycon take effect by add "earlycon" in kernel boot argument add "linux,sdtout-path" property in device tree file Signed-off-by: NEddie Huang <eddie.huang@mediatek.com> Tested-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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