1. 08 5月, 2007 1 次提交
  2. 26 4月, 2007 1 次提交
  3. 15 2月, 2007 1 次提交
    • T
      [PATCH] remove many unneeded #includes of sched.h · cd354f1a
      Tim Schmielau 提交于
      After Al Viro (finally) succeeded in removing the sched.h #include in module.h
      recently, it makes sense again to remove other superfluous sched.h includes.
      There are quite a lot of files which include it but don't actually need
      anything defined in there.  Presumably these includes were once needed for
      macros that used to live in sched.h, but moved to other header files in the
      course of cleaning it up.
      
      To ease the pain, this time I did not fiddle with any header files and only
      removed #includes from .c-files, which tend to cause less trouble.
      
      Compile tested against 2.6.20-rc2 and 2.6.20-rc2-mm2 (with offsets) on alpha,
      arm, i386, ia64, mips, powerpc, and x86_64 with allnoconfig, defconfig,
      allmodconfig, and allyesconfig as well as a few randconfigs on x86_64 and all
      configs in arch/arm/configs on arm.  I also checked that no new warnings were
      introduced by the patch (actually, some warnings are removed that were emitted
      by unnecessarily included header files).
      Signed-off-by: NTim Schmielau <tim@physik3.uni-rostock.de>
      Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      cd354f1a
  4. 02 12月, 2006 1 次提交
    • Z
      [PATCH] Add tsi108/9 On Chip Ethernet device driver support · 5e123b84
      Zang Roy-r61911 提交于
      Add tsi108/9 on chip Ethernet controller driver support.
      
      The driver code collects the feedback of previous posting form the mailing
      list and gives the update.
      
      MPC7448HPC2 platform in arch/powerpc uses tsi108 bridge.
      
      The following is a brief description of the Ethernet controller:
      
      The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent
      Gigabit Ethernet ports,E0 and E1.  It uses a single Management interface to
      manage the two physical connection devices (PHYs).  Each Ethernet port has
      its own statistics monitor that tracks and reports key interface
      statistics.  Each port supports a 256-entry hash table for address
      filtering.  In addition, each port is bridged to the Switch Fabric through
      a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO.
      
      Each Ethernet port also has a pair of internal Ethernet DMA channels to
      support the transmit and receive data flows.  The Ethernet DMA channels use
      descriptors set up in memory, the memory map of the device, and access via
      the Switch Fabric.  The Ethernet Controller’s DMA arbiter handles
      arbitration for the Switch Fabric.  The Controller also has a register bus
      interface for register accesses and status monitor control.
      
      The PMD (Physical Media Device) interface operates in MII, GMII, or TBI
      modes.  The MII mode is used for connecting with 10 or 100 Mbit/s PMDs.
      The GMII and TBI modes are used to connect with Gigabit PMDs.  Internal
      data flows to and from the Ethernet Controller through the Switch Fabric.
      Each
      
      Ethernet port uses its transmit and receive DMA channels to manage data
      flows through buffer descriptors that are predefined by the system (the
      descriptors can exist anywhere in the system memory map).  These
      descriptors are data structures that point to buffers filled with data
      ready to transmit over Ethernet, or they point to empty buffers ready to
      receive data from Ethernet.
      Signed-off-by: NAlexandre Bounine <Alexandre.Bounine@tundra.com>
      Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      5e123b84