- 25 7月, 2022 20 次提交
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由 Jason Wang 提交于
The double `to' is duplicated in the comment, remove one. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NJason Wang <wangborong@cdjrlc.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jason Wang 提交于
The double `have' is duplicated in line 696, remove one. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NJason Wang <wangborong@cdjrlc.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
Adding dm ip block to enable display on dcn 3.1.4. Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
[Why] DCN 3.1.4 uses dmub not dmcu. Attempt to identify dmcu firmware for dcn314 results in dm init error: "Unsupported ASIC type" [How] Add dcn314 to the list of asics that don't require dmcu Signed-off-by: NRoman Li <roman.li@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Taimur Hassan 提交于
[Why & How] There are cases where the pipes populated are not all at the top of the pipes list under context. Loop through all pipes for DET allocation instead of just the number of populated ones, even if some unpopulated pipes are iterated through unnecessarily. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NTaimur Hassan <Syed.Hassan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Vladimir Stempen 提交于
[Why] VM enabled in IP configuration causes UCLK not reaching DPM0. The expectation for VM enable should be that KMD will indicate to DAL when VM is enabled, then DAL will set the bit accordingly [How] Set gpuvm_enable to zero in DCN3_20 and DCN3_21 resource. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NMartin Leung <Martin.Leung@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NVladimir Stempen <vladimir.stempen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 André Almeida 提交于
Add a GFXOFF section at "GPU Power Controls" file, explaining what it is and how userspace can interact with it. v2: minor tweaks to the documenation (Alex) Signed-off-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 André Almeida 提交于
GFXOFF has two different "state" values: one to define if the GPU is allowed/disallowed to enter GFXOFF, usually called state; and another one to define if currently GFXOFF is being used, usually called status. Even when GFXOFF is allowed, GPU firmware can decide to not used it accordingly to the GPU load. Userspace can allow/disallow GPUs to enter into GFXOFF via debugfs. The kernel maintains a counter of requests for GFXOFF (gfx_off_req_count) that should be decreased to allow GFXOFF and increased to disallow. The issue with this interface is that userspace can't be sure if GFXOFF is currently allowed. Even by checking amdgpu_gfxoff file, one might get an ambiguous 2, that means that GPU is currently out of GFXOFF, but that can be either because it's currently disallowed or because it's allowed but given the current GPU load it's enabled. Then, userspace needs to rely on the fact that GFXOFF is enabled by default on boot and to track this information. To make userspace life easier and GFXOFF more reliable, return the current state of GFXOFF to userspace when reading amdgpu_gfxoff with the same semantics of writing: 0 means not allowed, not 0 means allowed. Expose the current status of GFXOFF through a new file, amdgpu_gfxoff_status. Signed-off-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Melissa Wen 提交于
Although dcn31_update_soc_for_wm_a() is only called in dml/dcn31/dcn31_fpu by dc->res_pool->funcs->update_soc_for_wm_a(dc, context), it's declared in dcn31_resource that is not FPU protected. Move this function to dcn31_fpu file as part of the work to isolate FPU code. Signed-off-by: NMelissa Wen <mwen@igalia.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
Remove the variable MaxUsedBW from the function DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation. As a side-effect, the variables MaxPerPlaneVActiveWRBandwidth and WRBandwidth are also removed. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3043:10: warning: variable 'MaxUsedBW' set but not used [-Wunused-but-set-variable] double MaxUsedBW = 0; ^ 1 warning generated. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
The variable regval from the function enc1_update_generic_info_packet and the variables dynamic_range_rgb and dynamic_range_ycbcr from the function enc1_stream_encoder_dp_set_stream_attribute are not currently used. This was pointed by clang with the following warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:62:11: warning: variable 'regval' set but not used [-Wunused-but-set-variable] uint32_t regval; ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:262:10: warning: variable 'dynamic_range_rgb' set but not used [-Wunused-but-set-variable] uint8_t dynamic_range_rgb = 0; /*full range*/ ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:263:10: warning: variable 'dynamic_range_ycbcr' set but not used [-Wunused-but-set-variable] uint8_t dynamic_range_ycbcr = 1; /*bt709*/ ^ 3 warnings generated. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
Remove the variables dispclk_delay_subtotal and dppclk_delay_subtotal from the function dml_rq_dlg_get_dlg_params. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:920:15: warning: variable 'dispclk_delay_subtotal' set but not used [-Wunused-but-set-variable] unsigned int dispclk_delay_subtotal; ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:919:15: warning: variable 'dppclk_delay_subtotal' set but not used [-Wunused-but-set-variable] unsigned int dppclk_delay_subtotal; ^ 2 warnings generated. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
Remove the unused unsigned int NumberOfStates from the file, which was declared but never hooked up. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:33:27: warning: unused variable 'NumberOfStates' [-Wunused-const-variable] static const unsigned int NumberOfStates = DC__VOLTAGE_STATES; ^ 1 warning generated. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
Remove dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function, which is not used in the codebase. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:6: warning: no previous prototype for function 'dml32_CalculatedoublePipeDPPCLKAndSCLThroughput' [-Wmissing-prototypes] void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput( ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput( ^ static 1 warning generated. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
Remove the variable clk_src from the function dcn3_get_pix_clk_dividers. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: warning: variable 'clk_src' set but not used [-Wunused-but-set-variable] struct dce110_clk_src *clk_src; ^ 1 warning generated. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Taimur Hassan 提交于
[Why] For certain MPO configurations, DML will split a pipe after DET buffer has already been allocated by driver, resulting in allocation of more DET segments than the configurable return buffer has, causing underflow. [How] Determine during DET override calculation whether or not a pipe will be split later on by DML, and distribute DET segments based on expected number of pipes. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NTaimur Hassan <Syed.Hassan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
[Description] In general cases we want to keep the dram clock change requirement (we prefer configs that support MCLK switch). Only override to false for SubVP. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
We want to calculate the DTB clock values when DSC is enabled; however, this is not the current behavior implemented in DCN32. Right now, DML is trying to calculate DSC values even if DSC is disabled; as a result, we can have a hard hang due to wrong clock calculation. This commit fixes this issue by moving the calculation after the DSC check. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wenjing Liu 提交于
[why] Number of DSC slices is an input to DML with high dependency on display specific capability. This isn't something DML can decide on its own. DML has to use the original number of DSC slices input to DML during validation without modification. Otherwise the computed DSC delay will not reflect the current configuration and therefore causes validation failures. [how] Remove DML override for number of DSC slices parameter. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWenjing Liu <wenjing.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
[Why] The amdgpu_dm file contains most of the code that works as an interface between DRM API and DC. As a result, this file becomes very large since it comprises multiple abstractions such as CRTC manipulation. [How] This commit extracts the CRTC code to its specific file named amdgpu_dm_crtc. This change does not change anything inside the functions; the only exception is converting some static functions to a global function. v2: fix ifdef merge mix up (Alex) Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 7月, 2022 14 次提交
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由 Rodrigo Siqueira 提交于
[Why] The amdgpu_dm file contains most of the code that works as an interface between DRM API and DC. As a result, this file becomes very large since it comprises multiple abstractions such as plane manipulation. [How] This commit extracts the plane code to its specific file named amdgpu_dm_plane. This change does not change anything inside the functions; the only exception is converting some static functions to a global function. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why & How] In order to leverage igt tool to maintain mst feature, expose new debugfs entry "mst_progress_status". In our dm flow, record down the result of each phase of mst and user can examine the mst result by checking whether each phase get completed successfully. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NHersen Wu <hersenxs.wu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why & How] Add "is_mst_connector" debugfs entry to help distinguish whether a connector is in a mst topology or not. Access it with the following command: cat /sys/kernel/debug/dri/0/DP-X/is_mst_connector Result: - "root" stands for the root connector of the topology - "branch" stands for branch device of the topology - "end" stands for leaf node connector of the topology - "no" stands for the connector is not a device of a mst topology Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NHersen Wu <hersenxs.wu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why & How] Correct few problems below to have debugfs trigger_hotplug entry supports mst case * Adjust the place for acquiring the hpd_lock. We'll also access dc_link when simulate unplug * When detect the connector is a mst root, call reset_cur_dp_mst_topology() to simulate unplug * Don't support hotplug caused by CSN message since we can't change mst topology info directly. We can't simulate that * Clean up redundant code Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NHersen Wu <hersenxs.wu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why & How] Need to leverage this function out of dc_link.c. Change it to public. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NHersen Wu <hersenxs.wu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
Update DML to configure drr_display in vba struct. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jun Lei 提交于
Remove an unused variable "remove_disconnect_edp" which was a workaround bit. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NJun Lei <Jun.Lei@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why] When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will try to register vertical interrupt 0 for specific task. Currently, only dcn10 have defined relevant info for vertical interrupt 0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, will get DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() and cause pointer errors. [How] Add support of vertical interrupt 0 for all dcn ASIC. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
enable gfx ulv and gpo on smu_v13_0_7 Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
Turn previously global function into a static function as it is not used outside the file. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maíra Canal 提交于
On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable should be written into the control register instead of 0. Reviewed-by: NAndré Almeida <andrealmeid@igalia.com> Signed-off-by: NMaíra Canal <mairacanal@riseup.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Gavin Wan 提交于
The scratch register should be accessed through MMIO instead of RLCG in SRIOV, since it being used in RLCG register access function. Fixes: d54762cc ("drm/amdgpu: nuke dynamic gfx scratch reg allocation") Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NGavin Wan <Gavin.Wan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Sierra 提交于
TTM used to track the "acc_size" of all BOs internally. We needed to keep track of it in our memory reservation to avoid TTM running out of memory in its own accounting. However, that "acc_size" accounting has since been removed from TTM. Therefore we don't really need to track it any more. Signed-off-by: NAlex Sierra <alex.sierra@amd.com> Reviewed-by: NPhilip Yang <philip.yang@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Luben Tuikov 提交于
Protect the struct amdgpu_bo_list with a mutex. This is used during command submission in order to avoid buffer object corruption as recorded in the link below. v2 (chk): Keep the mutex looked for the whole CS to avoid using the list from multiple CS threads at the same time. Suggested-by: NChristian König <christian.koenig@amd.com> Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Cc: Vitaly Prosyak <Vitaly.Prosyak@amd.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2048Signed-off-by: NLuben Tuikov <luben.tuikov@amd.com> Signed-off-by: NChristian König <christian.koenig@amd.com> Tested-by: NLuben Tuikov <luben.tuikov@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 7月, 2022 6 次提交
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由 Ruijing Dong 提交于
From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support both encoding and decoding jobs. Link: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/245/commitsReviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NRuijing Dong <ruijing.dong@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
enable mode1 reset for smu_v13_0_7 since it's missing. Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NYang Wang <kevinyang.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
To match with the enum defined in trusted os Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NLe Ma <le.ma@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Guchun Chen 提交于
It's redundant, as now switching to rpm_mode to indicate runtime power management mode. Suggested-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Guchun Chen 提交于
This quirk is not needed any more as it's fixed by bypassing SMU FW reloading in runtime resume. Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Guchun Chen 提交于
SMU is always alive, so it's fine to skip SMU FW reloading when runpm resumed from BACO, this can avoid some race issues when resuming SMU. Suggested-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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