1. 03 11月, 2014 1 次提交
  2. 05 6月, 2014 1 次提交
    • C
      x86/uv: Update the UV3 TLB shootdown logic · a26fd719
      Cliff Wickman 提交于
      Update of TLB shootdown code for UV3.
      
      Kernel function native_flush_tlb_others() calls
      uv_flush_tlb_others() on UV to invalidate tlb page definitions
      on remote cpus. The UV systems have a hardware 'broadcast assist
      unit' which can be used to broadcast shootdown messages to all
      cpu's of selected nodes.
      
      The behavior of the BAU has changed only slightly with UV3:
      
        - UV3 is recognized with is_uv3_hub().
        - UV2 functions and structures (uv2_xxx) are in most cases
          simply renamed to uv2_3_xxx.
        - Some UV2 error workarounds are not needed for UV3.
          (see uv_bau_message_interrupt and enable_timeouts)
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Link: http://lkml.kernel.org/r/E1WkgWh-0001yJ-3K@eag09.americas.sgi.com
      [ Removed a few linebreak uglies. ]
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      a26fd719
  3. 21 6月, 2013 1 次提交
    • S
      x86, trace: Add irq vector tracepoints · cf910e83
      Seiji Aguchi 提交于
      [Purpose of this patch]
      
      As Vaibhav explained in the thread below, tracepoints for irq vectors
      are useful.
      
      http://www.spinics.net/lists/mm-commits/msg85707.html
      
      <snip>
      The current interrupt traces from irq_handler_entry and irq_handler_exit
      provide when an interrupt is handled.  They provide good data about when
      the system has switched to kernel space and how it affects the currently
      running processes.
      
      There are some IRQ vectors which trigger the system into kernel space,
      which are not handled in generic IRQ handlers.  Tracing such events gives
      us the information about IRQ interaction with other system events.
      
      The trace also tells where the system is spending its time.  We want to
      know which cores are handling interrupts and how they are affecting other
      processes in the system.  Also, the trace provides information about when
      the cores are idle and which interrupts are changing that state.
      <snip>
      
      On the other hand, my usecase is tracing just local timer event and
      getting a value of instruction pointer.
      
      I suggested to add an argument local timer event to get instruction pointer before.
      But there is another way to get it with external module like systemtap.
      So, I don't need to add any argument to irq vector tracepoints now.
      
      [Patch Description]
      
      Vaibhav's patch shared a trace point ,irq_vector_entry/irq_vector_exit, in all events.
      But there is an above use case to trace specific irq_vector rather than tracing all events.
      In this case, we are concerned about overhead due to unwanted events.
      
      So, add following tracepoints instead of introducing irq_vector_entry/exit.
      so that we can enable them independently.
         - local_timer_vector
         - reschedule_vector
         - call_function_vector
         - call_function_single_vector
         - irq_work_entry_vector
         - error_apic_vector
         - thermal_apic_vector
         - threshold_apic_vector
         - spurious_apic_vector
         - x86_platform_ipi_vector
      
      Also, introduce a logic switching IDT at enabling/disabling time so that a time penalty
      makes a zero when tracepoints are disabled. Detailed explanations are as follows.
       - Create trace irq handlers with entering_irq()/exiting_irq().
       - Create a new IDT, trace_idt_table, at boot time by adding a logic to
         _set_gate(). It is just a copy of original idt table.
       - Register the new handlers for tracpoints to the new IDT by introducing
         macros to alloc_intr_gate() called at registering time of irq_vector handlers.
       - Add checking, whether irq vector tracing is on/off, into load_current_idt().
         This has to be done below debug checking for these reasons.
         - Switching to debug IDT may be kicked while tracing is enabled.
         - On the other hands, switching to trace IDT is kicked only when debugging
           is disabled.
      
      In addition, the new IDT is created only when CONFIG_TRACING is enabled to avoid being
      used for other purposes.
      Signed-off-by: NSeiji Aguchi <seiji.aguchi@hds.com>
      Link: http://lkml.kernel.org/r/51C323ED.5050708@hds.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      cf910e83
  4. 25 6月, 2012 2 次提交
    • C
      x86/uv: Work around UV2 BAU hangs · 8b6e511e
      Cliff Wickman 提交于
      On SGI's UV2 the BAU (Broadcast Assist Unit) driver can hang
      under a heavy load. To cure this:
      
      - Disable the UV2 extended status mode (see UV2_EXT_SHFT), as
        this mode changes BAU behavior in more ways then just delivering
        an extra bit of status.  Revert status to just two meaningful bits,
        like UV1.
      
      - Use no IPI-style resets on UV2.  Just give up the request for
        whatever the reason it failed and let it be accomplished with
        the legacy IPI method.
      
      - Use no alternate sending descriptor (the former UV2 workaround
        bcp->using_desc and handle_uv2_busy() stuff).  Just disable the
        use of the BAU for a period of time in favor of the legacy IPI
        method when the h/w bug leaves a descriptor busy.
      
        -- new tunable: giveup_limit determines the threshold at which a hub is
           so plugged that it should do all requests with the legacy IPI method for a
           period of time
        -- generalize disable_for_congestion() (renamed disable_for_period()) for
           use whenever a hub should avoid using the BAU for a period of time
      
      Also:
      
       - Fix find_another_by_swack(), which is part of the UV2 bug workaround
      
       - Correct and clarify the statistics (new stats s_overipilimit, s_giveuplimit,
         s_enters, s_ipifordisabled, s_plugged, s_congested)
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Link: http://lkml.kernel.org/r/20120622131459.GC31884@sgi.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      8b6e511e
    • C
      x86/uv: Implement UV BAU runtime enable and disable control via /proc/sgi_uv/ · 26ef8577
      Cliff Wickman 提交于
      This patch enables the BAU to be turned on or off dynamically.
      
        echo "on"  > /proc/sgi_uv/ptc_statistics
        echo "off" > /proc/sgi_uv/ptc_statistics
      
      The system may be booted with or without the nobau option.
      
      Whether the system currently has the BAU off can be seen in
      the /proc file -- normally with the baustats script.
      Each cpu will have a 1 in the bauoff field if the BAU was turned
      off, so baustats will give a count of cpus that have it off.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Link: http://lkml.kernel.org/r/20120622131330.GB31884@sgi.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      26ef8577
  5. 08 6月, 2012 1 次提交
  6. 17 1月, 2012 3 次提交
  7. 21 9月, 2011 1 次提交
    • J
      x86: uv2: Workaround for UV2 Hub bug (system global address format) · 6a469e46
      Jack Steiner 提交于
      This is a workaround for a UV2 hub bug that affects the format of system
      global addresses.
      
      The GRU API for UV2 was inadvertently broken by a hardware change.  The
      format of the physical address used for TLB dropins and for addresses used
      with instructions running in unmapped mode has changed.  This change was
      not documented and became apparent only when diags failed running on
      system simulators.
      
      For UV1, TLB and GRU instruction physical addresses are identical to
      socket physical addresses (although high NASID bits must be OR'ed into the
      address).
      
      For UV2, socket physical addresses need to be converted.  The NODE portion
      of the physical address needs to be shifted so that the low bit is in bit
      39 or bit 40, depending on an MMR value.
      
      It is not yet clear if this bug will be fixed in a silicon respin.  If it
      is fixed, the hub revision will be incremented & the workaround disabled.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      6a469e46
  8. 30 8月, 2011 1 次提交
  9. 21 6月, 2011 4 次提交
  10. 25 5月, 2011 2 次提交
    • C
      x86, UV: Clean up uv_tlb.c · f073cc8f
      Cliff Wickman 提交于
      SGI UV's uv_tlb.c driver has become rather hard to read, with overly large
      functions, non-standard coding style and (way) too long variable, constant
      and function names and non-obvious code flow sequences.
      
      This patch improves the readability and maintainability of the driver
      significantly, by doing the following strict code cleanups with no side
      effects:
      
       - Split long functions into shorter logical functions.
      
       - Shortened some variable and structure member names.
      
       - Added special functions for reads and writes of MMR regs with
         very long names.
      
       - Added the 'tunables' table to shortened tunables_write().
      
       - Added the 'stat_description' table to shorten uv_ptc_proc_write().
      
       - Pass fewer 'stat' arguments where it can be derived from the 'bcp'
         argument.
      
       - Function definitions consistent on one line, and inline in few (short) cases.
      
       - Moved some small structures and an atomic inline function to the header file.
      
       - Moved some local variables to the blocks where they are used.
      
       - Updated the copyright date.
      
       - Shortened uv_write_global_mmr64() etc. using some aliasing; no
         line breaks. Renamed many uv_.. functions that are not exported.
      
       - Aligned structure fields.
          [ note that not all structures are aligned the same way though; I'd like
            to keep the extensive commenting in some of them. ]
      
       - Shortened some long structure names.
      
       - Standard pass/fail exit from init_per_cpu()
      
       - Vertical alignment for mass initializations.
      
       - More separation between blocks of code.
      
      Tested on a 16-processor Altix UV.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: penberg@kernel.org
      Link: http://lkml.kernel.org/r/E1QOw12-0004MN-Lp@eag09.americas.sgi.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      f073cc8f
    • J
      x86, UV: Add support for SGI UV2 hub chip · 2a919596
      Jack Steiner 提交于
      This patch adds support for a new version of the SGI UV hub
      chip. The hub chip is the node controller that connects multiple
      blades into a larger coherent SSI.
      
      For the most part, UV2 is compatible with UV1. The majority of
      the changes are in the addresses of MMRs and in a few cases, the
      contents of MMRs. These changes are the result in changes in the
      system topology such as node configuration, processor types,
      maximum nodes, physical address sizes, etc.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Link: http://lkml.kernel.org/r/20110511175028.GA18006@sgi.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      2a919596
  11. 13 5月, 2011 1 次提交
    • C
      x86: Fix UV BAU for non-consecutive nasids · 77ed23f8
      Cliff Wickman 提交于
      This is a fix for the SGI Altix-UV Broadcast Assist Unit code,
      which is used for TLB flushing.
      
      Certain hardware configurations (that customers are ordering)
      cause nasids (numa address space id's) to be non-consecutive.
      Specifically, once you have more than 4 blades in a IRU
      (Individual Rack Unit - or 1/2 rack) but less than the maximum
      of 16, the nasid numbering becomes non-consecutive.  This
      currently results in a 'catastrophic error' (CATERR) detected by
      the firmware during OS boot.  The BAU is generating an 'INTD'
      request that is targeting a non-existent nasid value. Such
      configurations may also occur when a blade is configured off
      because of hardware errors. (There is one UV hub per blade.)
      
      This patch is required to support such configurations.
      
      The problem with the tlb_uv.c code is that is using the
      consecutive hub numbers as indices to the BAU distribution bit
      map. These are simply the ordinal position of the hub or blade
      within its partition.  It should be using physical node numbers
      (pnodes), which correspond to the physical nasid values. Use of
      the hub number only works as long as the nasids in the partition
      are consecutive and increase with a stride of 1.
      
      This patch changes the index to be the pnode number, thus
      allowing nasids to be non-consecutive.
      It also provides a table in local memory for each cpu to
      translate target cpu number to target pnode and nasid.
      And it improves naming to properly reflect 'node' and 'uvhub'
      versus 'nasid'.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: <stable@kernel.org>
      Link: http://lkml.kernel.org/r/E1QJmxX-0002Mz-Fk@eag09.americas.sgi.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
      77ed23f8
  12. 09 3月, 2011 1 次提交
  13. 04 1月, 2011 1 次提交
    • C
      x86, UV, BAU: Extend for more than 16 cpus per socket · cfa60917
      Cliff Wickman 提交于
      Fix a hard-coded limit of a maximum of 16 cpu's per socket.
      
      The UV Broadcast Assist Unit code initializes by scanning the
      cpu topology of the system and assigning a master cpu for each
      socket and UV hub. That scan had an assumption of a limit of 16
      cpus per socket. With Westmere we are going over that limit.
      The UV hub hardware will allow up to 32.
      
      If the scan finds the system has gone over that limit it returns
      an error and we print a warning and fall back to doing TLB
      shootdowns without the BAU.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: <stable@kernel.org> # .37.x
      LKML-Reference: <E1PZol7-0000mM-77@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      cfa60917
  14. 09 6月, 2010 8 次提交
    • C
      x86, UV: Modularize BAU send and wait · f6d8a566
      Cliff Wickman 提交于
      Streamline the large uv_flush_send_and_wait() function by use of
      a couple of helper functions.
      
      And remove some excess comments.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNy-0004ay-IH@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f6d8a566
    • C
      x86, UV: BAU broadcast to the local hub · 450a007e
      Cliff Wickman 提交于
      Make the Broadcast Assist Unit driver use the BAU for TLB
      shootdowns of cpu's on the local uvhub.
      
      It was previously thought that IPI might be faster to the cpu's
      on the local hub.  But the IPI operation would have to follow
      the completion of the BAU broadcast anyway.  So we broadcast to
      the local uvhub in all cases except when the current cpu was the
      only local cpu in the mask.
      
      This simplifies uv_flush_send_and_wait() in that it returns
      either all shootdowns complete, or none.
      
      Adjust the statistics to account for shootdowns on the local
      uvhub.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNy-0004aq-G7@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      450a007e
    • C
      x86, UV: Remove BAU check for stay-busy · 90cc7d94
      Cliff Wickman 提交于
      Remove a faulty assumption that a long running BAU request has
      encountered a hardware problem and will never finish.
      
      Numalink congestion can make a request appear to have
      encountered such a problem, but it is not safe to cancel the
      request.  If such a cancel is done but a reply is later received
      we can miss a TLB shootdown.
      
      We depend upon the max_bau_concurrent 'throttle' to prevent the
      stay-busy case from happening.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNy-0004ad-BV@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      90cc7d94
    • C
      x86, UV: BAU structure rearranging · 4faca155
      Cliff Wickman 提交于
      Move some structure definitions from the C code to the BAU
      header file, and change the organization of that header file a
      little.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNy-0004aI-54@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      4faca155
    • C
      x86, UV: Shorten access to BAU statistics structure · 712157aa
      Cliff Wickman 提交于
      Use a pointer from the per-cpu BAU control structure to the
      per-cpu BAU statistics structure.
      We nearly always know the first before needing the second.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNy-0004aB-2k@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      712157aa
    • C
      x86, UV: Disable BAU on network congestion · 50fb55ac
      Cliff Wickman 提交于
      The numalink network can become so congested that TLB shootdown
      using the Broadcast Assist Unit becomes slower than using IPI's.
      
      In that case, disable the use of the BAU for a period of time.
      The period is tunable.  When the period expires the use of the
      BAU is re-enabled. A count of these actions is added to the
      statistics file.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNy-0004a4-0a@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      50fb55ac
    • C
      x86, UV: BAU tunables into a debugfs file · e8e5e8a8
      Cliff Wickman 提交于
      Make the Broadcast Assist Unit driver's nine tuning values variable by
      making them accessible through a read/write debugfs file.
      
      The file will normally be mounted as
      /sys/kernel/debug/sgi_uv/bau_tunables. The tunables are kept in each
      cpu's per-cpu BAU structure.
      
      The patch also does a little name improvement, and corrects the reset of
      two destination timeout counters.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNx-0004Zx-Uo@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e8e5e8a8
    • C
      x86, UV: Calculate BAU destination timeout · 12a6611f
      Cliff Wickman 提交于
      Calculate the Broadcast Assist Unit's destination timeout period from the
      values in the relevant MMR's.
      
      Store it in each cpu's per-cpu BAU structure so that a destination
      timeout can be differentiated from a 'plugged' situation in which all
      software ack resources are already allocated and a timeout is pending.
      That case returns an immediate destination error.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: gregkh@suse.de
      LKML-Reference: <E1OJvNx-0004Zq-RK@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      12a6611f
  15. 15 4月, 2010 1 次提交
    • C
      x86, UV: Improve BAU performance and error recovery · b8f7fb13
      Cliff Wickman 提交于
      - increase performance of the interrupt handler
      
      - release timed-out software acknowledge resources
      
      - recover from continuous-busy status due to a hardware issue
      
      - add a 'throttle' to keep a uvhub from sending more than a
        specified number of broadcasts concurrently (work around the hardware issue)
      
      - provide a 'nobau' boot command line option
      
      - rename 'pnode' and 'node' to 'uvhub' (the 'node' terminology
        is ambiguous)
      
      - add some new statistics about the scope of broadcasts, retries, the
        hardware issue and the 'throttle'
      
      - split off new function uv_bau_retry_msg() from
        uv_bau_process_message() per community coding style feedback.
      
      - simplify the argument list to uv_bau_process_message(), per
        community coding style feedback.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: linux-mm@kvack.org
      Cc: Jack Steiner <steiner@sgi.com>
      Cc: Russ Anderson <rja@sgi.com>
      Cc: Mike Travis <travis@sgi.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      LKML-Reference: <E1O25Z4-0004Ur-PB@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b8f7fb13
  16. 04 12月, 2009 1 次提交
  17. 15 8月, 2009 1 次提交
  18. 03 6月, 2009 1 次提交
    • C
      x86: Fix UV BAU activation descriptor init · 0e2595cd
      Cliff Wickman 提交于
      The UV tlb shootdown code has a serious initialization error.
      
      An array of structures [32*8] is initialized as if it were [32].
      The array is indexed by (cpu number on the blade)*8, so the short
      initialization works for up to 4 cpus on a blade.
      But above that, we provide an invalid opcode to the hub's
      broadcast assist unit.
      
      This patch changes the allocation of the array to use its symbolic
      dimensions for better clarity. And initializes all 32*8 entries.
      
      Shortened 'UV_ACTIVATION_DESCRIPTOR_SIZE' to 'UV_ADP_SIZE' per Ingo's
      recommendation.
      
      Tested on the UV simulator.
      Signed-off-by: NCliff Wickman <cpw@sgi.com>
      Cc: <stable@kernel.org>
      LKML-Reference: <E1M6lZR-0007kV-Aq@eag09.americas.sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0e2595cd
  19. 21 1月, 2009 1 次提交
    • T
      x86: uv cleanup · bdbcdd48
      Tejun Heo 提交于
      Impact: cleanup
      
      Make the following uv related cleanups.
      
      * collect visible uv related definitions and interfaces into uv/uv.h
        and use it.  this cleans up the messy situation where on 64bit, uv
        is defined properly, on 32bit generic it's dummy and on the rest
        undefined.  after this clean up, uv is defined on 64 and dummy on
        32.
      
      * update uv_flush_tlb_others() such that it takes cpumask of
        to-be-flushed cpus as argument, instead of that minus self, and
        returns yet-to-be-flushed cpumask, instead of modifying the passed
        in parameter.  this interface change will ease dummy implementation
        of uv_flush_tlb_others() and makes uv tlb flush related stuff
        defined in tlb_uv proper.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      bdbcdd48
  20. 12 1月, 2009 1 次提交
    • R
      x86: change flush_tlb_others to take a const struct cpumask · 4595f962
      Rusty Russell 提交于
      Impact: reduce stack usage, use new cpumask API.
      
      This is made a little more tricky by uv_flush_tlb_others which
      actually alters its argument, for an IPI to be sent to the remaining
      cpus in the mask.
      
      I solve this by allocating a cpumask_var_t for this case and falling back
      to IPI should this fail.
      
      To eliminate temporaries in the caller, all flush_tlb_others implementations
      now do the this-cpu-elimination step themselves.
      
      Note also the curious "cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask)"
      which has been there since pre-git and yet f->flush_cpumask is always zero
      at this point.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Signed-off-by: NMike Travis <travis@sgi.com>
      4595f962
  21. 31 12月, 2008 1 次提交
    • J
      x86: uv_bau.h: fix dubious bitfield · fa95826f
      Jaswinder Singh Rajput 提交于
      Impact: cleanup, avoid sparse warnings
      
      declare bitfield as unsigned to avoid dubious bitfield issue
      
       CHECK   arch/x86/kernel/tlb_64.c
      arch/x86/include/asm/uv/uv_bau.h:136:22: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:138:25: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:140:15: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:143:14: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:146:14: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:149:18: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:151:18: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:155:14: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:159:18: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:173:19: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:181:16: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:185:18: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:188:16: error: dubious one-bit signed bitfield
      
       CHECK   arch/x86/kernel/tlb_uv.c
      arch/x86/include/asm/uv/uv_bau.h:136:22: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:138:25: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:140:15: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:143:14: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:146:14: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:149:18: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:151:18: warning: dubious bitfield without explicit `signed' or `unsigned'
      arch/x86/include/asm/uv/uv_bau.h:155:14: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:159:18: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:173:19: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:181:16: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:185:18: error: dubious one-bit signed bitfield
      arch/x86/include/asm/uv/uv_bau.h:188:16: error: dubious one-bit signed bitfield
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      fa95826f
  22. 23 10月, 2008 3 次提交
  23. 20 8月, 2008 1 次提交
  24. 23 7月, 2008 1 次提交
    • V
      x86: consolidate header guards · 77ef50a5
      Vegard Nossum 提交于
      This patch is the result of an automatic script that consolidates the
      format of all the headers in include/asm-x86/.
      
      The format:
      
      1. No leading underscore. Names with leading underscores are reserved.
      2. Pathname components are separated by two underscores. So we can
         distinguish between mm_types.h and mm/types.h.
      3. Everything except letters and numbers are turned into single
         underscores.
      Signed-off-by: NVegard Nossum <vegard.nossum@gmail.com>
      77ef50a5