1. 10 2月, 2016 2 次提交
  2. 05 1月, 2016 1 次提交
  3. 27 12月, 2015 1 次提交
  4. 04 12月, 2015 1 次提交
  5. 30 11月, 2015 1 次提交
  6. 19 11月, 2015 1 次提交
    • L
      gpio: change member .dev to .parent · 58383c78
      Linus Walleij 提交于
      The name .dev in a struct is normally reserved for a struct device
      that is let us say a superclass to the thing described by the struct.
      struct gpio_chip stands out by confusingly using a struct device *dev
      to point to the parent device (such as a platform_device) that
      represents the hardware. As we want to give gpio_chip:s real devices,
      this is not working. We need to rename this member to parent.
      
      This was done by two coccinelle scripts, I guess it is possible to
      combine them into one, but I don't know such stuff. They look like
      this:
      
      @@
      struct gpio_chip *var;
      @@
      -var->dev
      +var->parent
      
      and:
      
      @@
      struct gpio_chip var;
      @@
      -var.dev
      +var.parent
      
      and:
      
      @@
      struct bgpio_chip *var;
      @@
      -var->gc.dev
      +var->gc.parent
      
      Plus a few instances of bgpio that I couldn't figure out how
      to teach Coccinelle to rewrite.
      
      This patch hits all over the place, but I *strongly* prefer this
      solution to any piecemal approaches that just exercise patch
      mechanics all over the place. It mainly hits drivers/gpio and
      drivers/pinctrl which is my own backyard anyway.
      
      Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
      Cc: Rafał Miłecki <zajec5@gmail.com>
      Cc: Richard Purdie <rpurdie@rpsys.net>
      Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
      Cc: Alek Du <alek.du@intel.com>
      Cc: Jaroslav Kysela <perex@perex.cz>
      Cc: Takashi Iwai <tiwai@suse.com>
      Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
      Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      Acked-by: NLee Jones <lee.jones@linaro.org>
      Acked-by: NJiri Kosina <jkosina@suse.cz>
      Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
      Acked-by: NJacek Anaszewski <j.anaszewski@samsung.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      58383c78
  7. 16 9月, 2015 1 次提交
    • T
      genirq: Remove irq argument from irq flow handlers · bd0b9ac4
      Thomas Gleixner 提交于
      Most interrupt flow handlers do not use the irq argument. Those few
      which use it can retrieve the irq number from the irq descriptor.
      
      Remove the argument.
      
      Search and replace was done with coccinelle and some extra helper
      scripts around it. Thanks to Julia for her help!
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Julia Lawall <Julia.Lawall@lip6.fr>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      bd0b9ac4
  8. 28 7月, 2015 1 次提交
    • R
      gpio: kill off set_irq_flags usage · 23393d49
      Rob Herring 提交于
      set_irq_flags is ARM specific with custom flags which have genirq
      equivalents. Convert drivers to use the genirq interfaces directly, so we
      can kill off set_irq_flags. The translation of flags is as follows:
      
      IRQF_VALID -> !IRQ_NOREQUEST
      IRQF_PROBE -> !IRQ_NOPROBE
      IRQF_NOAUTOEN -> IRQ_NOAUTOEN
      
      For IRQs managed by an irqdomain, the irqdomain core code handles clearing
      and setting IRQ_NOREQUEST already, so there is no need to do this in
      .map() functions and we can simply remove the set_irq_flags calls. Some
      users also modify IRQ_NOPROBE and this has been maintained although it
      is not clear that is really needed as most platforms don't use probing.
      There appears to be a great deal of blind copy and paste of this code.
      Signed-off-by: NRob Herring <robh@kernel.org>
      Cc: Michael Hennerich <michael.hennerich@analog.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Cc: Alexandre Courbot <gnurou@gmail.com>
      Cc: Ray Jui <rjui@broadcom.com>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: linux-gpio@vger.kernel.org
      Cc: bcm-kernel-feedback-list@broadcom.com
      Cc: linux-tegra@vger.kernel.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      23393d49
  9. 17 7月, 2015 1 次提交
  10. 14 7月, 2015 5 次提交
  11. 31 10月, 2014 1 次提交
  12. 20 10月, 2014 1 次提交
  13. 09 5月, 2014 1 次提交
  14. 11 3月, 2014 1 次提交
  15. 04 3月, 2014 1 次提交
  16. 24 2月, 2014 1 次提交
  17. 26 12月, 2013 6 次提交
  18. 21 11月, 2013 1 次提交
  19. 24 9月, 2013 2 次提交
  20. 01 9月, 2012 1 次提交
  21. 13 3月, 2012 2 次提交
    • S
      gpio/davinci: fix enabling unbanked GPIO IRQs · 81b279d8
      Sekhar Nori 提交于
      Unbanked GPIO IRQ handling code made a copy of just
      the irq_chip structure for GPIO IRQ lines which caused
      problems after the generic IRQ chip conversion because
      there was no valid irq_chip_type structure with the
      right "regs" populated. irq_gc_mask_set_bit() was
      therefore accessing random addresses.
      
      Fix it by making a copy of irq_chip_type structure
      instead. This will ensure sane register offsets.
      
      Cc: <stable@vger.kernel.org> # v3.0.x+
      Reported-by: NJon Povey <Jon.Povey@racelogic.co.uk>
      Tested-by: NJon Povey <Jon.Povey@racelogic.co.uk>
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      81b279d8
    • S
      gpio/davinci: fix oops on unbanked gpio irq request · ab2dde99
      Sekhar Nori 提交于
      Unbanked GPIO irq setup code was overwriting chip_data leading
      to the following oops on request_irq()
      
      Unable to handle kernel paging request at virtual address febfffff
      pgd = c22dc000
      [febfffff] *pgd=00000000
      Internal error: Oops: 801 [#1] PREEMPT
      Modules linked in: mcu(+) edmak irqk cmemk
      CPU: 0    Not tainted  (3.0.0-rc7+ #93)
      PC is at irq_gc_mask_set_bit+0x68/0x7c
      LR is at vprintk+0x22c/0x484
      pc : [<c0080c0c>]    lr : [<c00457e0>]    psr: 60000093
      sp : c33e3ba0  ip : c33e3af0  fp : c33e3bc4
      r10: c04555bc  r9 : c33d4340  r8 : 60000013
      r7 : 0000002d  r6 : c04555bc  r5 : fec67010  r4 : 00000000
      r3 : c04734c8  r2 : fec00000  r1 : ffffffff  r0 : 00000026
      Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment user
      Control: 0005317f  Table: 822dc000  DAC: 00000015
      Process modprobe (pid: 526, stack limit = 0xc33e2270)
      Stack: (0xc33e3ba0 to 0xc33e4000)
      3ba0: 00000000 c007d3d4 c33e3bcc c04555bc c04555bc c33d4340 c33e3bdc c33e3bc8
      3bc0: c007f5f8 c0080bb4 00000000 c04555bc c33e3bf4 c33e3be0 c007f654 c007f5c0
      3be0: 00000000 c04555bc c33e3c24 c33e3bf8 c007e6e8 c007f618 c01f2284 c0350af8
      3c00: c0405214 bf016c98 00000001 00000000 c33dc008 0000002d c33e3c54 c33e3c28
      3c20: c007e888 c007e408 00000001 c23ef880 c33dc000 00000000 c33dc080 c25caa00
      3c40: c0487498 bf017078 c33e3c94 c33e3c58 bf016b44 c007e7d4 bf017078 c33dc008
      3c60: c25caa08 c33dc008 c33e3c84 bf017484 c25caa00 c25caa00 c01f5f48 c25caa08
      3c80: c0496d60 bf017484 c33e3ca4 c33e3c98 c022a698 bf01692c c33e3cd4 c33e3ca8
      3ca0: c01f5d88 c022a688 00000000 bf017484 c25caa00 c25caa00 c01f5f48 c25caa08
      3cc0: c0496d60 00000000 c33e3cec c33e3cd8 c01f5f8c c01f5d10 00000000 c33e3cf0
      3ce0: c33e3d14 c33e3cf0 c01f5210 c01f5f58 c303cb48 c25ecf94 c25caa00 c25caa00
      3d00: c25caa34 c33e3dd8 c33e3d34 c33e3d18 c01f6044 c01f51b8 c0496d3c c25caa00
      3d20: c044e918 c33e3dd8 c33e3d44 c33e3d38 c01f4ff4 c01f5fcc c33e3d94 c33e3d48
      3d40: c01f3d10 c01f4fd8 00000000 c044e918 00000000 00000000 c01f52c0 c034d570
      3d60: c33e3d84 c33e3d70 c022bf84 c25caa00 00000000 c044e918 c33e3dd8 c25c2e00
      3d80: c0496d60 bf01763c c33e3db4 c33e3d98 c022b1a0 c01f384c c25caa00 c33e3dd8
      3da0: 00000000 c33e3dd8 c33e3dd4 c33e3db8 c022b27c c022b0e8 00000000 bf01763c
      3dc0: c0451c80 c33e3dd8 c33e3e34 c33e3dd8 bf016f60 c022b210 5f75636d 746e6f63
      3de0: 006c6f72 00000000 00000000 00000000 00000000 00000000 00000000 bf0174bc
      3e00: 00000000 00989680 00000000 00000020 c0451c80 c0451c80 bf0174dc c01f5eb0
      3e20: c33f0f00 bf0174dc c33e3e44 c33e3e38 c01f72f4 bf016e2c c33e3e74 c33e3e48
      3e40: c01f5d88 c01f72e4 00000000 c0451c80 c0451cb4 bf0174dc c01f5eb0 c33f0f00
      3e60: c0473100 00000000 c33e3e94 c33e3e78 c01f5f44 c01f5d10 00000000 c33e3e98
      3e80: bf0174dc c01f5eb0 c33e3ebc c33e3e98 c01f5534 c01f5ec0 c303c038 c3061c30
      3ea0: 00003cd8 00098258 bf0174dc c0462ac8 c33e3ecc c33e3ec0 c01f5bec c01f54dc
      3ec0: c33e3efc c33e3ed0 c01f4d30 c01f5bdc bf0173a0 c33e2000 00003cd8 00098258
      3ee0: bf0174dc c33e2000 c00301a4 bf019000 c33e3f1c c33e3f00 c01f6588 c01f4c8c
      3f00: 00003cd8 00098258 00000000 c33e2000 c33e3f2c c33e3f20 c01f777c c01f6524
      3f20: c33e3f3c c33e3f30 bf019014 c01f7740 c33e3f7c c33e3f40 c002f3ec bf019010
      3f40: 00000000 00003cd8 00098258 bf017518 00000000 00003cd8 00098258 bf017518
      3f60: 00000000 c00301a4 c33e2000 00000000 c33e3fa4 c33e3f80 c007b934 c002f3c4
      3f80: c00b307c c00b2f48 00003cd8 00000000 00000003 00000080 00000000 c33e3fa8
      3fa0: c0030020 c007b8b8 00003cd8 00000000 00098288 00003cd8 00098258 00098240
      3fc0: 00003cd8 00000000 00000003 00000080 00098008 00098028 00098288 00000001
      3fe0: be892998 be892988 00013d7c 40178740 60000010 00098288 09089041 00200845
      Backtrace:
      [<c0080ba4>] (irq_gc_mask_set_bit+0x0/0x7c) from [<c007f5f8>] (irq_enable+0x48/0x58)
       r6:c33d4340 r5:c04555bc r4:c04555bc
      [<c007f5b0>] (irq_enable+0x0/0x58) from [<c007f654>] (irq_startup+0x4c/0x54)
       r5:c04555bc r4:00000000
      [<c007f608>] (irq_startup+0x0/0x54) from [<c007e6e8>] (__setup_irq+0x2f0/0x3cc)
       r5:c04555bc r4:00000000
      [<c007e3f8>] (__setup_irq+0x0/0x3cc) from [<c007e888>] (request_threaded_irq+0xc4/0x110)
       r8:0000002d r7:c33dc008 r6:00000000 r5:00000001 r4:bf016c98
      [<c007e7c4>] (request_threaded_irq+0x0/0x110) from [<bf016b44>] (mcu_spi_probe+0x228/0x37c [mcu])
      [<bf01691c>] (mcu_spi_probe+0x0/0x37c [mcu]) from [<c022a698>] (spi_drv_probe+0x20/0x24)
      [<c022a678>] (spi_drv_probe+0x0/0x24) from [<c01f5d88>] (driver_probe_device+0x88/0x1b0)
      [<c01f5d00>] (driver_probe_device+0x0/0x1b0) from [<c01f5f8c>] (__device_attach+0x44/0x48)
      [<c01f5f48>] (__device_attach+0x0/0x48) from [<c01f5210>] (bus_for_each_drv+0x68/0x94)
       r5:c33e3cf0 r4:00000000
      [<c01f51a8>] (bus_for_each_drv+0x0/0x94) from [<c01f6044>] (device_attach+0x88/0xa0)
       r7:c33e3dd8 r6:c25caa34 r5:c25caa00 r4:c25caa00
      [<c01f5fbc>] (device_attach+0x0/0xa0) from [<c01f4ff4>] (bus_probe_device+0x2c/0x4c)
       r7:c33e3dd8 r6:c044e918 r5:c25caa00 r4:c0496d3c
      [<c01f4fc8>] (bus_probe_device+0x0/0x4c) from [<c01f3d10>] (device_add+0x4d4/0x648)
      [<c01f383c>] (device_add+0x0/0x648) from [<c022b1a0>] (spi_add_device+0xc8/0x128)
      [<c022b0d8>] (spi_add_device+0x0/0x128) from [<c022b27c>] (spi_new_device+0x7c/0xb4)
       r7:c33e3dd8 r6:00000000 r5:c33e3dd8 r4:c25caa00
      [<c022b200>] (spi_new_device+0x0/0xb4) from [<bf016f60>] (mcu_probe+0x144/0x224 [mcu])
       r7:c33e3dd8 r6:c0451c80 r5:bf01763c r4:00000000
      [<bf016e1c>] (mcu_probe+0x0/0x224 [mcu]) from [<c01f72f4>] (platform_drv_probe+0x20/0x24)
      [<c01f72d4>] (platform_drv_probe+0x0/0x24) from [<c01f5d88>] (driver_probe_device+0x88/0x1b0)
      [<c01f5d00>] (driver_probe_device+0x0/0x1b0) from [<c01f5f44>] (__driver_attach+0x94/0x98)
      [<c01f5eb0>] (__driver_attach+0x0/0x98) from [<c01f5534>] (bus_for_each_dev+0x68/0x94)
       r7:c01f5eb0 r6:bf0174dc r5:c33e3e98 r4:00000000
      [<c01f54cc>] (bus_for_each_dev+0x0/0x94) from [<c01f5bec>] (driver_attach+0x20/0x28)
       r7:c0462ac8 r6:bf0174dc r5:00098258 r4:00003cd8
      [<c01f5bcc>] (driver_attach+0x0/0x28) from [<c01f4d30>] (bus_add_driver+0xb4/0x258)
      [<c01f4c7c>] (bus_add_driver+0x0/0x258) from [<c01f6588>] (driver_register+0x74/0x158)
      [<c01f6514>] (driver_register+0x0/0x158) from [<c01f777c>] (platform_driver_register+0x4c/0x60)
       r7:c33e2000 r6:00000000 r5:00098258 r4:00003cd8
      [<c01f7730>] (platform_driver_register+0x0/0x60) from [<bf019014>] (mcu_init+0x14/0x20 [mcu])
      [<bf019000>] (mcu_init+0x0/0x20 [mcu]) from [<c002f3ec>] (do_one_initcall+0x38/0x170)
      [<c002f3b4>] (do_one_initcall+0x0/0x170) from [<c007b934>] (sys_init_module+0x8c/0x1a4)
      [<c007b8a8>] (sys_init_module+0x0/0x1a4) from [<c0030020>] (ret_fast_syscall+0x0/0x2c)
       r7:00000080 r6:00000003 r5:00000000 r4:00003cd8
      Code: e1844003 e585400c e596300c e5932064 (e7814002)
      
      Fix the issue.
      
      Cc: <stable@vger.kernel.org> # v3.0.x+
      Reported-by: NJon Povey <Jon.Povey@racelogic.co.uk>
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      ab2dde99
  22. 05 9月, 2011 1 次提交
  23. 22 8月, 2011 1 次提交
  24. 08 8月, 2011 1 次提交
  25. 12 7月, 2011 1 次提交
    • I
      arm: davinci: Fix low level gpio irq handlers' argument · f299bb95
      Ido Yariv 提交于
      Commit 74164016 ("arm: davinci: Fix fallout from generic irq chip
      conversion") introduced a bug, causing low level interrupt handlers to
      get a bogus irq number as an argument. The gpio irq handler falsely
      assumes that the handler data is the irq base number and that is no
      longer true.
      
      Set the irq handler data to be a pointer to the corresponding gpio
      controller. The chained irq handler can then use it to extract both the
      irq base number and the gpio registers structure.
      Signed-off-by: NIdo Yariv <ido@wizery.com>
      CC: Thomas Gleixner <tglx@linutronix.de>
      [nsekhar@ti.com: renamed "ctl" to "d", simplified indexing logic for chips and
      took care of odd bank handling in irq handler]
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      f299bb95
  26. 08 6月, 2011 1 次提交
  27. 29 3月, 2011 2 次提交