- 12 1月, 2021 1 次提交
-
-
由 Heiner Kallweit 提交于
RTL8168dp is ancient anyway, and I haven't seen any trace of its early version 27 yet. This chip versions needs quite some special handling, therefore it would facilitate driver maintenance if support for it could be dropped. For now just disable detection of this chip version. If nobody complains we can remove support for it in the near future. v2: - extend unknown chip version error message Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/ca98f018-a0e1-8762-e95c-f0ad773a0271@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
- 10 1月, 2021 13 次提交
-
-
由 Rafał Miłecki 提交于
BCM4908 family SoCs come with integrated Starfighter 2 switch. Its registers layout it a mix of BCM7278 and BCM7445. It has 5 integrated PHYs and 8 ports. It also supports RGMII and SerDes. Signed-off-by: NRafał Miłecki <rafal@milecki.pl> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210106213202.17459-3-zajec5@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Heiner Kallweit 提交于
If WOL isn't enabled, then there's no need to enable wakeup from D3 on system shutdown. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Heiner Kallweit 提交于
Use WARN_ONCE here to get a call trace in case of a problem. This facilitates finding the offending code part. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Heiner Kallweit 提交于
Use WARN here to avoid stopping the system. In addition print the addr and mask values that triggered the warning. v2: - return on WARN to avoid an invalid register write Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ioana Ciornei 提交于
The MC firmware takes these PAUSE/ASYM_PAUSE flags provided by the driver, transforms them back into rx/tx pause enablement status and applies them to hardware. We are not losing information by this transformation, thus remove the comment. Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ioana Ciornei 提交于
The dpaa2-eth driver has phylink integration only if the connected dpmac object is in TYPE_PHY (aka the PCS/PHY etc link status is managed by Linux instead of the firmware). The check is thus unnecessary because the code path that reaches the .mac_link_up() callback is only with TYPE_PHY dpmac objects. Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ioana Ciornei 提交于
The fsl_mc_get_endpoint() function now returns -EPROBE_DEFER when the dpmac device was not yet discovered by the fsl-mc bus. When this happens, pass the error code up so that we can retry the probe at a later time. Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ioana Ciornei 提交于
If the network interface object is connected to a MAC of TYPE_FIXED, the link status management is handled exclusively by the firmware. This does not mean that the driver cannot access the MAC counters and export them in ethtool. For this to happen, we open the attached dpmac device and keep a pointer to it in priv->mac. Because of this, all the checks in the driver of the following form 'if (priv->mac)' have to be updated to actually check the dpmac attribute and not rely on the presence of a non-NULL value. Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ioana Ciornei 提交于
Split up the initialization phase of the dpmac object from actually configuring the phylink instance, connecting to it and configuring the MAC. This is done so that even though the dpni object is connected to a dpmac which has link management handled by the firmware we are still able to export the MAC counters. Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Eric Dumazet 提交于
napi_gro_receive() can never return GRO_DROP GRO_DROP can only be returned from napi_gro_frags() which is the other NAPI GRO entry point. Followup patch will remove GRO_DROP, because drivers are not supposed to call napi_gro_frags() if prior napi_get_frags() has failed. Note that I have left the gro_dropped variable. I leave to ice maintainers the decision to further remove it from ethtool -S results. Signed-off-by: NEric Dumazet <edumazet@google.com> Acked-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Alex Elder 提交于
Arrange for the IPA driver to be built when COMPILE_TEST is enabled. Update the help text to reflect that we support two Qualcomm SoCs. Suggested-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NAlex Elder <elder@linaro.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Alex Elder 提交于
The second argument to gsi_trans_page_add() is a page pointer. That declaration is found in header files used by "gsi_trans.h" for (at least) arm64 and x86 builds, but apparently not for alpha builds. Fix this by adding a declaration of struct page to the top of "gsi_trans.h". Reported-by: Nkernel test robot <lkp@intel.com> Signed-off-by: NAlex Elder <elder@linaro.org> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Lijun Pan 提交于
Commit b27507bb ("net/ibmvnic: unlock rtnl_lock in reset so linkwatch_event can run") introduced do_change_param_reset function to solve the rtnl lock issue. Majority of the code in do_change_param_reset duplicates do_reset. Also, we can handle the rtnl lock issue in do_reset itself. Hence merge do_change_param_reset back into do_reset to clean up the code. Signed-off-by: NLijun Pan <ljp@linux.ibm.com> Link: https://lore.kernel.org/r/20210106213514.76027-1-ljp@linux.ibm.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
- 09 1月, 2021 5 次提交
-
-
由 Julian Wiedmann 提交于
sparse complains about some harmless endianness issues: > drivers/net/ppp/pptp.c:281:21: warning: incorrect type in assignment (different base types) > drivers/net/ppp/pptp.c:281:21: expected unsigned int [usertype] ack > drivers/net/ppp/pptp.c:281:21: got restricted __be32 > drivers/net/ppp/pptp.c:283:23: warning: cast to restricted __be32 Here 'ack' is assigned a value in network-order, and then also the byte-swapped value in host-order. Clean this up by doing the byte-swap as part of the assignment. > drivers/net/ppp/pptp.c:358:26: warning: cast from restricted __be16 > drivers/net/ppp/pptp.c:358:26: warning: incorrect type in argument 1 (different base types) > drivers/net/ppp/pptp.c:358:26: expected unsigned short [usertype] call_id > drivers/net/ppp/pptp.c:358:26: got restricted __be16 [usertype] Here we use the wrong flavour of byte-swap. Use ntohs(), which of course gives the same result. Cc: Dmitry Kozlov <xeb@mail.ru> Signed-off-by: NJulian Wiedmann <jwi@linux.ibm.com> Link: https://lore.kernel.org/r/20210107143956.25549-1-jwi@linux.ibm.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Rafał Miłecki 提交于
UniMAC is integrated into multiple Broadcom's Ethernet controllers so use a shared header file for it and avoid some code duplication. Signed-off-by: NRafał Miłecki <rafal@milecki.pl> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NDoug Berger <opendmb@gmail.com> Link: https://lore.kernel.org/r/20210107180051.1542-2-zajec5@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Rafał Miłecki 提交于
UniMAC is a hardware block commonly used in Broadcom Ethernet controllers that should get its own header file. Not every controller has it mapped at the 0x800 offset so add bgmac access helpers. They will allow using shared register defines. Signed-off-by: NRafał Miłecki <rafal@milecki.pl> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210107180051.1542-1-zajec5@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Sergey Shtylyov 提交于
The "undocumented" annotations in the EtherAVB driver were done against the R-Car gen2 manuals; most of these registers/bits were then described in the R-Car gen3 manuals -- reflect this fact in the annotations (note that ECSIPR.LCHNGIP was documented in the recent R-Car gen2 manual)... Signed-off-by: NSergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Sergey Shtylyov 提交于
According to the R-Car Series, 3rd Generation User's Manual: Hardware, Rev. 1.50, there's no APSR.DM field, instead there are 2 independent RX/TX clock internal delay bits. Follow the suit: remove #define APSR_DM and rename #define's APSR_DM_{R|T}DM to APSR_{R|T}DM. While at it, do several more things to the declaration of *enum* APSR_BIT: - remove superfluous indentation; - annotate APSR_MEMS as undocumented; - annotate APSR as R-Car Gen3 only. Signed-off-by: NSergey Shtylyov <s.shtylyov@omprussia.ru> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
- 08 1月, 2021 21 次提交
-
-
由 Aleksander Jan Bajkowski 提交于
Exclude RMII from modes that report 1 GbE support. Reduced MII supports up to 100 MbE. Fixes: 14fceff4 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") Signed-off-by: NAleksander Jan Bajkowski <olek2@wp.pl> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210107195818.3878-1-olek2@wp.plSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Colin Ian King 提交于
Currently the error return paths don't kfree lmac and lmac->name leading to some memory leaks. Fix this by adding two error return paths that kfree these objects Addresses-Coverity: ("Resource leak") Fixes: 1463f382 ("octeontx2-af: Add support for CGX link management") Signed-off-by: NColin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210107123916.189748-1-colin.king@canonical.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
CPL_ABORT_RPL is sent after releasing the resources by calling chtls_release_resources(sk); and chtls_conn_done(sk); eventually causing kernel panic. Fixing it by calling release in appropriate order. Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NVinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
In case of server removal lookup_stid() may return NULL pointer, which is used as listen_ctx. So added a check before accessing this pointer. Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NVinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
The skb is unlinked twice, one in __skb_dequeue in function chtls_reset_synq() and another in cleanup_syn_rcv_conn(). So in this patch using skb_peek() instead of __skb_dequeue(), so that unlink will be handled only in cleanup_syn_rcv_conn(). Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NVinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
In chtls_pass_accept_request(), removing the chtls_reqsk_free() call to avoid oreq freeing twice. Here oreq is the pointer to struct request_sock. Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
If route to peer is not configured, we might get non tls devices from dst_neigh_lookup() which is invalid, adding a check to avoid it. Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
At the time of SYN_RECV, connection information is not initialized at FW, updating tcb flag over uninitialized connection causes adapter crash. We don't need to update the flag during SYN_RECV state, so avoid this. Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Ayush Sawal 提交于
send_abort_rpl() is not calculating cpl_abort_req_rss offset and ends up sending wrong TID with abort_rpl WR causng tid leaks. Replaced send_abort_rpl() with chtls_send_abort_rpl() as it is redundant. Fixes: cc35c88a ("crypto : chtls - CPL handler definition") Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com> Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Jonathan Lemon 提交于
Replace direct assignments with skb_zcopy_init() for zerocopy cases where a new skb is initialized, without changing the reference counts. Signed-off-by: NJonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Jonathan Lemon 提交于
In preparation for expanded zerocopy (TX and RX), move the zerocopy related bits out of tx_flags into their own flag word. Signed-off-by: NJonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Jonathan Lemon 提交于
Add an optional skb parameter to the zerocopy callback parameter, which is passed down from skb_zcopy_clear(). This gives access to the original skb, which is needed for upcoming RX zero-copy error handling. Signed-off-by: NJonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Martin Blumenstingl 提交于
Amlogic Meson G12A (and newer: G12B, SM1) SoCs have a more advanced RX delay logic. Instead of fine-tuning the delay in the nanoseconds range it now allows tuning in 200 picosecond steps. This support comes with new bits in the PRG_ETH1[19:16] register. Add support for validating the RGMII RX delay as well as configuring the register accordingly on these platforms. Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Martin Blumenstingl 提交于
Newer SoCs starting with the Amlogic Meson G12A have more a precise RGMII RX delay configuration register. This means more complexity in the code. Extract the existing RGMII delay configuration code into a separate function to make it easier to read/understand even when adding more logic in the future. Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Martin Blumenstingl 提交于
Amlogic Meson G12A, G12B and SM1 SoCs have a more advanced RGMII RX delay register which allows picoseconds precision. Parse the new "rx-internal-delay-ps" property or fall back to the value from the old "amlogic,rx-delay-ns" property. No upstream DTB uses the old "amlogic,rx-delay-ns" property (yet). Only include minimalistic logic to fall back to the old property, without any special validation (for example if the old and new property are given at the same time). Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Martin Blumenstingl 提交于
The timing-adjustment clock only has to be enabled when a) there is a 2ns RX delay configured using device-tree and b) the phy-mode indicates that the RX delay should be enabled. Only enable the RX delay if both are true, instead of (by accident) also enabling it when there's the 2ns RX delay configured but the phy-mode incicates that the RX delay is not used. Fixes: 9308c476 ("net: stmmac: dwmac-meson8b: add support for the RX delay configuration") Reported-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Vladimir Oltean 提交于
The SYSTEMPORT driver maps each port of the embedded Broadcom DSA switch port to a certain queue of the master Ethernet controller. For that it currently uses a dedicated notifier infrastructure which was added in commit 60724d4b ("net: dsa: Add support for DSA specific notifiers"). However, since commit 2f1e8ea7 ("net: dsa: link interfaces with the DSA master to get rid of lockdep warnings"), DSA is actually an upper of the Broadcom SYSTEMPORT as far as the netdevice adjacency lists are concerned. So naturally, the plain NETDEV_CHANGEUPPER net device notifiers are emitted. It looks like there is enough API exposed by DSA to the outside world already to make the call_dsa_notifiers API redundant. So let's convert its only user to plain netdev notifiers. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Vladimir Oltean 提交于
It is a bit strange to see something as specific as Broadcom SYSTEMPORT bits in the main DSA include file. Move these away into a separate header, and have the tagger and the SYSTEMPORT driver include them. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Vladimir Oltean 提交于
Given the following setup: ip link add br0 type bridge ip link set eno0 master br0 ip link set swp0 master br0 ip link set swp1 master br0 ip link set swp2 master br0 ip link set swp3 master br0 Currently, packets received on a DSA slave interface (such as swp0) which should be routed by the software bridge towards a non-switch port (such as eno0) are also flooded towards the other switch ports (swp1, swp2, swp3) because the destination is unknown to the hardware switch. This patch addresses the issue by monitoring the addresses learnt by the software bridge on eno0, and adding/deleting them as static FDB entries on the CPU port accordingly. Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Heiner Kallweit 提交于
According to Realtek the ERI register 0x1a8 quirk is needed to work around a hw issue with the PHY on RTL8168g. The register needs to be changed before powering down the PHY. Currently we don't meet this requirement, however I'm not aware of any problems caused by this. Therefore I see the change as an improvement. The PHY driver has no means to access the chip ERI registers, therefore we have to intercept MDIO writes to BMCR register. If the BMCR_PDOWN bit is going to be set, then let's apply the quirk before actually powering down the PHY. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-
由 Heiner Kallweit 提交于
No functional change here. We just move a code block to avoid a function forward declaration in a subsequent change. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com> Signed-off-by: NJakub Kicinski <kuba@kernel.org>
-