1. 27 2月, 2016 1 次提交
  2. 01 12月, 2015 1 次提交
  3. 13 10月, 2015 1 次提交
  4. 14 7月, 2015 5 次提交
  5. 01 4月, 2015 1 次提交
  6. 15 3月, 2015 1 次提交
    • M
      ARM: omap: convert wakeupgen to stacked domains · 7136d457
      Marc Zyngier 提交于
      OMAP4/5 has been (ab)using the gic_arch_extn to provide
      wakeup from suspend, and it makes a lot of sense to convert
      this code to use stacked domains instead.
      
      This patch does just this, updating the DT files to actually
      reflect what the HW provides.
      
      BIG FAT WARNING: because the DTs were so far lying by not
      exposing the WUGEN HW block, kernels with this patch applied
      won't have any suspend-resume facility when booted with old DTs,
      and old kernels with updated DTs won't even boot.
      
      On a platform with this patch applied, the system looks like
      this:
      
      root@bacon-fat:~# cat /proc/interrupts
                  CPU0       CPU1
       16:          0          0     WUGEN  37  gp_timer
       19:     233799     155916       GIC  27  arch_timer
       23:          0          0     WUGEN   9  l3-dbg-irq
       24:          1          0     WUGEN  10  l3-app-irq
       27:        282          0     WUGEN  13  omap-dma-engine
       44:          0          0  4ae10000.gpio  13  DMA
      294:          0          0     WUGEN  20  gpmc
      297:        506          0     WUGEN  56  48070000.i2c
      298:          0          0     WUGEN  57  48072000.i2c
      299:          0          0     WUGEN  61  48060000.i2c
      300:          0          0     WUGEN  62  4807a000.i2c
      301:          8          0     WUGEN  60  4807c000.i2c
      308:       2439          0     WUGEN  74  OMAP UART2
      312:        362          0     WUGEN  83  mmc2
      313:        502          0     WUGEN  86  mmc0
      314:         13          0     WUGEN  94  mmc1
      350:          0          0      PRCM  pinctrl, pinctrl
      406:   35155709          0       GIC 109  ehci_hcd:usb1
      407:          0          0     WUGEN   7  palmas
      409:          0          0     WUGEN 119  twl6040
      410:          0          0   twl6040   5  twl6040_irq_ready
      411:          0          0   twl6040   0  twl6040_irq_th
      IPI0:          0          1  CPU wakeup interrupts
      IPI1:          0          0  Timer broadcast interrupts
      IPI2:      95334     902334  Rescheduling interrupts
      IPI3:          0          0  Function call interrupts
      IPI4:        479        648  Single function call interrupts
      IPI5:          0          0  CPU stop interrupts
      IPI6:          0          0  IRQ work interrupts
      IPI7:          0          0  completion interrupts
      Err:          0
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
      7136d457
  7. 08 1月, 2015 1 次提交
  8. 22 11月, 2014 1 次提交
  9. 11 11月, 2014 1 次提交
  10. 30 10月, 2014 1 次提交
    • T
      ARM: dts: Fix wrong GPMC size mappings for omaps · e2c5eb78
      Tony Lindgren 提交于
      The GPMC binding is obviously very confusing as the values
      are all over the place. People seem to confuse the GPMC partition
      size for the chip select, and the device IO size within the GPMC
      partition easily.
      
      The ranges entry contains the GPMC partition size. And the
      reg entry contains the size of the IO registers of the
      device connected to the GPMC.
      
      Let's fix the issue according to the following table:
      
      Device          GPMC partition size     Device IO size
      connected       in the ranges entry     in the reg entry
      
      NAND            0x01000000 (16MB)       4
      16550           0x01000000 (16MB)       8
      smc91x          0x01000000 (16MB)       0xf
      smc911x         0x01000000 (16MB)       0xff
      OneNAND         0x01000000 (16MB)       0x20000 (128KB)
      16MB NOR        0x01000000 (16MB)       0x01000000 (16MB)
      32MB NOR        0x02000000 (32MB)       0x02000000 (32MB)
      64MB NOR        0x04000000 (64MB)       0x04000000 (64MB)
      128MB NOR       0x08000000 (128MB)      0x08000000 (128MB)
      256MB NOR       0x10000000 (256MB)      0x10000000 (256MB)
      
      Let's also add comments to the fixed entries while at it.
      Acked-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e2c5eb78
  11. 05 9月, 2014 3 次提交
  12. 29 7月, 2014 1 次提交
  13. 09 7月, 2014 1 次提交
  14. 16 6月, 2014 1 次提交
  15. 03 6月, 2014 1 次提交
  16. 20 5月, 2014 1 次提交
  17. 15 5月, 2014 1 次提交
  18. 07 5月, 2014 3 次提交
  19. 06 5月, 2014 1 次提交
  20. 06 3月, 2014 1 次提交
  21. 03 3月, 2014 4 次提交
  22. 21 10月, 2013 1 次提交
  23. 19 6月, 2013 2 次提交
  24. 09 4月, 2013 4 次提交
    • N
      ARM: dts: omap4-panda: move generic sections to panda-common · 4b79197c
      Nishanth Menon 提交于
      PandaBoard, PandaBoard-A4 revisions use OMAP4430.
      PandaBoard-ES version of the board uses OMAP4460.
      
      Move the original panda dts file into a common dtsi used by all panda
      variants. This allows us to introduce SoC variation for PandaBoard ES
      without impacting other PandaBoard versions that are supported.
      As part of this change, since OMAP4460 adds on to OMAP4430, add
      omap4.dtsi to omap4460.dtsi.
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Jon Hunter <jon-hunter@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Keerthy <j-keerthy@ti.com>
      Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
      4b79197c
    • N
      ARM: dts: OMAP443x: Add CPU OPP table · e77049bb
      Nishanth Menon 提交于
      Add DT OPP table for OMAP443x family of devices. This data is
      decoded by OF with of_init_opp_table() helper function.
      
      OPP data here is based on existing opp4xxx_data.c
      
      Since the omap4460 OPP tables would be different from OMAP443x,
      introduce an new omap443x.dtsi for 443x specific entries and use
      existing omap4.dtsi as the common dtsi file for all OMAP4 platforms.
      
      This is in preparation to use generic cpufreq-cpu0 driver for device
      tree enabled boot. Legacy non device tree enabled boot continues to
      use omap-cpufreq.c and opp4xxx_data.c.
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Jon Hunter <jon-hunter@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Keerthy <j-keerthy@ti.com>
      Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
      e77049bb
    • K
      ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards · ad871c10
      Kishon Vijay Abraham I 提交于
      Add usb otg data node in omap4/omap3 device tree file. Also update
      the node with board specific setting in omapx-<board>.dts file.
      The dt data specifies among others the interface type (ULPI or UTMI),
      mode which is mostly OTG, power that specifies the amount of power
      this can supply when in host mode.
      
      The information about usb otg node is available @
      Documentation/devicetree/bindings/usb/omap-usb.txt
      Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
      Acked-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
      ad871c10
    • S
      ARM: dts: omap4-panda: Add I2c pinctrl data · adb9e561
      Sourav Poddar 提交于
      Booting 3.8-rc6 on omap4 panda results in the following error
      
      [    0.444427] omap_i2c 48070000.i2c: did not get pins for i2c error: -19
      [    0.445770] omap_i2c 48070000.i2c: bus 0 rev0.11 at 400 kHz
      [    0.473937] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
      [    0.474670] omap_i2c 48072000.i2c: bus 1 rev0.11 at 400 kHz
      [    0.474822] omap_i2c 48060000.i2c: did not get pins for i2c error: -19
      [    0.476379] omap_i2c 48060000.i2c: bus 2 rev0.11 at 100 kHz
      [    0.477294] omap_i2c 48350000.i2c: did not get pins for i2c error: -19
      [    0.477996] omap_i2c 48350000.i2c: bus 3 rev0.11 at 400 kHz
      [    0.483398] Switching to clocksource 32k_counter
      
      This happens because omap4 panda dts file is not adapted to use i2c through
      pinctrl framework. Populating i2c pinctrl data to get rid of the error.
      
      Tested on omap4460 panda with 3.8-rc6 kernel.
      Signed-off-by: NSourav Poddar <sourav.poddar@ti.com>
      Reported-by: NLuciano Coelho <coelho@ti.com>
      Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
      adb9e561
  25. 07 11月, 2012 1 次提交