- 21 12月, 2014 1 次提交
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由 Magnus Damm 提交于
Remove redundant C board code for Lager Multiplatform, everything is supported via DT these days anyway so it is fine to rely on the MACHINE_START in setup-r8a7790.c. Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> [Remove CONFIG_MACH_LAGER from shmobile_defconfig] Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 12月, 2014 2 次提交
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由 Ulf Hansson 提交于
Instead of using the dev_ops ->stop|start() callbacks for genpd, let's convert to use genpd's flag field and set it to GENPD_FLAG_PM_CLK. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Ulf Hansson 提交于
Instead of using the dev_ops ->stop|start() callbacks for genpd, let's convert to use genpd's flag field and set it to GENPD_FLAG_PM_CLK. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 02 12月, 2014 2 次提交
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由 Laurent Pinchart 提交于
Platform data support has been removed from the DU driver, drop DU support from the legacy Marzen board file. The multiplatform DT-based Marzen support should be used instead. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Laurent Pinchart 提交于
Platform data support has been removed from the DU driver, drop DU support from the legacy Lager board file. The multiplatform DT-based Lager support should be used instead. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 17 11月, 2014 4 次提交
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add serial port debug macros for the SCIF(A) serial ports. This includes all supported shmobile SoCs, except for EMEV2. The configuration logic (both Kconfig and #ifdef) is more complicated than one would expect, for several reasons: 1. Not all SoCs have the same serial devices, and they're not always at the same addresses. 2. There are two different types: SCIF and SCIFA. Fortunately they can easily be distinguished by physical address. 3. Not all boards use the same serial port for the console. The defaults correspond to the boards that are supported in mainline. If you want to use a different serial port, just change the value of CONFIG_DEBUG_UART_PHYS, and the rest will auto-adapt. 4. debug_ll_io_init() maps the SCIF(A) registers to a fixed virtual address. 0xfdxxxxxx was chosen, as it should lie below VMALLOC_END = 0xff000000, and must not conflict with the 2 MiB reserved region at PCI_IO_VIRT_BASE = 0xfee00000. - On SoCs not using the legacy machine_desc.map_io(), debug_ll_io_init() is called by the ARM core code. - On SoCs using the legacy machine_desc.map_io(), debug_ll_io_init() must be called explicitly. Calls are added for r8a7740, r8a7779, sh7372, and sh73a0. This was derived from the r8a7790 version by Laurent Pinchart. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 11月, 2014 1 次提交
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由 Boris BREZILLON 提交于
In order to have subsytem agnostic media bus format definitions we've moved media bus definition to include/uapi/linux/media-bus-format.h and prefixed values with MEDIA_BUS_FMT instead of V4L2_MBUS_FMT. Reference new definitions in all platform drivers. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NHans Verkuil <hans.verkuil@cisco.com> Acked-by: NSakari Ailus <sakari.ailus@linux.intel.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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- 13 11月, 2014 1 次提交
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由 Daniel Lezcano 提交于
The only place where the time is invalid is when the ACPI_CSTATE_FFH entry method is not set. Otherwise for all the drivers, the time can be correctly measured. Instead of duplicating the CPUIDLE_FLAG_TIME_VALID flag in all the drivers for all the states, just invert the logic by replacing it by the flag CPUIDLE_FLAG_TIME_INVALID, hence we can set this flag only for the acpi idle driver, remove the former flag from all the drivers and invert the logic with this flag in the different governor. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 12 11月, 2014 3 次提交
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由 Arnd Bergmann 提交于
In a combined ARMv6/v7 kernel, the setup-rcar-gen2.c cannot currently be compiled correctly because it uses the isb instruction that is not available on ARMv6. Adding the -march=armv7-a flag lets the compiler know that it is safe to build this file for ARMv7. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Port the sh73a0 restart handling from the kzm9g-legacy board code to the generic sh73a0 code. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
On sh73a0/kzm9g-legacy, probing of the i2c masters fails with: i2c-sh_mobile i2c-sh_mobile.0: timing values out of range: L/H=0x208/0x1bf sh_mobile: probe of i2c-sh_mobile.0 failed with error -22 According to the datasheet, the transfer rate is derived from the HP clock (which runs at 104 MHz) divided by two. Hence i2c_sh_mobile_platform_data.clks_per_count should be set to two. Now probing succeeds, and i2c works: i2c-sh_mobile i2c-sh_mobile.0: I2C adapter 0 with bus speed 100000 Hz (L/H=0x104/0xe0) Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 10 11月, 2014 4 次提交
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由 Geert Uytterhoeven 提交于
Port the sh73a0 restart handling from the kzm9g-legacy board code to the kzm9g-reference board code. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
According to the datasheet, the operating clock for IIC0 is the HPP (RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same speed (50 Mhz). This is consistent with IIC0 being located in the A4R PM domain, and IIC1 in the A3SP PM domain. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
This clock drives the irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. By making it available to the driver, we make sure it gets enabled when needed, and allow it to be managed by system or runtime PM. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Shinobu Uehara 提交于
Signed-off-by: NShinobu Uehara <shinobu.uehara.xc@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 05 11月, 2014 1 次提交
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由 Phil Edworthy 提交于
The PCI core will soon automatically handle the PCI domain number, allowing the internal PCI and external PCIe bridges work at the same time. In order for that to work, we need to enable PCI_DOMAINS. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 11月, 2014 2 次提交
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由 Hisashi Nakamura 提交于
The r8a7791 only has 2 CPU CA15 cores, not 4 CA15 and 4 CA7 cores. Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Hisashi Nakamura 提交于
APMU resources are not common to all R-Car SoCs so don't share this data. A subsequent patch will correct the CPU cores for the r8a7791. Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 30 10月, 2014 8 次提交
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由 Laurent Pinchart 提交于
The Koelsch board is supported by the r8a7791 generic DT platform definition. Remove the board-specific definition along with its board file. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
All r8a7791 boards are now used with multiplatform kernels only. We can remove all the unused r8a7791 legacy device and clock registration code. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
All features supported by the Koelsch legacy C board code are now supported by the multiplatform code, it's thus time to say bye to the legacy code. Nobody should miss it. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The function isn't used or needed anymore, remove it. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Initialise TMU device using DT when booting bockw using DT-reference. Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The marzen-reference board file doesn't need the clock.h header, don't include it. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The DU device is now instantiated from the device tree, remove the corresponding platform device. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The DU device is now instantiated from the device tree, remove the corresponding platform device. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 28 10月, 2014 11 次提交
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由 Laurent Pinchart 提交于
Most IP cores on ARM Renesas platforms can only address 32 bits of physical memory for DMA. Without CONFIG_ZONE_DMA enabled and with the recent CMA highmem allocation support, the default CMA zone is reserved above the 4GiB limit when LPAE is enabled, resulting in various driver failures. Fix the problem by selecting CONFIG_ZONE_DMA. Other options to investigate in the future would be to either enable IOMMU support or use custom CMA reservations for peripherals not supporting LPAE. While not a strict dependency, the "[PATCH 0/4] Low/high memory CMA reservation fixes" series is also required to fix a different but related CMA allocation problem. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the A3SM power domain, and hook it up as a subdomain of A4S. This domain contains the System CPU (Cortex-A9) hardware block. Hence move the special CPU handling from A4S to A3SM. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the A4SU power domain. This domain contains the USBPHY hardware block, which is currently not used by any driver. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the A4R power domain, and hook up the A3RV subdomain, and the CEU0, TMU0, and IIC0 hardware blocks. This domain also contains the Realtime CPU (SH-4A), Realtime CPU debug modules, H-UDI, RT-SHwy, INTCS, RT-HPB, VIO6C, JPU, RTDMAC1/2, SSP, MSIOF0, CMT0, ICB, DREQPAK (RT), 2DDMAC, IPMMUI, and 2DG hardware blocks, but these are currently not used by any driver. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the D4 power domain. This domain contains the Coresight-ETM hardware block. As long as the ARM debug/perf code doesn't use resource management with runtime PM support, the D4 power domain must be kept powered to avoid a crash during resume from s2ram (dbg_cpu_pm_notify() calls reset_ctrl_regs() unconditionally, causing an undefined instruction oops). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the A4MP power domain, and hook up the HDMI-Link and FSI hardware blocks. This domain also contains the SPU2, FMSI, and BBIF2 hardware blocks, but these are currently not used by any driver. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the A3SG power domain, and hook it up as a subdomain of A4S. This domain contains the SGX540 hardware block, which is currently not used by any driver. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Add support for the A3RV power domain. This domain contains the VPU5F and VCP1 hardware blocks, which are currently not used by any driver. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Commit 8459293c ("ARM: shmobile: r8a7740: add A4S pm domain support") added the A4S power domain, but forgot to hook up the GbEther hardware block. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Commit 802a5639 ("ARM: shmobile: r8a7740: add A3SP pm domain support") added the A3SP power domain, but forgot to hook up the TPU, SDHI0/1, and MMCIF hardware blocks. Note: As the default PM QoS latency constraint for SDHI is only 100 µs (cfr. commit c419e611 ("tmio_mmc / PM: Use PM QoS latency constraint"), while DEFAULT_DEV_LATENCY_NS is 250000, suspend fails with -EBUSY, unless the constraint is increased first to more than 500 µs using e.g. echo 501 > /sys/devices/platform/sh_mobile_sdhi.0/power/pm_qos_resume_latency_us Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Geert Uytterhoeven 提交于
Commit 8459293c ("ARM: shmobile: r8a7740: add A4S pm domain support") added the A4S power domain, but forgot to hook up the INTCA hardware block. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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