- 20 10月, 2019 1 次提交
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由 Michael Tretter 提交于
The tx_clk, rx_clk, and tsu_clk are optional. Currently the macb driver marks clock as not available if it receives an error when trying to get a clock. This is wrong, because a clock controller might return -EPROBE_DEFER if a clock is not available, but will eventually become available. In these cases, the driver would probe successfully but will never be able to adjust the clocks, because the clocks were not available during probe, but became available later. For example, the clock controller for the ZynqMP is implemented in the PMU firmware and the clocks are only available after the firmware driver has been probed. Use devm_clk_get_optional() in instead of devm_clk_get() to get the optional clock and propagate all errors to the calling function. Signed-off-by: NMichael Tretter <m.tretter@pengutronix.de> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Tested-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 9月, 2019 1 次提交
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由 Shubhrajyoti Datta 提交于
macb_64b_desc is always called when HW_DMA_CAP_64B is defined. So the return NULL can never be reached. Remove the dead code. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Reviewed-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 8月, 2019 1 次提交
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由 Yash Shah 提交于
Update the compatibility string for SiFive FU540-C000 as per the new string updated in the binding doc. Reference: https://lore.kernel.org/netdev/CAJ2_jOFEVZQat0Yprg4hem4jRrqkB72FKSeQj4p8P5KA-+rgww@mail.gmail.com/Signed-off-by: NYash Shah <yash.shah@sifive.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: NPaul Walmsley <paul.walmsley@sifive.com> Tested-by: NPaul Walmsley <paul.walmsley@sifive.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 7月, 2019 1 次提交
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由 Arnd Bergmann 提交于
When CONFIG_OF is disabled, we get a harmless warning about the newly added variable: drivers/net/ethernet/cadence/macb_main.c:48:39: error: 'mgmt' defined but not used [-Werror=unused-variable] static struct sifive_fu540_macb_mgmt *mgmt; Move the variable closer to its use inside of the #ifdef. Fixes: c218ad55 ("macb: Add support for SiFive FU540-C000") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 6月, 2019 2 次提交
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由 Harini Katakam 提交于
The subns increment register has 24 bits as follows: RegBit[15:0] = Subns[23:8]; RegBit[31:24] = Subns[7:0] Fix the same in the driver and increase sub ns resolution to the best capable, 24 bits. This should be the case on all GEM versions that this PTP driver supports. Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Harini Katakam 提交于
The scaled ppm parameter passed to _adjfine() contains a 16 bit fraction. This just happens to be the same as SUBNSINCR_SIZE now. Hence define this separately. Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 6月, 2019 2 次提交
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由 Palmer Dabbelt 提交于
The help text makes it look like NET_VENDOR_CADENCE enables support for Atmel devices, when in reality it's a driver written by Atmel that supports Cadence devices. This may confuse users that have this device on a non-Atmel SoC. The fix is just s/Atmel/Cadence/, but I did go and re-wrap the Kconfig help text as that change caused it to go over 80 characters. Signed-off-by: NPalmer Dabbelt <palmer@sifive.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Palmer Dabbelt 提交于
commit c218ad55 ("macb: Add support for SiFive FU540-C000") added a dependency on the common clock framework to the macb driver, but didn't express that dependency in Kconfig. As a result macb now fails to compile on systems without COMMON_CLK, which specifically causes a build failure on powerpc allyesconfig. This patch adds the dependency, which results in the macb driver no longer being selectable on systems without the common clock framework. All known systems that have this device already support the common clock framework, so this should not cause trouble for any uses. Supporting both the FU540-C000 and systems without COMMON_CLK is quite ugly. I've build tested this on powerpc allyesconfig and RISC-V defconfig (which selects MACB), but I have not even booted the resulting kernels. Fixes: c218ad55 ("macb: Add support for SiFive FU540-C000") Signed-off-by: NPalmer Dabbelt <palmer@sifive.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 6月, 2019 2 次提交
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由 Antoine Tenart 提交于
This patch updates the macb driver to use NAPI GRO helpers when receiving SKBs. This improves performances. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Antoine Tenart 提交于
Use NAPI_POLL_WEIGHT, the default NAPI poll() weight instead of redefining our own value (which turns out to be 64 as well). Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 6月, 2019 1 次提交
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由 Antoine Tenart 提交于
This patch fixes the MAC address setup in the probe. The MAC address retrieved using of_get_mac_address was checked for not containing an error, but it may also be NULL which wasn't tested. Fix it by replacing IS_ERR with IS_ERR_OR_NULL. Fixes: 541ddc66 ("net: macb: support of_get_mac_address new ERR_PTR error") Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 6月, 2019 2 次提交
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由 Thomas Gleixner 提交于
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NEnrico Weigelt <info@metux.net> Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Yash Shah 提交于
The management IP block is tightly coupled with the Cadence MACB IP block on the FU540, and manages many of the boundary signals from the MACB IP. This patch only controls the tx_clk input signal to the MACB IP. Future patches may add support for monitoring or controlling other IP boundary signals. Signed-off-by: NYash Shah <yash.shah@sifive.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 6月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 of the license as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 8 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAllison Randal <allison@lohutok.net> Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NAlexios Zavras <alexios.zavras@intel.com> Reviewed-by: NArmijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000437.144869442@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 5月, 2019 1 次提交
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由 Claudiu Beznea 提交于
SAMA5D2 SoC has a suspend mode where SoC's power is cut off. Due to this the registers content is lost after a suspend/resume cycle. The current suspend/resume implementation covers some of these registers. However there are few which were not treated (e.g. SCRT2 and USRIO). Apart from this, netdev features are not restored. Treat these issues. Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 5月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 15 5月, 2019 1 次提交
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由 Luca Ceresoli 提交于
Errors are negative numbers. Using %u shows them as very large positive numbers such as 4294967277 that don't make sense. Use the %d format instead, and get a much nicer -19. Signed-off-by: NLuca Ceresoli <luca@lucaceresoli.net> Fixes: b48e0bab ("net: macb: Migrate to devm clock interface") Fixes: 93b31f48 ("net/macb: unify clock management") Fixes: 421d9df0 ("net/macb: merge at91_ether driver into macb driver") Fixes: aead88bd ("net: ethernet: macb: Add support for rx_clk") Fixes: f5473d1d ("net: macb: Support clock management for tsu_clk") Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 5月, 2019 1 次提交
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由 Harini Katakam 提交于
Current order in open: -> Enable interrupts (macb_init_hw) -> Enable NAPI -> Start PHY Sequence of RX handling: -> RX interrupt occurs -> Interrupt is cleared and interrupt bits disabled in handler -> NAPI is scheduled -> In NAPI, RX budget is processed and RX interrupts are re-enabled With the above, on QEMU or fixed link setups (where PHY state doesn't matter), there's a chance macb RX interrupt occurs before NAPI is enabled. This will result in NAPI being scheduled before it is enabled. Fix this macb open by changing the order. Fixes: ae1f2a56 ("net: macb: Added support for many RX queues") Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 5月, 2019 1 次提交
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由 Petr Štetiar 提交于
There was NVMEM support added directly to of_get_mac_address, and it uses nvmem_get_mac_address under the hood, so we can remove it. As of_get_mac_address can now return ERR_PTR encoded error values, adjust to that as well. Signed-off-by: NPetr Štetiar <ynezz@true.cz> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 5月, 2019 2 次提交
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由 Nicolas Ferre 提交于
This structure was used intensively for machine specific values when DT was not used. Since the removal of AVR32 from the kernel, this structure is only used for passing clocks from PCI macb wrapper, all other fields being 0. All other known platforms use DT. Remove the leftovers but make sure that PCI macb still works as expected by using default values: - phydev->irq is set to PHY_POLL by mdiobus_alloc() - mii_bus->phy_mask is cleared while allocating it - bp->phy_interface is set to PHY_INTERFACE_MODE_MII if mode not found in DT. This simplifies driver probe path and particularly phy handling. Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Ferre 提交于
While moving the chunk of code during 739de9a1 ("net: macb: Reorganize macb_mii bringup"), the declaration of struct phy_device declaration was kept. It's not useful in this function as we alrady have a phydev pointer. Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 4月, 2019 1 次提交
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由 Paul Thomas 提交于
Make sure SKBTX_HW_TSTAMP (i.e. SOF_TIMESTAMPING_TX_HARDWARE) has been enabled for this skb. It does fix the issue where normal socks that aren't expecting a timestamp will not wake up on select, but when a user does want a SOF_TIMESTAMPING_TX_HARDWARE it does work. Signed-off-by: NPaul Thomas <pthomas8589@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 3月, 2019 1 次提交
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由 Harini Katakam 提交于
Both PCLK and HCLK are "required" clocks according to macb devicetree documentation. There is a chance that devm_clk_get doesn't return a negative error but just a NULL clock structure instead. In such a case the driver proceeds as usual and uses pclk value 0 to calculate MDC divisor which is incorrect. Hence fix the same in clock initialization. Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 3月, 2019 1 次提交
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由 Wolfram Sang 提交于
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 3月, 2019 4 次提交
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由 Harini Katakam 提交于
When macb device is suspended and system is powered down, the clocks are removed and hence macb should be closed gracefully and restored upon resume. This patch does the same by switching off the net device, suspending phy and performing necessary cleanup of interrupts and BDs. Upon resume, all these are reinitialized again. Reset of macb device is done only when GEM is not a wake device. Even when gem is a wake device, tx queues can be stopped and ptp device can be closed (tsu clock will be disabled in pm_runtime_suspend) as wake event detection has no dependency on this. Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Harini Katakam 提交于
Add runtime pm functions and move clock handling there. Add runtime PM calls to mdio functions to allow for active mdio bus. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Harini Katakam 提交于
TSU clock needs to be enabled/disabled as per support in devicetree and it should also be controlled during suspend/resume (WOL has no dependency on this clock). Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Harini Katakam 提交于
Replace the while loop in MDIO read/write functions with a timeout. In addition, add a check for MDIO bus busy before initiating a new operation as well to make sure there is no ongoing MDIO operation. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: NSai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 2月, 2019 1 次提交
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由 Huang Zijiang 提交于
The skb should be freed by dev_consume_skb_any() in macb_pad_and_fcs() when *skb is still used. The *skb is be replaced by nskb, so the original *skb should be consumed(not drop). Signed-off-by: NHuang Zijiang <huang.zijiang@zte.com.cn> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 2月, 2019 1 次提交
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由 Yang Wei 提交于
dev_consume_skb_irq() should be called in at91ether_interrupt() when skb xmit done. It makes drop profiles(dropwatch, perf) more friendly. Signed-off-by: NYang Wei <yang.wei9@zte.com.cn> Reviewed-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 2月, 2019 1 次提交
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由 Christoph Hellwig 提交于
The DMA API generally relies on a struct device to work properly, and only barely works without one for legacy reasons. Pass the easily available struct device from the platform_device to remedy this. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 2月, 2019 1 次提交
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由 Nicolas Ferre 提交于
Add a new compatibility string for this product. It's using at91sam9260-macb layout but has a newer hardware revision: it's safer to use its own string. Signed-off-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 1月, 2019 1 次提交
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由 Harini Katakam 提交于
The interrupt handler contains a workaround for RX hang applicable to Zynq and AT91RM9200 only. Subsequent versions do not need this workaround. This workaround unnecessarily resets RX whenever RX used bit read is observed, which can be often under heavy traffic. There is no other action performed on RX UBR interrupt. Hence introduce a CAPS mask; enable this interrupt and workaround only on affected versions. Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 1月, 2019 1 次提交
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由 Claudiu Beznea 提交于
Commit 653e92a9 ("net: macb: add support for padding and fcs computation") introduced a bug fixed by commit 899ecaed ("net: ethernet: cadence: fix socket buffer corruption problem"). Code removed in this patch is not reachable at all so remove it. Fixes: 653e92a9 ("net: macb: add support for padding and fcs computation") Cc: Tristram Ha <Tristram.Ha@microchip.com> Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 12月, 2018 4 次提交
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由 Anssi Hannula 提交于
When reading buffer descriptors on RX or on TX completion, an RX_USED/TX_USED bit is checked first to ensure that the descriptors have been populated, i.e. the ownership has been transferred. However, there are no memory barriers to ensure that the data protected by the RX_USED/TX_USED bit is up-to-date with respect to that bit. Specifically: - TX timestamp descriptors may be loaded before ctrl is loaded for the TX_USED check, which is racy as the descriptors may be updated between the loads, causing old timestamp descriptor data to be used. - RX ctrl may be loaded before addr is loaded for the RX_USED check, which is racy as a new frame may be written between the loads, causing old ctrl descriptor data to be used. This issue exists for both macb_rx() and gem_rx() variants. Fix the races by adding DMA read memory barriers on those paths and reordering the reads in macb_rx(). I have not observed any actual problems in practice caused by these being missing, though. Tested on a ZynqMP based system. Fixes: 89e5785f ("[PATCH] Atmel MACB ethernet driver") Signed-off-by: NAnssi Hannula <anssi.hannula@bitwise.fi> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Anssi Hannula 提交于
Bit RX_USED set to 0 in the address field allows the controller to write data to the receive buffer descriptor. The driver does not ensure the ctrl field is ready (cleared) when the controller sees the RX_USED=0 written by the driver. The ctrl field might only be cleared after the controller has already updated it according to a newly received frame, causing the frame to be discarded in gem_rx() due to unexpected ctrl field contents. A message is logged when the above scenario occurs: macb ff0b0000.ethernet eth0: not whole frame pointed by descriptor Fix the issue by ensuring that when the controller sees RX_USED=0 the ctrl field is already cleared. This issue was observed on a ZynqMP based system. Fixes: 4df95131 ("net/macb: change RX path for GEM") Signed-off-by: NAnssi Hannula <anssi.hannula@bitwise.fi> Tested-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Anssi Hannula 提交于
64-bit DMA addresses are split in upper and lower halves that are written in separate fields on GEM. For RX, bit 0 of the address is used as the ownership bit (RX_USED). When the RX_USED bit is unset the controller is allowed to write data to the buffer. The driver does not guarantee that the controller already sees the upper half when the RX_USED bit is cleared, possibly resulting in the controller writing an incoming frame to an address with an incorrect upper half and therefore possibly corrupting unrelated system memory. Fix that by adding the necessary DMA memory barrier between the writes. This corruption was observed on a ZynqMP based system. Fixes: fff8019a ("net: macb: Add 64 bit addressing support for GEM") Signed-off-by: NAnssi Hannula <anssi.hannula@bitwise.fi> Acked-by: NHarini Katakam <harini.katakam@xilinx.com> Tested-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Claudiu Beznea 提交于
On some platforms (currently detected only on SAMA5D4) TX might stuck even the pachets are still present in DMA memories and TX start was issued for them. This happens due to race condition between MACB driver updating next TX buffer descriptor to be used and IP reading the same descriptor. In such a case, the "TX USED BIT READ" interrupt is asserted. GEM/MACB user guide specifies that if a "TX USED BIT READ" interrupt is asserted TX must be restarted. Restart TX if used bit is read and packets are present in software TX queue. Packets are removed from software TX queue if TX was successful for them (see macb_tx_interrupt()). Signed-off-by: NClaudiu Beznea <claudiu.beznea@microchip.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 12月, 2018 1 次提交
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由 Bartosz Golaszewski 提交于
We now have a generalized helper routine to read the MAC address from nvmem which takes struct device as argument. The nvmem subsystem will then try device tree first before all other potential providers. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 10月, 2018 1 次提交
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由 Tristram Ha 提交于
Socket buffer is not re-created when headroom is 2 and tailroom is 1. Signed-off-by: NTristram Ha <Tristram.Ha@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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