This adds initial Evergreen KMS support, it doesn't include
any acceleration features or interrupt handling yet.

Major changes are DCE4 handling for PLLs for the > 2 crtcs.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Also add single crtc for RN50 chips.

changes in v2:
fix vblank init to respect single crtc flag
fix r100 mode bandwidth to respect single crtc flag
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NFabian Henze <hoacha@quantentunnel.de>
Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

These are new AMD IGP chips
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Also, fix ordering for a couple others
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@linux.ie>

These aren't used that much on r600, but may be needed in the future,
so get them correct now.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds the PCI IDs for the rv790 which are equiv to the rv770.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds drm support for the RV740 family of chips to the r600 support code.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

This had been delayed for some time due to failure to work on the one piece
of G41 hardware we had, and lack of success reports from anybody else.
Current hardware appears to be OK.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
[anholt: hand-applied due to conflicts with IGD patches]
Signed-off-by: NEric Anholt <eric@anholt.net>

Support the Intel 854 Chipset in fbdev.

We test and use the patch on a Thomson IP1101 IPTV-Box.  On the VGA-Port
we get a normal signal.

Here is the link to the Mambux-Project: http://www.mambux.de

Cc: Keith Packard <keithp@keithp.com>
Cc: Dave Airlie <airlied@linux.ie>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: NStefan Husemann <shusemann@googlemail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This adds some new RS780 pci ids
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This is a G33-like desktop and mobile chipset.
Signed-off-by: NShaohua Li <shaohua.li@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This fixes hangs on 855-class hardware by avoiding double attachment of the
driver due to the stub second head device having the same pci id as the real
device.

Other DRM drivers probably want this treatment as well, but I'm applying it
just to this one for safety. But we should clean up the drm_pciids.h mess
now so that each driver has its own pci id list header in its own directory.
Lets do that in the next release.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Someone noticed these registers moved around for later chips,
so we redo the codepaths per-chip. PCIE chips don't appear to
require explicit enables.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds support for the RS400 family of IGPs for Intel CPUs.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds support for the HS2100 IGP chipset.
Signed-off-by: NDave Airlie <airlied@redhat.com>

With the coming of kernel based modesetting and the memory manager stuff,
the everything in one directory approach was getting very ugly and
starting to be unmanageable.

This restructures the drm along the lines of other kernel components.

It creates a drivers/gpu/drm directory and moves the hw drivers into
subdirectores. It moves the includes into an include/drm, and
sets up the unifdef for the userspace headers we should be exporting.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

We only support RS480 (AMD based IGP) at the moment not
RS400 (Intel based IGP) ones.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This fixes up the RV550 chips which are based on RV515, not RV530.
It also adds another RS690 PCI ID.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds support for configuring the RS690 GART.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds CP support for the r500 series of chips, and allows
accel 2D support on these chips with a new radeon driver.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds new chipset id in drm.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NDave Airlie <airlied@linux.ie>

E7221 chipset is a server version of the i915.
Signed-off-by: NDave Airlie <airlied@linux.ie>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

0x1106, 0x7204 is unknown and thus is not an IGP/GPU.
0x1106, 0x3304 is K8M800 hostbridge, not an IGP/GPU.
None of them are in drm git tree.
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds support for some of the XGI Volari family that are based on the
SiS.
Signed-off-by: NDave Airlie <airlied@linux.ie>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory.  So, we have the X Server allocate that memory and tell
us the address, instead.
Signed-off-by: NDave Airlie <airlied@linux.ie>

Signed-off-by: NDave Airlie <airlied@linux.ie>

Add more IGP chipset PCI IDs
Signed-off-by: NDave Airlie <airlied@linux.ie>

radeon: make PCI GART aperture size variable, but making table size variable
    This is precursor to getting a TTM backend for this stuff, and also
    allows the PCI table to be allocated at fb 0
radeon: add support for reverse engineered xpress200m

    The IGPGART setup code was traced using mmio-trace on fglrx by myself
    and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.

    This code doesn't let the 3D driver work properly as the card has no
    vertex shader support.

    Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
    work on.
Signed-off-by: NDave Airlie <airlied@linux.ie>

Signed-off-by: NDave Airlie <airlied@linux.ie>

Signed-off-by: NDave Airlie <airlied@linux.ie>

Disable 3D functionality and AGP DMA for chipsets with the DX9 3D engine.
Signed-off-by: NDave Airlie <airlied@linux.ie>