- 27 3月, 2010 3 次提交
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由 Dan Williams 提交于
Simple conditional struct filler to cut out some duplicated code. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
Convert the device_is_tx_complete() operation on the DMA engine to a generic device_tx_status()operation which can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE, DMA_TX_PAUSED. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
Convert the device_terminate_all() operation on the DMA engine to a generic device_control() operation which can now optionally support also pausing and resuming DMA on a certain channel. Implemented for the COH 901 318 DMAC as an example. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 02 3月, 2010 5 次提交
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由 Guennadi Liakhovetski 提交于
This patch extends the .device_terminate_all() method of the shdma driver to return number of bytes transfered in the current descriptor. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Provided platforms implement runtime PM, this disables the controller, when not in use. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
The shdma dmaengine driver currently uses numerous macros to support various platforms, selected by ifdef's. Convert it to use platform device resources and lists of channel descriptors to specify register locations, interrupt numbers and other system-specific configuration variants. Unavoidably, we have to simultaneously convert all shdma users to provide those resources. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Present DMA error ISR in shdma.c is bogus, it locks the system hard in multiple ways. Fix it to abort all queued transactions on all channels on the affected controller and giving submitters a chance to get a DMA_ERROR status for aborted transactions. Afterwards further functionality is again possible without the need to re-load the driver. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 08 2月, 2010 3 次提交
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由 Guennadi Liakhovetski 提交于
Tested to work with a SIU ASoC driver on sh7722 (migor). Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Slave DMA functionality uses scatter-gather arrays for data transfers, whereas memcpy just uses a single data buffer. This patch converts the current memcpy implementation in shdma.c to use scatter-gather, making it just a special case with one SG-element. This allows us to isolate descriptor list manipulations and locking into one function, thus reducing error chances. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 18 12月, 2009 1 次提交
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由 Guennadi Liakhovetski 提交于
The SH DMA driver wrongly assigns negative cookies to transfer descriptors, also, its chaining of partial descriptors is broken. The latter problem is usually invisible, because maximum transfer size per chunk is 16M, but if you artificially set this limit lower, the driver fails. Since cookies are also used in chunk management, both these problems are fixed in one patch. As side effects a possible memory leak, when descriptors are prepared, but not submitted, and multiple races have also been fixed. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NPaul Mundt <lethal@linux-sh.org> Acked-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 11 12月, 2009 2 次提交
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由 Guennadi Liakhovetski 提交于
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Guennadi Liakhovetski 提交于
The SH DMA driver by default uses 32-byte transfers, in this mode buffers and sizes have to be 32-byte aligned. Specifying this requirement also fixes Oopses with dmatest. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 23 11月, 2009 1 次提交
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由 Dan Williams 提交于
1/ Error handling code following a kzalloc should free the allocated data. 2/ Report an error when no platform data is detected Both problems fixed by moving the platform data check before the allocation, and allows a goto to be killed. Reported-by: NJulia Lawall <julia@diku.dk> Acked-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 09 9月, 2009 1 次提交
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由 Nobuhiro Iwamatsu 提交于
This supported all DMA channels, and it was tested in SH7722, SH7780, SH7785 and SH7763. This can not use with SH DMA API. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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