Recall the recently added prefix requirements:
 * "NAND_" for flags in nand.h, used in nand_chip.options
 * "NAND_BBT_" for flags in bbm.h, used in nand_chip.bbt_options
        or in nand_bbt_descr.options

Thus, I am changing NAND_USE_FLASH_BBT to NAND_BBT_USE_FLASH.

Again, this flag is found in bbm.h and so should NOT be used in the
"nand_chip.options" field.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>

This patch works with the following three flags from two headers (nand.h
and bbm.h):
  (1) NAND_USE_FLASH_BBT (nand.h)
  (2) NAND_USE_FLASH_BBT_NO_OOB (nand.h)
  (3) NAND_BBT_NO_OOB (bbm.h)

These flags are all related and interdependent, yet they were in
different headers. Flag (2) is simply the combination of (1) and (3) and
can be eliminated.

This patch accomplishes the following:
  * eliminate NAND_USE_FLASH_BBT_NO_OOB (i.e., flag (2))
  * move NAND_USE_FLASH_BBT (i.e., flag (1)) to bbm.h

It's important to note that because (1) and (3) are now both found in
bbm.h, they should NOT be used in the "nand_chip.options" field.

I removed a small section from the mtdnand DocBook because it referes to
NAND_USE_FLASH_BBT in nand.h, which has been moved to bbm.h.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>

Now most of ARM machines has the alsmot same __clk_get/put() macro

So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files

But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config

Now there are only 3 caese.

1) define the clk structure with clkdev macro => Need to move clk structure to proper header file

arch/arm/mach-versatile/include/mach/clkdev.h
arch/arm/mach-realview/include/mach/clkdev.h
arch/arm/mach-vexpress/include/mach/clkdev.h
arch/arm/mach-integrator/include/mach/clkdev.h

2) export the __clk_get/put function at clock.c

arch/arm/mach-shmobile/include/mach/clkdev.h

3) demuxing the clk source
arch/arm/mach-u300/include/mach/clkdev.h
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

Video input mux settings for tvp7002 and imager inputs were swapped.
Comment was correct.

Tested on EVM with tvp7002 input.
Signed-off-by: NJon Povey <jon.povey@racelogic.co.uk>
Acked-by: NManjunath Hadli <manjunath.hadli@ti.com>
Cc: stable@kernel.org
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Avoid NULL dereference of irq_alloc_generic_chip return in low
memory conditions.
Signed-off-by: NTodd Poynor <toddpoynor@google.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Commit 74164016 ("arm: davinci: Fix fallout from generic irq chip
conversion") introduced a bug, causing low level interrupt handlers to
get a bogus irq number as an argument. The gpio irq handler falsely
assumes that the handler data is the irq base number and that is no
longer true.

Set the irq handler data to be a pointer to the corresponding gpio
controller. The chained irq handler can then use it to extract both the
irq base number and the gpio registers structure.
Signed-off-by: NIdo Yariv <ido@wizery.com>
CC: Thomas Gleixner <tglx@linutronix.de>
[nsekhar@ti.com: renamed "ctl" to "d", simplified indexing logic for chips and
took care of odd bank handling in irq handler]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Register the platform device for SATA interface
present on the DA850/OMAP-L138/AM18x EVM.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add support for SATA controller on the
DA850/OMAP-L138/AM18x devices.

The patch adds the necessary clocks, platform
resources and a routine to initialize the SATA
controller.

The PHY configuration in this patch is
courtesy the work done by Zegeye Alemu,
Swaminathan and Mansoor Ahamed from TI.

While testing this patch, enable port multiplier
support iff you are actually using one. The
reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/

ChangeLog:
v3:
Removed fields which were being initialized
to zero in PHY configuration. Moved SATA base
address definition to the top of the file to
make it inline with what is done for the rest
of the modules.
v2:
Addressed comments from Sergei. Removed unnecessary
braces and removed unnecessary else after goto.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Some DaVinci modules like the SATA on DA850
need forced module state transitions.

Define a "force" flag which can be passed to
the PSC config function to enable it to make
forced transitions.

Forced transitions shouldn't normally be attempted,
unless the TRM explicitly specifies its usage.

ChangeLog:
v2:
Modified to take care of the fact that
davinci_psc_config() now takes the flags
directly.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Enabling or disabling a PSC can take certain
modifiers like "disable with reset", "force
enable/disable" and "enable/disable with local
reset" apart from the regular clock gating
functionality.

Pass a flags argument to davinci_psc_config()
so these variations can be supported there.

At this time only "disable with reset" is
supported, but other functionality will be
added in subsequent patches.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

This fixes a regression introduced by e59347a1 "arm: orion:
Use generic irq chip".

Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.

Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().

For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

Tested on Network Space v2.
Reported-by: NJoey Oravec <joravec@drewtech.com>
Signed-off-by: NSimon Guinot <sguinot@lacie.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This patch allows setting the input clock frequency of the SoC from
the board specific code using the davinci_set_refclk_rate function.
Suggested-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The DM6467 and DM6467T EVMs use different reference clock
frequencies. This difference is currently supported by having
the SoC code call a public board routine which sets up the reference
clock frequency. This does not scale as more boards are added.

Instead, use the clk_set_rate() API to setup the reference clock
frequency to a different value from the board file.
Suggested-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NKevin Hilman <khilman@ti.com>

psc.h has indentation using spaces at a number of places.
Fix this by indenting using tabs instead.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Platforms provide an empty irq_prio_table macro, and as nothing uses
this macro, it can simply be removed.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).

To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.

Hope people are OK with tiny include file.

Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Make the PCM device structures used in devices.c
and devices-da8xx.c static as they are used only
in the respective files.

This was found when trying to build a single image
for DaVinci and DA8x devices using runtime P2V support.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The code which does the chained handler setup was overwriting
chip_data.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Tested-by: NHolger Hans Peter Freyther <holger@freyther.de>
Signed-off-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Move the definition of DM64XX_VDD3P3V_PWDN from hardware.h
to devices.c since it is used only there.

This also helps rid hardware.h of platform private stuff.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Rather than each platform providing its own function to adjust the
zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
adjustment.  This ensures that the actual DMA zone size and the
ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
each other, and moves this complexity out of the platform code.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The values of ISA_DMA_THRESHOLD and MAX_DMA_ADDRESS are related; one is
the physical/bus address, the other is the virtual address.  Both need
to be kept in step, so rather than having platforms define both, allow
them to define a single macro which sets both of these macros
appropraitely.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Simple conversion which simply uses the fact that the second irq chip
base address has offset 0x04 to the first one.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Reviewed-and-Tested-by: NKevin Hilman <khilman@ti.com>
Tested-by: NSekhar Nori <nsekhar@ti.com>

To be able to relocate the .bss section at run time independently from
the rest of the code, we must make sure that no GOTOFF relocations are
used with .bss symbols.  This usually means that no global variables can
be marked static unless they're also const.

Let's remove the static qualifier from current offenders, or turn them
into const variables when possible.  Next commit will ensure the build
fails if one of those is reintroduced due to otherwise enforced coding
standards for the kernel.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: NTony Lindgren <tony@atomide.com>

Move DA8XX_MMCSD0_BASE, DA8XX_LCD_CNTRL_BASE,  and DA8XX_DDR2_CTL_BASE from
<mach/da8xx.h> to devices-da8xx.c as the latter file is the only place where
these macros are used.

While at it, restore sorting the base address macros by address value in
devices-da8xx.c...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>

Commit 044ca015 (davinci: da850/omap-l138: add
support for SoC suspend) introduced DA8XX_PLL1_BASE despite PLL1 exists only on
DA850/OMAP-L138 and da850.c even already #define'd DA850_PLL1_BASE. Kill the
duplicate macro, renaming an existing reference to it...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>

DA8XX_GPIO_BASE is #define'd in both <mach/da8xx.h> and devices-da8xx.c;
moreover, it's not even used in the latter file...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>

With dynamic debug having gained the capability to report debug messages
also during the boot process, it offers a far superior interface for
debug messages than the custom cpufreq infrastructure. As a first step,
remove the old cpufreq_debug_printk() function and replace it with a call
to the generic pr_debug() function.

How can dynamic debug be used on cpufreq? You need a kernel which has
CONFIG_DYNAMIC_DEBUG enabled.

To enabled debugging during runtime, mount debugfs and

$ echo -n 'module cpufreq +p' > /sys/kernel/debug/dynamic_debug/control

for debugging the complete "cpufreq" module. To achieve the same goal during
boot, append

	ddebug_query="module cpufreq +p"

as a boot parameter to the kernel of your choice.

For more detailled instructions, please see
Documentation/dynamic-debug-howto.txt
Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: NDave Jones <davej@redhat.com>

These changes were incorrectly fixed by codespell. They were now
manually corrected.
Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>

Several Davinci platforms select the I2C EEPROM support, but don't
select I2C support.  This causes I2C EEPROM support to be built into
the kernel, but I2C support may not be configured to be built in.
This leads to linker errors due to missing I2C symbols.

Arrange for I2C to be selected whenever EEPROM_AT24 is selected.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Commit 54ce6883 (davinci: da8xx: add spi
resources and registration routine) wrongly assumed that SPI1 is mapped at
the same address on DA830/OMAP-L137 and DA850/OMAP-L138; actually, the base
address was valid only for the latter SoC. Teach the code to pass the correct
SPI1 memory resource for both SoCs...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Current board configurations involving the MityDSP-L138 and MityARM-1808
only have one attached PHY, but it's address may not be the same.  Default
the behavior to auto-probe for the PHY and use the first one found.
Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

For the MityDSP-L138/MityARM-1808 SOMS, the NAND controller id (which needs
to correspond to the chipselect, and is used for controlling the HW ECC
computation) is not correct.  Fix it.
Signed-off-by: NMichael Williamson <michael.williamson@criticallink.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Fixup davinci UART low-level debug code for new ARM generic p2v changes.

Based on OMAP changes by Tony Lindgren

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Make use of the new functionality which ensures that irq_set_type is
called with the chip masked. Unmask is only done when the interrupt is
not disabled.

Retrieve the trigger type from irq_data in unmask
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The MUSB driver doesn't see its platform device on DM644x EVM board anymore
since commit 73b089b0 (usb: musb: split davinci
to its own platform_driver) because the new probe is called as subsys_initcall()
now, and the device is registered later than that by the board code.  Move the
registration to davinci_evm_init() -- it's safe to do so because the MUSB core
device still gets initialized as fs_initcall() -- which is late enough for the
I2C GPIO expander (which controls VBUS) to be initialized.
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Tested-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

This patch adds definitions for spi devices on the tnetv107x evm platform.
Signed-off-by: NCyril Chemparathy <cyril@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

This patch adds SSP configuration and pin muxing info for tnetv107x
evm boards.
Signed-off-by: NCyril Chemparathy <cyril@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>