The bank->chip.irqdomain is uninitialized at the moment when
irq_domain_remove() is called, so remove this call.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix below build warning:
  CC      drivers/gpio/gpio-omap.o
drivers/gpio/gpio-omap.c: In function 'omap_gpio_irq_type':
drivers/gpio/gpio-omap.c:504:3: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type [enabled by default]
include/linux/spinlock.h:360:29: note: expected 'struct spinlock_t *' but argument is of type 'struct raw_spinlock_t *'

Fixes: commit 4dbada2b ("gpio: omap: use raw locks for locking")
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch converts gpio_bank.lock from a spin_lock into a
raw_spin_lock. The call path is to access this lock is always under a
raw_spin_lock, for instance
- __setup_irq() holds &desc->lock with irq off
  + __irq_set_trigger()
   + omap_gpio_irq_type()

- handle_level_irq() (runs with irqs off therefore raw locks)
  + mask_ack_irq()
   + omap_gpio_mask_irq()

This fixes the obvious backtrace on -RT. However the locking vs context
is not and this is not limited to -RT:
- omap_gpio_irq_type() is called with IRQ off and has an conditional
  call to pm_runtime_get_sync() which may sleep. Either it may happen or
  it may not happen but pm_runtime_get_sync() should not be called with
  irqs off.

- omap_gpio_debounce() is holding the lock with IRQs off.
  + omap2_set_gpio_debounce()
   + clk_prepare_enable()
    + clk_prepare() this one might sleep.
  The number of users of gpiod_set_debounce() / gpio_set_debounce()
  looks low but still this is not good.
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

OMAP GPIO driver allowed to be built as loadable module, but it
doesn't set owner field in GPIO chip structure. As result,
module_get/put() API is not working and it's possible to unload
OMAP driver while in use:

  omap_gpio 48051000.gpio: REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED

Hence, add missing configuration.

Cc: Tony Lindgren <tony@atomide.com>
Fixes: cac089f9 ('gpio: omap: Allow building as a loadable module')
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add missed spin_unlock_irqrestore in omap_gpio_irq_type when
omap_set_gpio_triggering() is failed.

It fixes static checker warning:

	drivers/gpio/gpio-omap.c:523 omap_gpio_irq_type()
	warn: inconsistent returns 'spin_lock:&bank->lock'.

This fixes commit:
1562e461 ('gpio: omap: fix error handling in omap_gpio_irq_type')
Reported-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Preparatory patch for the removal of the 'irq' argument from irq flow
handlers.
Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Use irq_set_handler_locked() as it avoids a redundant lookup of the
irq descriptor.

Search and replacement was done with coccinelle:
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Julia Lawall <julia.lawall@lip6.fr>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org

The omap_gpio_irq_startup() can be called at time when:
- corresponding GPIO has been requested already and in this case
it has to be configured as input already. If not - return with -EINVAL
and do not try to re-configure it as it could be unsafe.
- corresponding GPIO is free: reconfigure GPIO as input.

In addition, call omap_enable_gpio_module directly as all needed
checks are already present inside it.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal,
so GPIO Chip implementation shouldn't touch GPIO IRQ specific registers
and vise versa.

Hence, rework omap_gpio_request:
- don't reset GPIO IRQ triggering type to IRQ_TYPE_NONE, because
  GPIO irqchip should be responsible for that;
- call directly omap_enable_gpio_module as all needed checks are already
  present inside it.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal,
so GPIO IRQ Chip implementation shouldn't touch GPIO specific
registers and vise versa.

Hence, rework omap_gpio_irq_shutdown and try to touch only irqs specific
registers:
- don't configure GPIO as input (it, actually, should be already configured
  as input).
- don't clear debounce configuration if GPIO is still used as GPIO.
  We need to take in to account here commit c9c55d92
  ("gpio/omap: fix off-mode bug: clear debounce settings on free/reset").

Also remove omap_reset_gpio() function as it is not used any more.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The GPIO bank will be kept powered in case if input parameters
are invalid or error occurred in omap_gpio_irq_type.

Hence, fix it by ensuring that GPIO bank will be unpowered
in case of errors and add additional check of value returned
from omap_set_gpio_triggering().
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch fixes following issue:
- GPIOn is used as IRQ by some dev, for example PCF8575.INT ->  gpio6.11
- PCFx driver knows nothing about type of IRQ line (GPIO or not)
  so it doesn't request gpio and just do request_irq()
- If gpio6.11 will be exported through the sysfs and then un-xeported
then IRQs from PCFx will not be received any more, because
IRQ configuration for gpio6.11 will be cleaned up unconditionally
in omap_gpio_free.

Fix this by removing all GPIO IRQ specific code from omap_gpio_free()
and also do GPIO clean up (change direction to 'in' and disable debounce)
only if corresponding GPIO is not used as IRQ too.
GPIO IRQ will be properly cleaned up by GPIO irqchip code.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We currently get all kinds of errors building the omap gpio driver
as a module starting with:

undefined reference to `omap2_gpio_resume_after_idle'
undefined reference to `omap2_gpio_prepare_for_idle'
...

Let's fix the issue by adding inline functions to the header.
Note that we can now also remove the two unused functions for
omap_set_gpio_debounce and omap_set_gpio_debounce_time.

Then doing rmmod on the module produces further warnings
because of missing exit related functions. Let's add those.

And finally, we can make the Kconfig entry just a tristate
option that's selected for omaps.

Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

At some point with all the GPIO clean-up we've broken the
MPUIO interrupts. Those are just a little bit different from
the GPIO interrupts, so we can fix it up just by setting
different irqchip functions for it. And then we can just
remove all old code trying to do the same.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Now OMAP GPIO driver prepared for GPIO_INDEX() macro removing.
Do It ;)
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Now OMAP GPIO driver prepared for omap_irq_to_gpio() removing.
Do it ;)
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Now OMAP GPIO driver prepared for GPIO_BIT() macro removing.
Do it ;)
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Convert GPIO IRQ functions to use GPIO offset instead of system
GPIO numbers. This allows to drop unneeded conversations between
system GPIO <-> GPIO offset which are done in many places and
many times.
It is safe to do now because:
- gpiolib always passes GPIO offset to GPIO controller
- OMAP GPIO driver converted to use IRQ domain, so
  struct irq_data->hwirq contains GPIO offset

This is preparation step before removing:
 #define GPIO_INDEX(bank, gpio)
 #define GPIO_BIT(bank, gpio)
 int omap_irq_to_gpio()
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The 'gpio' parameter isn't needed any more as it
duplicates 'offset' parameter, so drop it.
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Convert debounce functions to use GPIO offset instead of system
GPIO numbers. This allows to drop unneeded conversations between
system GPIO <-> GPIO offset which are done in many places and
many times.
It is safe to do now because:
- gpiolib always passes GPIO offset to GPIO controller
- OMAP GPIO driver converted to use IRQ domain

This is preparation step before removing:
 #define GPIO_INDEX(bank, gpio)
 #define GPIO_BIT(bank, gpio)
 int omap_irq_to_gpio()
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Both functions omap_set_gpio_dataout_reg() and
omap_set_gpio_dataout_mask() accept GPIO offset
as 'gpio' input parameter, so rename it to 'offset' and
drop usage of GPIO_BIT() macro.
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Convert omap_gpio_is_input() to use GPIO offset instead of mask and,
in such way, make code simpler and remove few lines of code.
Tested-by: NTony Lindgren <tony@atomide.com>
Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

GPIOLib core implemnts irqchip->irq_request/release_resources callbacks
internally and these callbacks already contain clalls of
gpiochip_lock/unlock_as_irq().

Hence, remove unnecessary call of gpiochip_unlock_as_irq() from
omap_gpio_irq_shutdown().
Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Similar to omap_gpio_irq_type() let's make sure that the GPIO
is usable as an interrupt if the platform init code did not
call gpio_request(). Otherwise we can get invalid device access
after setup_irq():

WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x214/0x340()
44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Idle): Data Access in Supervisor mode during Functional access
...
[<c05f21e4>] (__irq_svc) from [<c05f1974>] (_raw_spin_unlock_irqrestore+0x34/0x44)
[<c05f1974>] (_raw_spin_unlock_irqrestore) from [<c00914a8>] (__setup_irq+0x244/0x530)
[<c00914a8>] (__setup_irq) from [<c00917d4>] (setup_irq+0x40/0x8c)
[<c00917d4>] (setup_irq) from [<c0039c8c>] (omap_system_dma_probe+0x1d4/0x2b4)
[<c0039c8c>] (omap_system_dma_probe) from [<c03b2200>] (platform_drv_probe+0x44/0xa4)
...

We can fix this the same way omap_gpio_irq_type() is handling it.

Note that the long term solution is to change the gpio-omap driver
to handle the banks as separate driver instances. This will allow
us to rely on just runtime PM for tracking the bank specific state.
Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is
selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks
depending on CONFIG_PM_RUNTIME may now be changed to depend on
CONFIG_PM.

Replace CONFIG_PM_RUNTIME with CONFIG_PM in drivers/gpio/gpio-omap.c.
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

This function actually operates on a gpio_chip, so its prefix should
reflect that fact for consistency with other functions defined in
gpio/driver.h.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When viewing the /proc/interrupts, there is no information about which
GPIO bank a specific gpio interrupt is hooked on to. This is more than a
bit irritating as such information can esily be provided back to the
user and at times, can be crucial for debug.

So, instead of displaying something like:
31:	0	0  GPIO   0  palmas
32:	0	0  GPIO  27  mmc0

Display the following with appropriate device name:
31:	0	0  4ae10000.gpio   0  palmas
32:	0	0  4805d000.gpio  27  mmc0

This requires that we create irq_chip instance specific for each GPIO
bank which is trivial to achieve.
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some drivers accidentally still use the return value from
gpiochip_remove(). Get rid of them so we can simplify this function
and get rid of the return value.

Cc: Abdoulaye Berthe <berthe.ab@gmail.com>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The GPIO OMAP driver didn't have a consistent naming scheme for
all its functions. Some of them had an omap prefix while others
didn't. There are many advantages on having a separate namespace
for driver functions so let's add an "omap" prefix to all of them.
Signed-off-by: NJavier Martinez Canillas <jmartinez@softcrates.net>
Acked-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The <linux/irqchip/chained_irq.h> header is already included
when selecting GPIOLIB_IRQCHIP so there is no need to do it
in the driver. This is a left over from commit fb655f57
("gpio: omap: convert driver to use gpiolib irqchip").
Signed-off-by: NJavier Martinez Canillas <jmartinez@softcrates.net>
Acked-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

GPIO irqchips assign to the cascaded IRQs their own lock class
in order to avoid warnings about lockdep recursions since that
allow the lockdep core to keep track of things.

Since commit e45d1c80 ("gpio: put GPIO IRQs into their own lock class")
there is no need to do this in a driver if it's using the GPIO
irqchip helpers since gpiolib already assigns a lockdep class.
Signed-off-by: NJavier Martinez Canillas <jmartinez@softcrates.net>
Acked-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Replace the clk_enable()s with a clk_prepare_enable() and
the clk_disables()s with a clk_disable_unprepare()

This never showed issues due to the OMAP platform code (hwmod)
leaving these clocks in clk_prepare()ed state by default.
Reported-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Using the BIT() macro instead of shifting bits
makes the code less error prone and also more readable.
Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch implements gpio_chip's get_direction() routine, that
lets other drivers get particular GPIOs direction using
struct gpio_desc.
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Converts the GPIO OMAP driver to register its chained irq
handler and irqchip using the helpers in the gpiolib core.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The gpiochip_add() function can fail if the chip cannot
be registered so the return value has to be checked and
the error propagated in case it happens.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The GPIO OMAP driver supports different OMAP SoC families and
not all of them have the needed support to use the linear IRQ
domain mapping like OMAP1 that use the legacy domain mapping.

But this special check is not necessary since the simple IRQ
domain mapping is able to handle both cases. Having a zero
IRQ offset will be interpreted as a linear domain case while
a non-zero value will be interpreted as a legacy domain case.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use devm_ioremap_resource() in order to make the code simpler,
and remove redundant return value check of platform_get_resource()
because the value is checked by devm_ioremap_resource().
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.

Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.
Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The OMAP GPIO driver keeps track about GPIO pins that are
used as IRQ lines for two reasons:

1) To prevent GPIO banks to be disabled while one of their
   GPIO pins are only used as an interrupt line.

2) To not allow another caller to set the GPIO pin as output.

Now gpiolib has an API to mark GPIO pins as used as IRQ lines
so the GPIO core only allows to set as output GPIO pins not
tied to an IRQ. So there is no need to have custom code for 2).

The IRQ usage still has to be maintained locally for 1) though.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>