1. 02 12月, 2015 6 次提交
    • A
      ARM: s3c64xx: use common debug-ll implementation · bb08dea1
      Arnd Bergmann 提交于
      The uart on s3c64xx is essentially the same as on s3c24xx,
      so we can share a single assembler file. However, the addresses
      are different, and we need to add the respective Kconfig magic
      to get the right addresses.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      bb08dea1
    • A
      ARM: s3c64xx: use new adc/touchscreen driver · a829ae57
      Arnd Bergmann 提交于
      The old ADC and touchscreen drivers are not compatible with
      multiplatform support, but we can use the exynos-adc driver
      as a replacement.
      
      This changes the common device creation functions for s3c64xx
      (but not s3c24xx for now) to use the new driver. To do this,
      we have to pass the interrupt resources in the opposite order
      and pass the platform data in the adc device node.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      a829ae57
    • A
      ARM: s3c64xx: enable sparse IRQ support · ba279044
      Arnd Bergmann 提交于
      This is another prerequisite for enabling multiplatform
      support, and it is the part I am least certain about.
      
      I assume it will cause the extra boot message "Cannot
      allocate irq_descs @ IRQ%d, assuming pre-allocated" to
      be printed, but otherwise work ok. This definitely needs
      to be tested on real hardware to see if it works.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      ba279044
    • A
      ARM: s3c64xx: prepare initcalls for multiplatform · a0e157af
      Arnd Bergmann 提交于
      In a multiplatform kernel, each initcall is run regardless
      of the platform it is meant for, so it must not attempt to
      access SoC-specific registers.
      
      This adds 'if (soc_is_s3c64xx)' to all initcalls that are
      specific to the s3c64xx platform, to prevent them from breaking
      other platforms once we can build them into a combined kernel.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      a0e157af
    • A
      gpio: samsung: move gpio-samsung driver back to platform code · 0f20e456
      Arnd Bergmann 提交于
      The gpio-samsung driver is special in the sense that it
      interacts directly in multiple ways with the legacy platform
      code for the s3c24xx and s3c64xx platforms. In contrast,
      all devicetree based machines for Samsung, including the
      ones on those two SoC families use a different driver.
      
      The header files that define the interface between the platform
      code and the gpio driver are not visible when building a
      kernel for ARCH_MULTIPLATFORM, which prevents us from
      turning on this option for s3c64xx.
      
      To work around this, we now move the driver back into platform
      code, from where it was originally moved to as part of commit
      1b39d5f2 ("gpio/samsung: gpio-samsung.c to support
      Samsung GPIOs").
      
      The long-term plan for this driver would be to remove it
      entirely, after all Samsung machines have been converted
      over to boot from DT, but there is currently no timeline
      for when that might happen.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      0f20e456
    • A
      ASoC: samsung/smartq: use dynamic registration · df0cc2d1
      Arnd Bergmann 提交于
      As a prerequisite for moving s3c64xx into multiplatform configurations,
      we need to change the smartq audio driver to stop using hardcoded
      gpio numbers from the header file, and instead pass the gpio data
      through platform_data.
      
      In order to do that, we also move the code to use module_platform_driver
      and register the platform device using platform_device_register_simple
      and register the gpios through the gpiod API.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NMark Brown <broonie@kernel.org>
      Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      df0cc2d1
  2. 29 11月, 2015 1 次提交
    • A
      ARM: 8454/1: OF implies OF_FLATTREE · aa7d5f18
      Arnd Bergmann 提交于
      On the ARM architecture, individual platforms select CONFIG_USE_OF if they
      need it, but all device tree code is keyed off CONFIG_OF. When building
      a platform without DT support and manually enabling CONFIG_OF, we now
      get a number of build errors, e.g.
      
      arch/arm/kernel/devtree.c: In function 'setup_machine_fdt':
      arch/arm/kernel/devtree.c:215:19: error: implicit declaration of function 'early_init_dt_verify' [-Werror=implicit-function-declaration]
      
      We could now try to separate the use case of booting from DT vs. the
      case of using the dynamic implementation, but that seems more complicated
      than it can gain us.
      
      This simply changes the ARM Kconfig file to always enable OF_RESERVED_MEM
      and OF_EARLY_FLATTREE when CONFIG_OF is enabled. These options add a little
      extra code when we just want the dynamic OF implementation, but that seems
      like a rather obscure case, and this version solves all CONFIG_OF related
      randconfig regressions.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 0166dc11 ("of: make CONFIG_OF user selectable")
      Acked-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      aa7d5f18
  3. 27 11月, 2015 1 次提交
  4. 26 11月, 2015 3 次提交
    • G
      ARM/PCI: Move align_resource function pointer to pci_host_bridge structure · 7c7a0e94
      Gabriele Paoloni 提交于
      Commit b3a72384 ("ARM/PCI: Replace pci_sys_data->align_resource with
      global function pointer") introduced an ARM-specific align_resource()
      function pointer.  This is not portable to other arches and doesn't work
      for platforms with two different PCIe host bridge controllers.
      
      Move the function pointer to the pci_host_bridge structure so each host
      bridge driver can specify its own align_resource() function.
      Signed-off-by: NGabriele Paoloni <gabriele.paoloni@huawei.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NArnd Bergmann <arnd@arndb.de>
      7c7a0e94
    • G
      ARM: OMAP4+: SMP: use lockless clkdm/pwrdm api in omap4_boot_secondary · 918af9f9
      Grygorii Strashko 提交于
      OMAP CPU hotplug uses cpu1's clocks and power domains for CPU1 wake up
      from low power states (or turn on CPU1). This part of code is also
      part of system suspend (disable_nonboot_cpus()).
      >From other side, cpu1's clocks and power domains are used by CPUIdle. All above
      functionality is mutually exclusive and, therefore, lockless clkdm/pwrdm api
      can be used in omap4_boot_secondary().
      
      This fixes below back-trace on -RT which is triggered by
      pwrdm_lock/unlock():
      
      BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
       in_atomic(): 1, irqs_disabled(): 0, pid: 118, name: sh
       9 locks held by sh/118:
        #0:  (sb_writers#4){.+.+.+}, at: [<c0144a6c>] vfs_write+0x13c/0x164
        #1:  (&of->mutex){+.+.+.}, at: [<c01b4c70>] kernfs_fop_write+0x48/0x19c
        #2:  (s_active#24){.+.+.+}, at: [<c01b4c78>] kernfs_fop_write+0x50/0x19c
        #3:  (device_hotplug_lock){+.+.+.}, at: [<c03cbff0>] lock_device_hotplug_sysfs+0xc/0x4c
        #4:  (&dev->mutex){......}, at: [<c03cd284>] device_online+0x14/0x88
        #5:  (cpu_add_remove_lock){+.+.+.}, at: [<c003af90>] cpu_up+0x50/0x1a0
        #6:  (cpu_hotplug.lock){++++++}, at: [<c003ae48>] cpu_hotplug_begin+0x0/0xc4
        #7:  (cpu_hotplug.lock#2){+.+.+.}, at: [<c003aec0>] cpu_hotplug_begin+0x78/0xc4
        #8:  (boot_lock){+.+...}, at: [<c002b254>] omap4_boot_secondary+0x1c/0x178
       Preemption disabled at:[<  (null)>]   (null)
      
       CPU: 0 PID: 118 Comm: sh Not tainted 4.1.12-rt11-01998-gb4a62c3-dirty #137
       Hardware name: Generic DRA74X (Flattened Device Tree)
       [<c0017574>] (unwind_backtrace) from [<c0013be8>] (show_stack+0x10/0x14)
       [<c0013be8>] (show_stack) from [<c05a8670>] (dump_stack+0x80/0x94)
       [<c05a8670>] (dump_stack) from [<c05ad158>] (rt_spin_lock+0x24/0x54)
       [<c05ad158>] (rt_spin_lock) from [<c0030dac>] (clkdm_wakeup+0x10/0x2c)
       [<c0030dac>] (clkdm_wakeup) from [<c002b2c0>] (omap4_boot_secondary+0x88/0x178)
       [<c002b2c0>] (omap4_boot_secondary) from [<c0015d00>] (__cpu_up+0xc4/0x164)
       [<c0015d00>] (__cpu_up) from [<c003b09c>] (cpu_up+0x15c/0x1a0)
       [<c003b09c>] (cpu_up) from [<c03cd2d4>] (device_online+0x64/0x88)
       [<c03cd2d4>] (device_online) from [<c03cd360>] (online_store+0x68/0x74)
       [<c03cd360>] (online_store) from [<c01b4ce0>] (kernfs_fop_write+0xb8/0x19c)
       [<c01b4ce0>] (kernfs_fop_write) from [<c0144124>] (__vfs_write+0x20/0xd8)
       [<c0144124>] (__vfs_write) from [<c01449c0>] (vfs_write+0x90/0x164)
       [<c01449c0>] (vfs_write) from [<c01451e4>] (SyS_write+0x44/0x9c)
       [<c01451e4>] (SyS_write) from [<c0010240>] (ret_fast_syscall+0x0/0x54)
       CPU1: smp_ops.cpu_die() returned, trying to resuscitate
      
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      918af9f9
    • N
      arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data · 29f5b34c
      Neil Armstrong 提交于
      Add missing HWMOD_NO_IDLEST hwmod flag for entries not
      having omap4 clkctrl values.
      The emac0 hwmod flag fixes the davinci_emac driver probe
      since the return of pm_resume() call is now checked.
      
      This solves the following boot errors :
      [    0.121429] omap_hwmod: l4_ls: _wait_target_ready failed: -16
      [    0.121441] omap_hwmod: l4_ls: cannot be enabled for reset (3)
      [    0.124342] omap_hwmod: l4_hs: _wait_target_ready failed: -16
      [    0.124352] omap_hwmod: l4_hs: cannot be enabled for reset (3)
      [    1.967228] omap_hwmod: emac0: _wait_target_ready failed: -16
      
      Cc: Brian Hutchinson <b.hutchman@gmail.com>
      Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      29f5b34c
  5. 25 11月, 2015 5 次提交
    • N
      ARM: orion5x: Fix legacy get_irqnr_and_base · 4d2ec7e2
      Nicolas Pitre 提交于
      Commit 5be9fc23 ("ARM: orion5x: fix legacy orion5x IRQ numbers") shifted
      IRQ numbers by one but didn't update the get_irqnr_and_base macro
      accordingly.  This macro is involved when CONFIG_MULTI_IRQ_HANDLER
      is not defined.
      
      [jac: 5d6bed2a went in to v4.2, but was backported to v3.18]
      Signed-off-by: NNicolas Pitre <nico@linaro.org>
      Fixes: 5be9fc23 ("ARM: orion5x: fix legacy orion5x IRQ numbers")
      Cc: <stable@vger.kernel.org> # v3.18+
      Signed-off-by: NJason Cooper <jason@lakedaemon.net>
      4d2ec7e2
    • N
      ARM: dove: Fix legacy get_irqnr_and_base · c1c90728
      Nicolas Pitre 提交于
      Commit 5d6bed2a ("ARM: dove: fix legacy dove IRQ numbers") shifted
      IRQ numbers by one but didn't update the get_irqnr_and_base macro
      accordingly.  This macro is involved when CONFIG_MULTI_IRQ_HANDLER
      is not defined.
      
      [jac: 5d6bed2a went in to v4.2, but was backported to v3.18]
      Signed-off-by: NNicolas Pitre <nico@linaro.org>
      Fixes: 5d6bed2a ("ARM: dove: fix legacy dove IRQ numbers")
      Cc: <stable@vger.kernel.org> # v3.18+
      Signed-off-by: NJason Cooper <jason@lakedaemon.net>
      c1c90728
    • F
      rtc: ds1307: fix kernel splat due to wakeup irq handling · 51c4cfef
      Felipe Balbi 提交于
      Since commit 3fffd128 ("i2c: allow specifying
      separate wakeup interrupt in device tree") we have
      automatic wakeup irq support for i2c devices. That
      commit missed the fact that rtc-1307 had its own
      wakeup irq handling and ended up introducing a
      kernel splat for at least Beagle x15 boards.
      
      Fix that by reverting original commit _and_ passing
      correct interrupt names on DTS so i2c-core can
      choose correct IRQ as wakeup.
      
      Now that we have automatic wakeirq support, we can
      revert the original commit which did it manually.
      
      Fixes the following warning:
      
      [   10.346582] WARNING: CPU: 1 PID: 263 at linux/drivers/base/power/wakeirq.c:43 dev_pm_attach_wake_irq+0xbc/0xd4()
      [   10.359244] rtc-ds1307 2-006f: wake irq already initialized
      
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Nishanth Menon <nm@ti.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
      51c4cfef
    • C
      KVM: arm/arm64: Fix preemptible timer active state crazyness · 7e16aa81
      Christoffer Dall 提交于
      We were setting the physical active state on the GIC distributor in a
      preemptible section, which could cause us to set the active state on
      different physical CPU from the one we were actually going to run on,
      hacoc ensues.
      
      Since we are no longer descheduling/scheduling soft timers in the
      flush/sync timer functions, simply moving the timer flush into a
      non-preemptible section.
      Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
      7e16aa81
    • A
      ARM/arm64: KVM: test properly for a PTE's uncachedness · e6fab544
      Ard Biesheuvel 提交于
      The open coded tests for checking whether a PTE maps a page as
      uncached use a flawed '(pte_val(xxx) & CONST) != CONST' pattern,
      which is not guaranteed to work since the type of a mapping is
      not a set of mutually exclusive bits
      
      For HYP mappings, the type is an index into the MAIR table (i.e, the
      index itself does not contain any information whatsoever about the
      type of the mapping), and for stage-2 mappings it is a bit field where
      normal memory and device types are defined as follows:
      
          #define MT_S2_NORMAL            0xf
          #define MT_S2_DEVICE_nGnRE      0x1
      
      I.e., masking *and* comparing with the latter matches on the former,
      and we have been getting lucky merely because the S2 device mappings
      also have the PTE_UXN bit set, or we would misidentify memory mappings
      as device mappings.
      
      Since the unmap_range() code path (which contains one instance of the
      flawed test) is used both for HYP mappings and stage-2 mappings, and
      considering the difference between the two, it is non-trivial to fix
      this by rewriting the tests in place, as it would involve passing
      down the type of mapping through all the functions.
      
      However, since HYP mappings and stage-2 mappings both deal with host
      physical addresses, we can simply check whether the mapping is backed
      by memory that is managed by the host kernel, and only perform the
      D-cache maintenance if this is the case.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Tested-by: NPavel Fedin <p.fedin@samsung.com>
      Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
      e6fab544
  6. 24 11月, 2015 2 次提交
  7. 23 11月, 2015 3 次提交
  8. 19 11月, 2015 5 次提交
  9. 18 11月, 2015 2 次提交
    • R
      ARM: wire up mlock2 syscall · 28fa99b7
      Russell King 提交于
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      28fa99b7
    • P
      ARM: dts: imx27.dtsi: change the clock information for usb · facf47ee
      Peter Chen 提交于
      For imx27, it needs three clocks to let the controller work,
      the old code is wrong, and usbmisc has not included clock handling
      code any more. Without this patch, it will cause below data
      abort when accessing usbmisc registers.
      
      usbcore: registered new interface driver usb-storage
      Unhandled fault: external abort on non-linefetch (0x008) at 0xf4424600
      pgd = c0004000
      [f4424600] *pgd=10000452(bad)
      Internal error: : 8 [#1] PREEMPT ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper Not tainted 4.1.0-next-20150701-dirty #3089
      Hardware name: Freescale i.MX27 (Device Tree Support)
      task: c7832b60 ti: c783e000 task.ti: c783e000
      PC is at usbmisc_imx27_init+0x4c/0xbc
      LR is at usbmisc_imx27_init+0x40/0xbc
      pc : [<c03cb5c0>]    lr : [<c03cb5b4>]    psr: 60000093
      sp : c783fe08  ip : 00000000  fp : 00000000
      r10: c0576434  r9 : 0000009c  r8 : c7a773a0
      r7 : 01000000  r6 : 60000013  r5 : c7a776f0  r4 : c7a773f0
      r3 : f4424600  r2 : 00000000  r1 : 00000001  r0 : 00000001
      Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 0005317f  Table: a0004000  DAC: 00000017
      Process swapper (pid: 1, stack limit = 0xc783e190)
      Stack: (0xc783fe08 to 0xc7840000)
      Signed-off-by: NPeter Chen <peter.chen@freescale.com>
      Reported-by: NFabio Estevam <fabio.estevam@freescale.com>
      Tested-by: NFabio Estevam <fabio.estevam@freescale.com>
      Cc: <stable@vger.kernel.org> #v4.1+
      Acked-by: NShawn Guo <shawnguo@kernel.org>
      facf47ee
  10. 17 11月, 2015 1 次提交
  11. 16 11月, 2015 6 次提交
  12. 13 11月, 2015 4 次提交
  13. 10 11月, 2015 1 次提交