Enable DCMI camera interface on STM32F429 MCU.
Signed-off-by: NHugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch set each gpio controller as a interrupt controller. User who
wants to use gpio as interrupt will have choice to use either "gpiolib"
interface or "common" interrupt interface.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Add watchdog into DT for stm32f429 family.
Signed-off-by: NYannick FERTRE <yannick.fertre@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Add LTDC (Lcd-tft Display Controller) support.
Signed-off-by: NYannick Fertre <yannick.fertre@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds the USB pins and nodes for USB FS core.
Signed-off-by: NBruno Herrera <bruherrera@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Configure STM32F4 ADC to use dma by default.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds I2C1 support for STM32F429 SoC
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
Signed-off-by: NM'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch uses clock DT binding definition instead numerical values
for stm32f429 board.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Add Timers and it sub-nodes into DT for stm32f429 family.
Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds STM32 RTC bindings for STM32F429.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch include auxiliary clock definition (clocks which are not derived
from system clock.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds an external I2S clock in the DT.
The I2S clock could be derived from an external I2S clock or by I2S pll.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Add ADC support & pinctrl analog phandle (adc3_in8) to stm32f429.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds USART3 pin configuration on PB10/PA11 pins
for STM32F469I-DISCO board.
Signed-off-by: NBruno Herrera <bruherrera@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds STM32 RTC bindings for STM32F429.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch include auxiliary clock definition (clocks which are not derived
from system clock.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds an external I2S clock in the DT.
The I2S clock could be derived from an external I2S clock or by I2S pll.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Add ADC support & pinctrl analog phandle (adc3_in8) to stm32f429.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds USART3 pin configuration on PB10/PA11 pins
for STM32F469I-DISCO board.
Signed-off-by: NBruno Herrera <bruherrera@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds lsi / lse oscillators. These clocks can be use by
RTC clocks.
The clock drivers needs to disable the power domain write protection using
syscon / regmap to enable these clocks.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch removes WoL (Wake on Lan) support as it is not yet
fully supported and tested.
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

stm32f469-disco and stm32f429-eval boards use SDRAM start address remapping
(to @0) to boost performances. A DMA translation through "dma-ranges"
property was needed for other masters than the M4 CPU.
stm32f429-disco doesn't use remapping so doesn't need this DMA translation.
This patches moves this DMA translation definition from stm32f429 soc file
to board files.
Tested-by: NBruno Herrera <bruherrera@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Add DMA support for USART3 on STM32F429 MCU.
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Tested-by: NBruno Herrera <bruherrera@gmail.com>
Signed-off-by: NGerald Baeza <gerald.baeza@st.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>

Originally-from: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@st.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: arnd@arndb.de
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: bruherrera@gmail.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Cc: lee.jones@linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1474387259-18926-5-git-send-email-alexandre.torgue@st.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>

Remove skeleton.dtsi from the common ARM Cortex-M dtsi. This will allow
us to remove skeleton.dtsi on a per platform basis and get rid of the
unit address warning on the memory nodes without getting duplicate memory
nodes.

See 3ebee5a2 ("arm64: dts: kill skeleton.dtsi") for additional
reasons not to use the skeleton.dtsi.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NVladimir Murzin <vladimir.murzin@arm.com>
Acked-by: NStefan Agner <stefan@agner.ch>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NAlexandre TORGUE <alexandre.torgue@st.com>

This patch adds #reset-cells property to rcc node.
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC.
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

Signed-off-by: NAlexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

This patch adds USB HS support in host mode only.
This port supports OTG mode, but the device more is not working
properly as of now.
Once the device mode fixed, the node will be updated to support OTG.
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

All the clocks referenced by the GPIO banks were not the good ones.
Reported-by: NBruno Herrera <bruherrera@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

STM32F429 allows to remap FMC SDRAM Bank 1 from 0xc0000000 to 0x0,
by writing 0x4 to SYSCFG_MEMRMP register.

As mentionned in the reference manual (see chapter 9.3.1), the performance
gain is really interresting:
"In remap mode at address 0x0000 0000, the CPU can access the external
memory via ICode bus instead of System bus which boosts up the
performance."

These are the dhrystone results with and without the remap enabled:
Default (SDRAM in 0xc0000000):
---------------------------------
Microseconds for one run through Dhrystone:   31.8
Dhrystones per Second:                      31416.9

Remap (SDRAM in 0x0000000):
-----------------------------
Microseconds for one run through Dhrystone:   20.6
Dhrystones per Second:                      48520.1

This patch first change the SDRAM start address to 0x0 for STM32429i-EVAL
board, and also set the dma-range property as the other masters than the M4
CPU still see SDRAM in 0xc0000000.

Note that the Discovery board cannot benefit from this feature, since the
SDRAM is connected to Bank 2.
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NPatrice Chotard <patrice.chotard@st.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.
Acked-by: NPatrice Chotard <patrice.chotard@st.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

This patch adds STM32 DMA bindings for STM32F429.
Signed-off-by: NM'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

New bindings and driver have been created for STM32 series parts. This
patch integrates this changes.
Signed-off-by: NDaniel Thompson <daniel.thompson@linaro.org>
Acked-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>