1. 25 3月, 2020 3 次提交
    • M
      dm integrity: fix a crash with unusually large tag size · b93b6643
      Mikulas Patocka 提交于
      If the user specifies tag size larger than HASH_MAX_DIGESTSIZE,
      there's a crash in integrity_metadata().
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NMikulas Patocka <mpatocka@redhat.com>
      Signed-off-by: NMike Snitzer <snitzer@redhat.com>
      b93b6643
    • B
      dm zoned: remove duplicate nr_rnd_zones increase in dmz_init_zone() · b8fdd090
      Bob Liu 提交于
      zmd->nr_rnd_zones was increased twice by mistake. The other place it
      is increased in dmz_init_zone() is the only one needed:
      
      1131                 zmd->nr_useable_zones++;
      1132                 if (dmz_is_rnd(zone)) {
      1133                         zmd->nr_rnd_zones++;
      					^^^
      Fixes: 3b1a94c8 ("dm zoned: drive-managed zoned block device target")
      Cc: stable@vger.kernel.org
      Signed-off-by: NBob Liu <bob.liu@oracle.com>
      Reviewed-by: NDamien Le Moal <damien.lemoal@wdc.com>
      Signed-off-by: NMike Snitzer <snitzer@redhat.com>
      b8fdd090
    • S
      dm verity fec: fix memory leak in verity_fec_dtr · 75fa6019
      Shetty, Harshini X (EXT-Sony Mobile) 提交于
      Fix below kmemleak detected in verity_fec_ctr. output_pool is
      allocated for each dm-verity-fec device. But it is not freed when
      dm-table for the verity target is removed. Hence free the output
      mempool in destructor function verity_fec_dtr.
      
      unreferenced object 0xffffffffa574d000 (size 4096):
        comm "init", pid 1667, jiffies 4294894890 (age 307.168s)
        hex dump (first 32 bytes):
          8e 36 00 98 66 a8 0b 9b 00 00 00 00 00 00 00 00  .6..f...........
          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
        backtrace:
          [<0000000060e82407>] __kmalloc+0x2b4/0x340
          [<00000000dd99488f>] mempool_kmalloc+0x18/0x20
          [<000000002560172b>] mempool_init_node+0x98/0x118
          [<000000006c3574d2>] mempool_init+0x14/0x20
          [<0000000008cb266e>] verity_fec_ctr+0x388/0x3b0
          [<000000000887261b>] verity_ctr+0x87c/0x8d0
          [<000000002b1e1c62>] dm_table_add_target+0x174/0x348
          [<000000002ad89eda>] table_load+0xe4/0x328
          [<000000001f06f5e9>] dm_ctl_ioctl+0x3b4/0x5a0
          [<00000000bee5fbb7>] do_vfs_ioctl+0x5dc/0x928
          [<00000000b475b8f5>] __arm64_sys_ioctl+0x70/0x98
          [<000000005361e2e8>] el0_svc_common+0xa0/0x158
          [<000000001374818f>] el0_svc_handler+0x6c/0x88
          [<000000003364e9f4>] el0_svc+0x8/0xc
          [<000000009d84cec9>] 0xffffffffffffffff
      
      Fixes: a739ff3f ("dm verity: add support for forward error correction")
      Depends-on: 6f1c819c ("dm: convert to bioset_init()/mempool_init()")
      Cc: stable@vger.kernel.org
      Signed-off-by: NHarshini Shetty <harshini.x.shetty@sony.com>
      Signed-off-by: NMike Snitzer <snitzer@redhat.com>
      75fa6019
  2. 24 3月, 2020 6 次提交
  3. 15 3月, 2020 1 次提交
  4. 14 3月, 2020 4 次提交
    • M
      irqchip/gic-v3: Workaround Cavium erratum 38539 when reading GICD_TYPER2 · d01fd161
      Marc Zyngier 提交于
      Despite the architecture spec requiring that reserved registers in the GIC
      distributor memory map are RES0 (and thus are not allowed to generate
      an exception), the Cavium ThunderX (aka TX1) SoC explodes as such:
      
      [    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
      [    0.000000] GICv3: 128 SPIs implemented
      [    0.000000] GICv3: 0 Extended SPIs implemented
      [    0.000000] Internal error: synchronous external abort: 96000210 [#1] SMP
      [    0.000000] Modules linked in:
      [    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.0-rc4-00035-g3cf6a3d5725f #7956
      [    0.000000] Hardware name: cavium,thunder-88xx (DT)
      [    0.000000] pstate: 60000085 (nZCv daIf -PAN -UAO)
      [    0.000000] pc : __raw_readl+0x0/0x8
      [    0.000000] lr : gic_init_bases+0x110/0x560
      [    0.000000] sp : ffff800011243d90
      [    0.000000] x29: ffff800011243d90 x28: 0000000000000000
      [    0.000000] x27: 0000000000000018 x26: 0000000000000002
      [    0.000000] x25: ffff8000116f0000 x24: ffff000fbe6a2c80
      [    0.000000] x23: 0000000000000000 x22: ffff010fdc322b68
      [    0.000000] x21: ffff800010a7a208 x20: 00000000009b0404
      [    0.000000] x19: ffff80001124dad0 x18: 0000000000000010
      [    0.000000] x17: 000000004d8d492b x16: 00000000f67eb9af
      [    0.000000] x15: ffffffffffffffff x14: ffff800011249908
      [    0.000000] x13: ffff800091243ae7 x12: ffff800011243af4
      [    0.000000] x11: ffff80001126e000 x10: ffff800011243a70
      [    0.000000] x9 : 00000000ffffffd0 x8 : ffff80001069c828
      [    0.000000] x7 : 0000000000000059 x6 : ffff8000113fb4d1
      [    0.000000] x5 : 0000000000000001 x4 : 0000000000000000
      [    0.000000] x3 : 0000000000000000 x2 : 0000000000000000
      [    0.000000] x1 : 0000000000000000 x0 : ffff8000116f000c
      [    0.000000] Call trace:
      [    0.000000]  __raw_readl+0x0/0x8
      [    0.000000]  gic_of_init+0x188/0x224
      [    0.000000]  of_irq_init+0x200/0x3cc
      [    0.000000]  irqchip_init+0x1c/0x40
      [    0.000000]  init_IRQ+0x160/0x1d0
      [    0.000000]  start_kernel+0x2ec/0x4b8
      [    0.000000] Code: a8c47bfd d65f03c0 d538d080 d65f03c0 (b9400000)
      
      when reading the GICv4.1 GICD_TYPER2 register, which is unexpected...
      
      Work around it by adding a new quirk for the following variants:
      
       ThunderX: CN88xx
       OCTEON TX: CN83xx, CN81xx
       OCTEON TX2: CN93xx, CN96xx, CN98xx, CNF95xx*
      
      and use this flag to avoid accessing GICD_TYPER2. Note that all
      reserved registers (including redistributors and ITS) are impacted
      by this erratum, but that only GICD_TYPER2 has to be worked around
      so far.
      Signed-off-by: NMarc Zyngier <maz@kernel.org>
      Tested-by: NRobert Richter <rrichter@marvell.com>
      Tested-by: NMark Salter <msalter@redhat.com>
      Tested-by: NTim Harvey <tharvey@gateworks.com>
      Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
      Acked-by: NRobert Richter <rrichter@marvell.com>
      Link: https://lore.kernel.org/r/20191027144234.8395-11-maz@kernel.org
      Link: https://lore.kernel.org/r/20200311115649.26060-1-maz@kernel.org
      d01fd161
    • S
      iommu/amd: Fix IOMMU AVIC not properly update the is_run bit in IRTE · 730ad0ed
      Suravee Suthikulpanit 提交于
      Commit b9c6ff94 ("iommu/amd: Re-factor guest virtual APIC
      (de-)activation code") accidentally left out the ir_data pointer when
      calling modity_irte_ga(), which causes the function amd_iommu_update_ga()
      to return prematurely due to struct amd_ir_data.ref is NULL and
      the "is_run" bit of IRTE does not get updated properly.
      
      This results in bad I/O performance since IOMMU AVIC always generate GA Log
      entry and notify IOMMU driver and KVM when it receives interrupt from the
      PCI pass-through device instead of directly inject interrupt to the vCPU.
      
      Fixes by passing ir_data when calling modify_irte_ga() as done previously.
      
      Fixes: b9c6ff94 ("iommu/amd: Re-factor guest virtual APIC (de-)activation code")
      Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      730ad0ed
    • D
      iommu/vt-d: Ignore devices with out-of-spec domain number · da72a379
      Daniel Drake 提交于
      VMD subdevices are created with a PCI domain ID of 0x10000 or
      higher.
      
      These subdevices are also handled like all other PCI devices by
      dmar_pci_bus_notifier().
      
      However, when dmar_alloc_pci_notify_info() take records of such devices,
      it will truncate the domain ID to a u16 value (in info->seg).
      The device at (e.g.) 10000:00:02.0 is then treated by the DMAR code as if
      it is 0000:00:02.0.
      
      In the unlucky event that a real device also exists at 0000:00:02.0 and
      also has a device-specific entry in the DMAR table,
      dmar_insert_dev_scope() will crash on:
         BUG_ON(i >= devices_cnt);
      
      That's basically a sanity check that only one PCI device matches a
      single DMAR entry; in this case we seem to have two matching devices.
      
      Fix this by ignoring devices that have a domain number higher than
      what can be looked up in the DMAR table.
      
      This problem was carefully diagnosed by Jian-Hong Pan.
      Signed-off-by: NLu Baolu <baolu.lu@linux.intel.com>
      Signed-off-by: NDaniel Drake <drake@endlessm.com>
      Fixes: 59ce0515 ("iommu/vt-d: Update DRHD/RMRR/ATSR device scope caches when PCI hotplug happens")
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      da72a379
    • Z
      iommu/vt-d: Fix the wrong printing in RHSA parsing · b0bb0c22
      Zhenzhong Duan 提交于
      When base address in RHSA structure doesn't match base address in
      each DRHD structure, the base address in last DRHD is printed out.
      
      This doesn't make sense when there are multiple DRHD units, fix it
      by printing the buggy RHSA's base address.
      Signed-off-by: NLu Baolu <baolu.lu@linux.intel.com>
      Signed-off-by: NZhenzhong Duan <zhenzhong.duan@gmail.com>
      Fixes: fd0c8894 ("intel-iommu: Set a more specific taint flag for invalid BIOS DMAR tables")
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      b0bb0c22
  5. 13 3月, 2020 15 次提交
  6. 12 3月, 2020 11 次提交