- 05 6月, 2009 20 次提交
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由 Dmitry Eremin-Solenikov 提交于
csb726 used obsolete and not working out-of-tree driver smc911x. Switch it to use new smsc911x driver. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Philipp Zabel 提交于
I'm not going to maintain separate defconfigs for magician and hx4700. This should probably be renamed to htcpxa_defconfig. Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Philipp Zabel 提交于
This includes - IrDA (pxafixp_ir), - Buttons (gpio-keys), - ASIC3 IRQ/GPIOs (asic3), - EGPIOs (htc-egpio), - ATI Imageon w3220 framebuffer (w100fb), - Backlight (pwm-backlight), - StrataFlash (physmap), - Battery monitor (ds1wm,w1_ds2760,ds2760_battery) - USB gadget support (pxa27x_udc,gpio_vbus). - bq24022 battery charger (pda_power,bq24022) - TSC2046 touchscreen (ads7846) Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Philipp Zabel 提交于
Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Robert Jarzmik 提交于
Add voltage regulation capability to pxa2xx cpufreq driver. The cpufreq will ask for a "vcc_core" regulator to the regulator framework. If a regulator is found at probe time, it will be used with values specified in PXA270 Electrical, Mechanical, and Thermal Specifications. If not, it will be assumed for now that frequency change will work without voltage control. This assumes that the IPL/SPL installs sane values to an existing voltage regulator (ie. voltage high enough to support the full range). Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Jürgen Schindele 提交于
Signed-off-by: NJürgen Schindele <linux@schindele.name> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Mike Rapoport 提交于
PXA processors have several low-power modes. Currently kernel supports only one of these modes for PM_SUSPEND_MEM. This patch adds ability to set desired suspend mode for PXA27x based machines. Signed-off-by: NMike Rapoport <mike@compulab.co.il> Reviewed-by: NRussell King <linux@arm.linux.org.uk> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Robert Jarzmik 提交于
As reported by Aric Blumer, the pxa27x_udc driver does work with pxa3xx devices. Add support into device files. Reported-by: NAric Blumer <aric@sdgsystems.com> Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NMatt Reimer <mattjreimer@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Philipp Zabel 提交于
The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70. My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS. Increasing the default number of board IRQs to 70 instead doesn't seem very nice. Signed-off-by: NPhilipp Zabel <philipp.zabel@gmail.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NMingwei Wang <mingwei.wang@marvell.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
The PXA_PWM config option is really redundant since the introduction of HAVE_PWM, replace that with HAVE_PWM to avoid confusion. Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
PWMs on PXA168/910 start at number 1 instead of 0, (i.e. PWM1/2/3/4 instead of PWM0/1/2/3 on PXA25x/PXA27x/PXA3xx). Allow this number to be specified in pwm_id_table. Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NPaul Shen <paul.shen@marvell.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NPaul Shen <paul.shen@marvell.com> Signed-off-by: NEric Miao <eric.miao@marvell.com>
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@marvell.com>
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- 02 6月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
This mostly adds back AppleTouch support and adds CONFIG_HIGHMEM by default. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 30 5月, 2009 2 次提交
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由 Joe Perches 提交于
Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLen Brown <len.brown@intel.com>
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由 David S. Miller 提交于
CSUM copy to/from user assembler was missing allocatable and executable attributes for .fixup Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 5月, 2009 5 次提交
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由 Mel Gorman 提交于
Addresses http://bugzilla.kernel.org/show_bug.cgi?id=13302 On x86 and x86-64, it is possible that page tables are shared beween shared mappings backed by hugetlbfs. As part of this, page_table_shareable() checks a pair of vma->vm_flags and they must match if they are to be shared. All VMA flags are taken into account, including VM_LOCKED. The problem is that VM_LOCKED is cleared on fork(). When a process with a shared memory segment forks() to exec() a helper, there will be shared VMAs with different flags. The impact is that the shared segment is sometimes considered shareable and other times not, depending on what process is checking. What happens is that the segment page tables are being shared but the count is inaccurate depending on the ordering of events. As the page tables are freed with put_page(), bad pmd's are found when some of the children exit. The hugepage counters also get corrupted and the Total and Free count will no longer match even when all the hugepage-backed regions are freed. This requires a reboot of the machine to "fix". This patch addresses the problem by comparing all flags except VM_LOCKED when deciding if pagetables should be shared or not for hugetlbfs-backed mapping. Signed-off-by: NMel Gorman <mel@csn.ul.ie> Acked-by: NHugh Dickins <hugh.dickins@tiscali.co.uk> Cc: Ingo Molnar <mingo@elte.hu> Cc: <stable@kernel.org> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: <starlight@binnacle.cx> Cc: Eric B Munson <ebmunson@us.ibm.com> Cc: Adam Litke <agl@us.ibm.com> Cc: Andy Whitcroft <apw@canonical.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Oskar Schirmer 提交于
The flat loader uses an architecture's flat_stack_align() to align the stack but assumes word-alignment is enough for the data sections. However, on the Xtensa S6000 we have registers up to 128bit width which can be used from userspace and therefor need userspace stack and data-section alignment of at least this size. This patch drops flat_stack_align() and uses the same alignment that is required for slab caches, ARCH_SLAB_MINALIGN, or wordsize if it's not defined by the architecture. It also fixes m32r which was obviously kaput, aligning an uninitialized stack entry instead of the stack pointer. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: NOskar Schirmer <os@emlix.com> Cc: David Howells <dhowells@redhat.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Bryan Wu <cooloney@kernel.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: NPaul Mundt <lethal@linux-sh.org> Cc: Greg Ungerer <gerg@uclinux.org> Signed-off-by: NJohannes Weiner <jw@emlix.com> Acked-by: NMike Frysinger <vapier.adi@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mathieu Desnoyers 提交于
Add cmpxchg/cmpxchg64 support for ARMv6K and ARMv7 systems (original patch from Catalin Marinas <catalin.marinas@arm.com>) The cmpxchg and cmpxchg64 functions can be implemented using the LDREX*/STREX* instructions. Since operand lengths other than 32bit are required, the full implementations are only available if the ARMv6K extensions are present (for the LDREXB, LDREXH and LDREXD instructions). For ARMv6, only 32-bits cmpxchg is available. Mathieu : Make cmpxchg_local always available with best implementation for all type sizes (1, 2, 4 bytes). Make cmpxchg64_local always available. Use "Ir" constraint for "old" operand, like atomic.h atomic_cmpxchg does. Change since v3 : - Add "memory" clobbers (thanks to Nicolas Pitre) - removed __asmeq(), only needed for old compilers, very unlikely on ARMv6+. Note : ARMv7-M should eventually be ifdefed-out of cmpxchg64. But it's not supported by the Linux kernel currently. Put back arm < v6 cmpxchg support. Signed-off-by: NMathieu Desnoyers <mathieu.desnoyers@polymtl.ca> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Nicolas Pitre <nico@cam.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Mathieu Desnoyers pointed out that the ARM barriers were lacking: - cmpxchg, xchg and atomic add return need memory barriers on architectures which can reorder the relative order in which memory read/writes can be seen between CPUs, which seems to include recent ARM architectures. Those barriers are currently missing on ARM. - test_and_xxx_bit were missing SMP barriers. So put these barriers in. Provide separate atomic_add/atomic_sub operations which do not require barriers. Reported-Reviewed-and-Acked-by: NMathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 5月, 2009 1 次提交
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由 Paulius Zaleckas 提交于
Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@teltonika.lt>
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- 27 5月, 2009 11 次提交
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由 Benjamin Herrenschmidt 提交于
The implementation we just revived has issues, such as using a Kconfig-defined virtual address area in kernel space that nothing actually carves out (and thus will overlap whatever is there), or having some dependencies on being self contained in a single PTE page which adds unnecessary constraints on the kernel virtual address space. This fixes it by using more classic PTE accessors and automatically locating the area for consistent memory, carving an appropriate hole in the kernel virtual address space, leaving only the size of that area as a Kconfig option. It also brings some dma-mask related fixes from the ARM implementation which was almost identical initially but grew its own fixes. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
Make FIXADDR_TOP a compile time constant and cleanup a couple of definitions relative to the layout of the kernel address space on ppc32. We also print out that layout at boot time for debugging purposes. This is a pre-requisite for properly fixing non-coherent DMA allocactions. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
(pre-requisite to make the next patches more palatable) Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Mike Frysinger 提交于
Fix some more fallout of the string changes: CC arch/blackfin/lib/strncmp.o In file included from include/linux/bitmap.h:9, from include/linux/nodemask.h:90, from include/linux/mmzone.h:17, from include/linux/gfp.h:5, from include/linux/kmod.h:23, from include/linux/module.h:14, from arch/blackfin/lib/strncmp.c:14: include/linux/string.h: In function ‘strstarts’: include/linux/string.h:132: error: implicit declaration of function ‘strncmp’ make[1]: *** [arch/blackfin/lib/strncmp.o] Error 1 Signed-off-by: NMike Frysinger <vapier@gentoo.org> CC: Rusty Russell <rusty@rustcorp.com.au>
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由 Mike Frysinger 提交于
We don't create a include/asm/mach/ symlink anymore, so we don't need the .gitignore for it. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Benjamin Herrenschmidt 提交于
This reverts commit 33f00dce. While it was a good idea to try to use the mm/vmalloc.c allocator instead of our own (in fact, ours is itself a dup on an old variant of the vmalloc one), unfortunately, the approach is terminally busted since dma_alloc_coherent() can be called at interrupt time or in atomic contexts and there's little chances we'll make the code in mm/vmalloc.c cope with\ that :-( Until we can get the generic code to forbid that idiocy and fix all drivers abusing it, we pretty much have no choice but revert to our custom virtual space allocator. There's also a problem with SMP safety since freeing such mapping would require an IPI which cannot be done at interrupt time. However, right now, I don't think we support any platform that is both SMP and has non-coherent DMA (don't laugh, I know such things do exist !) so we can sort that out later. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Pallipadi, Venkatesh 提交于
Cleanup cpa_flush_array() to avoid back to back on_each_cpu() calls. [ Impact: optimizes fix 0af48f42 ] Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Andreas Herrmann 提交于
Slightly modified by trenn@suse.de -> only do this on fam 10h and fam 11h. Currently powernow-k8 determines CPU frequency from ACPI PSS objects, but according to AMD family 11h BKDG this frequency is just a rounded value: "CoreFreq (MHz) = The CPU COF specified by MSRC001_00[6B:64][CpuFid] rounded to the nearest 100 Mhz." As a consequnce powernow-k8 reports wrong CPU frequency on some systems, e.g. on Turion X2 Ultra: powernow-k8: Found 1 AMD Turion(tm)X2 Ultra DualCore Mobile ZM-82 processors (2 cpu cores) (version 2.20.00) powernow-k8: 0 : pstate 0 (2200 MHz) powernow-k8: 1 : pstate 1 (1100 MHz) powernow-k8: 2 : pstate 2 (600 MHz) But this is wrong as frequency for Pstate2 is 550 MHz. x86info reports it correctly: #x86info -a |grep Pstate ... Pstate-0: fid=e, did=0, vid=24 (2200MHz) Pstate-1: fid=e, did=1, vid=30 (1100MHz) Pstate-2: fid=e, did=2, vid=3c (550MHz) (current) Solution is to determine the frequency directly from Pstate MSRs instead of using rounded values from ACPI table. Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: NThomas Renninger <trenn@suse.de> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Thomas Renninger 提交于
- Make the message shorter and easier to grep for - Use printk_once instead of WARN_ONCE (functionality of these was mixed) Signed-off-by: NThomas Renninger <trenn@suse.de> Cc: Langsdorf, Mark <mark.langsdorf@amd.com> Signed-off-by: NDave Jones <davej@redhat.com>
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