1. 11 6月, 2014 1 次提交
  2. 08 5月, 2014 1 次提交
  3. 27 2月, 2014 2 次提交
  4. 05 1月, 2014 2 次提交
    • M
      crypto: mxs - Add Freescale MXS DCP driver · 15b59e7c
      Marek Vasut 提交于
      Add support for the MXS DCP block. The driver currently supports
      SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
      CRC32 is not yet supported.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: devicetree@vger.kernel.org
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      15b59e7c
    • M
      crypto: mxs - Remove the old DCP driver · c493c044
      Marek Vasut 提交于
      Remove the old DCP driver as it had multiple severe issues. The driver
      will be replaced by a more robust implementation. Here is a short list
      of problems with this driver:
      
      1) It only supports AES_CBC
      2) The driver was apparently never ran behind anyone working with MXS. ie.:
         -> Restarting the DCP block is not done via mxs_reset_block()
         -> The DT name is not "fsl,dcp" or "fsl,mxs-dcp" as other MXS drivers
      3) Introduces new ad-hoc IOCTLs
      4) The IRQ handler can't use usual completion() in the driver because that'd
         trigger "scheduling while atomic" oops, yes?
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c493c044
  5. 20 12月, 2013 1 次提交
  6. 05 12月, 2013 1 次提交
  7. 21 8月, 2013 1 次提交
  8. 01 8月, 2013 1 次提交
  9. 28 5月, 2013 1 次提交
    • T
      crypto: dcp - Added support for Freescale's DCP co-processor · 519d8b1a
      Tobias Rauter 提交于
      This patch enables the DCP crypto functionality on imx28.
      Currently, only aes-128-cbc is supported.
      Moreover, the dcpboot misc-device, which is used by Freescale's
      SDK tools and uses a non-software-readable OTP-key, is added.
      
      Changes of v2:
      - ring buffer for hardware-descriptors
      - use of ablkcipher walk
      - OTP key encryption/decryption via misc-device
        (compatible to Freescale-SDK)
      - overall cleanup
      
      The DCP is also capable of sha1/sha256 but I won't be able to add
      that anytime soon.
      Tested with built-in runtime-self-test, tcrypt and openssl via
      cryptodev 1.6 on imx28-evk and a custom built imx28-board.
      Signed-off-by: NTobias Rauter <tobias.rauter@gmail.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      519d8b1a
  10. 24 5月, 2013 1 次提交
  11. 21 3月, 2013 1 次提交
  12. 10 3月, 2013 1 次提交
  13. 22 11月, 2012 1 次提交
  14. 09 11月, 2012 1 次提交
  15. 20 8月, 2012 1 次提交
  16. 01 8月, 2012 1 次提交
  17. 11 7月, 2012 3 次提交
  18. 27 6月, 2012 1 次提交
  19. 12 6月, 2012 1 次提交
  20. 16 5月, 2012 2 次提交
  21. 15 5月, 2012 1 次提交
    • A
      crypto: mv_cesa requires on CRYPTO_HASH to build · 1ebfefcf
      Alexander Clouter 提交于
      Without CRYPTO_HASH being selected, mv_cesa has a lot of hooks
      into undefined exports.
      ----
        MODPOST 81 modules
        Kernel: arch/arm/boot/Image is ready
        AS      arch/arm/boot/compressed/head.o
        GZIP    arch/arm/boot/compressed/piggy.gzip
        CC      arch/arm/boot/compressed/misc.o
        CC      arch/arm/boot/compressed/decompress.o
      ERROR: "crypto_ahash_type" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_shash_final" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_register_ahash" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_unregister_ahash" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_shash_update" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_shash_digest" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_shash_setkey" [drivers/crypto/mv_cesa.ko] undefined!
      ERROR: "crypto_alloc_shash" [drivers/crypto/mv_cesa.ko] undefined!
      make[1]: *** [__modpost] Error 1
      make: *** [modules] Error 2
      make: *** Waiting for unfinished jobs....
      ----
      Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
      Signed-off-by: NJason Cooper <jason@lakedaemon.net>
      Cc: stable@vger.kernel.org
      1ebfefcf
  22. 04 5月, 2012 1 次提交
  23. 11 3月, 2012 1 次提交
  24. 13 1月, 2012 1 次提交
  25. 21 10月, 2011 1 次提交
  26. 20 10月, 2011 1 次提交
  27. 23 5月, 2011 1 次提交
  28. 04 5月, 2011 4 次提交
  29. 08 4月, 2011 1 次提交
  30. 27 3月, 2011 1 次提交
    • K
      crypto: caam - Add support for the Freescale SEC4/CAAM · 8e8ec596
      Kim Phillips 提交于
      The SEC4 supercedes the SEC2.x/3.x as Freescale's
      Integrated Security Engine.  Its programming model is
      incompatible with all prior versions of the SEC (talitos).
      
      The SEC4 is also known as the Cryptographic Accelerator
      and Assurance Module (CAAM); this driver is named caam.
      
      This initial submission does not include support for Data Path
      mode operation - AEAD descriptors are submitted via the job
      ring interface, while the Queue Interface (QI) is enabled
      for use by others.  Only AEAD algorithms are implemented
      at this time, for use with IPsec.
      
      Many thanks to the Freescale STC team for their contributions
      to this driver.
      Signed-off-by: NSteve Cornelius <sec@pobox.com>
      Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      8e8ec596
  31. 21 2月, 2011 1 次提交
  32. 12 9月, 2010 1 次提交