Signed-off-by: NRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Certain MC registers need a delay after writing them to properly
update in the init sequence.
Signed-off-by: NKen Wang <Ken.Wang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Check the atom scratch registers to see if asic_init is complete
or not.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Now that we use a pointer to the scratch reg start offset,
most of the functions were duplicated.
Acked-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Align with the atomfirmware code.
Acked-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

ttm_place are not supposed to change at runtime. All functions
working with ttm_place provided by <drm/ttm/ttm_placement.h> work
with const ttm_place. So mark the non-const structs as const.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drm_prop_enum_lists are not supposed to change at runtime. All functions
working with drm_prop_enum_list provided by <drm/drm_property.h> work with
const drm_prop_enum_list. So mark the non-const structs as const.

File size before:
   text	   data	    bss	    dec	    hex	filename
  18276	    384	      0	  18660	   48e4	drivers/gpu/drm/radeon/radeon_display.o

File size After adding 'const':
   text	   data	    bss	    dec	    hex	filename
  18660	      0	      0	  18660	   48e4	drivers/gpu/drm/radeon/radeon_display.o
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

ttm_place are not supposed to change at runtime. All functions
working with ttm_place provided by <drm/ttm/ttm_placement.h> work
with const ttm_place. So mark the non-const structs as const.

File size before:
   text	   data	    bss	    dec	    hex	filename
   9235	    344	    136	   9715	   25f3 drivers/gpu/drm/radeon/radeon_ttm.o

File size After adding 'const':
   text	   data	    bss	    dec	    hex	filename
   9267	    312	    136	   9715	   25f3 drivers/gpu/drm/radeon/radeon_ttm.o
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NArvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Otherwise the upper bits are lost.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Xie <AlexBin.Xie@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

That is already fixed.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

This makes it easier to correlate amd_sched_job with with other trace
points that don't log the job pointer.

v2: don't print the sched_job pointer (Andres)
Signed-off-by: NNicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: NAndres Rodriguez <andresx7@gmail.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com>

Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

This avoids binding them later on.

v2: fix typo in function name
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com>

No need to do this on every round.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com>

This allows us to flush the system VM here.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com>

This allows us to queue IBs which needs an up to date system domain as well.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com>

Overwriting still used ring content has a low probability to cause
problems, not writing at all has 100% probability to cause problems.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com>

Keep them where they belong.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com>

Add function header comment to make it clear that local variable sw_cg
is used for debugging and it should not be removed.

Addresses-Coverity-ID: 1198635
Cc: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: NGustavo A. R. Silva <garsilva@embeddedor.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This was updated to 512 and the description update got missed
Signed-off-by: NKent Russell <kent.russell@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

With previous golden settings, compute task can't use
reserved LDS (32K) on CU0 and CU1. On 64K LDS system,
if compute work group allocate more than 32K LDS, then
it can't be dispatched to CU0 and CU1 because of the
reservation. This enables compute task to use reserved
LDS on CU0 and CU1.
Signed-off-by: NOak Zeng <Oak.Zeng@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NFelix Kuehling <felix.kuehling@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Otherwise we trigger a bunch of WARN_ONs when this is called.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Stop spreading the code over all GMC generations.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This feature works for SRIOV enviroment. For non-SRIOV enviroment, the
trans_error function does nothing.

The error information includes error_code (16bit), error_flags(16bit)
and error_data(64bit). Since there are not many errors, we keep the
errors in an array and transfer all errors to Host before amdgpu
initialization function (amdgpu_device_init) exit.
Signed-off-by: NGavin Wan <Gavin.Wan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

With instantaneous high precision vblank timestamping
that updates at leading edge of vblank, a cooked hw
vblank counter which increments at leading edge of
vblank, and reliable page flip execution and completion
at leading edge of vblank, we should meet the requirements
for fast/immediate vblank irq disable/enable.

Testing on Linux-4.12-rc5 + drm-next on a Radeon R9 380
Tonga Pro (DCE 10) with timing measurement equipment
indicates this works fine, so allow immediate vblank
disable for power saving.

For debugging in case of unexpected trouble, booting
with kernel cmdline option drm.vblankoffdelay=0
(or echo 0 > /sys/module/drm/parameters/vblankoffdelay)
would keep vblank irqs permanently on to approximate old
behavior.
Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

With instantaneous high precision vblank timestamping
that updates at leading edge of vblank, a cooked hw
vblank counter which increments at leading edge of
vblank, and reliable page flip execution and completion
at leading edge of vblank, we should meet the requirements
for fast/immediate vblank irq disable/enable.

Testing on Linux-4.12-rc5 + drm-next on a Radeon HD 5770
(DCE 4) with timing measurement equipment indicates this
works fine, so allow immediate vblank disable for power
saving.

For debugging in case of unexpected trouble, booting
with kernel cmdline option drm.vblankoffdelay=0
(or echo 0 > /sys/module/drm/parameters/vblankoffdelay)
would keep vblank irqs permanently on to approximate old
behavior.
Reviewed-and-Tested-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

These are no longer needed now that we use the fb_location
programmed by the vbios.
Acked-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Not used.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

No need to do this as the vbios does this for us.  As such
we no longer need to stop the mc during init.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

No need to do this as the vbios does this for us.  As such
we no longer need to stop the mc during init.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

No need to do this as the vbios does this for us.  As such
we no longer need to stop the mc during init.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This makes mc programming much simpler in future patches.

Since evergreen, the vbios has been programming the fb location
to the proper vram size.  The only reason to reprogram it would
be to change the location.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This makes mc programming much simpler in future patches.

Since evergreen, the vbios has been programming the fb location
to the proper vram size.  The only reason to reprogram it would
be to change the location.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This makes mc programming much simpler in future patches.

Since evergreen, the vbios has been programming the fb location
to the proper vram size.  The only reason to reprogram it would
be to change the location.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This got dropped accidently with the fb location changes, but for
some reason, this doesn't seem to cause an issue on all cards which
is why I never saw it despite extensive testing.  I suspect it may
only be an issue on systems with a legacy sbios that enables vga.
Tested-by: NAndres Rodriguez <andresx7@gmail.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Now that we don't join PTE updates any more we don't need to call
the update function twice for this.

v2: rebased
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

v1: enable 4 level-page table on raven
v2: add back legacy 2 level page table on raven
v3: set num_level in initial switch statement
Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>