1. 07 3月, 2015 1 次提交
  2. 05 2月, 2015 1 次提交
  3. 22 12月, 2014 1 次提交
  4. 11 12月, 2014 4 次提交
    • M
      spi: Only idle the message pump in the worker kthread · fc9e0f71
      Mark Brown 提交于
      In order to avoid the situation where the kthread is waiting for another
      context to make the hardware idle let the message pump know if it's being
      called from the worker thread context and if it isn't then defer to the
      worker thread instead of idling the hardware immediately. This will ensure
      that if this situation happens we block rather than busy waiting.
      Signed-off-by: NMark Brown <broonie@kernel.org>
      fc9e0f71
    • M
      spi: Pump transfers inside calling context for spi_sync() · 0461a414
      Mark Brown 提交于
      If we are using the standard SPI message pump (which all drivers should be
      transitioning over to) then special case the message enqueue and instead of
      starting the worker thread to push messages to the hardware do so in the
      context of the caller if the controller is idle. This avoids a context
      switch in the common case where the controller has a single user in a
      single thread, for short PIO transfers there may be no need to context
      switch away from the calling context to complete the transfer.
      
      The code is a bit more complex than is desirable in part due to the need
      to handle drivers not using the standard queue and in part due to handling
      the various combinations of bus locking and asynchronous submission in
      interrupt context.
      
      It is still suboptimal since it will still wake the message pump for each
      transfer in order to schedule idling of the hardware and if multiple
      contexts are using the controller simultaneously a caller may end up
      pumping a message for some random other thread rather than for itself,
      and if the thread ends up deferring due to another context idling the
      hardware then it will just busy wait.  It can, however, have the benefit
      of aggregating power up and down of the hardware when a caller performs
      a series of transfers back to back without any need for the use of
      spi_async().
      Signed-off-by: NMark Brown <broonie@kernel.org>
      0461a414
    • M
      spi: Check to see if the device is processing a message before we idle · 983aee5d
      Mark Brown 提交于
      cur_msg is updated under the queue lock and holds the message we are
      currently processing. Since currently we only ever do removals in the
      pump kthread it doesn't matter in what order we do things but we want
      to be able to push things out from the submitting thread so pull the
      check to see if we're currently handling a message before we check to
      see if the queue is idle.
      Signed-off-by: NMark Brown <broonie@kernel.org>
      983aee5d
    • M
      spi: Move queue data structure initialisation to main master init · 5424d43e
      Mark Brown 提交于
      Since most devices now do use the standard queue and in order to avoid
      initialisation ordering issues being introduced by further refactorings
      to improve performance move the initialisation of the queue and the lock
      for it to the main master allocation.
      Signed-off-by: NMark Brown <broonie@kernel.org>
      5424d43e
  5. 05 12月, 2014 1 次提交
  6. 04 12月, 2014 1 次提交
    • F
      spi: Check for spi_of_notifier when CONFIG_OF_DYNAMIC=y · 5267720e
      Fabio Estevam 提交于
      Since commit ce79d54a ("spi/of: Add OF notifier handler") the
      following warning is seen on a imx53 system that has CONFIG_OF_DYNAMIC=n:
      
      [    0.048119] ------------[ cut here ]------------
      [    0.048146] WARNING: CPU: 0 PID: 1 at drivers/spi/spi.c:2419 spi_init+0x60/0xa8()
      [    0.048158] Modules linked in:
      [    0.048183] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.18.0-rc6-next-20141126-00003-g9388e85 #2080
      [    0.048193] Hardware name: Freescale i.MX53 (Device Tree Support)
      [    0.048203] Backtrace:
      [    0.048235] [<80011f74>] (dump_backtrace) from [<80012110>] (show_stack+0x18/0x1c)
      [    0.048246]  r6:00000973 r5:00000000 r4:00000000 r3:00000000
      [    0.048284] [<800120f8>] (show_stack) from [<806b3ad8>] (dump_stack+0x88/0xa4)
      [    0.048312] [<806b3a50>] (dump_stack) from [<8002a55c>] (warn_slowpath_common+0x80/0xbc)
      [    0.048320]  r5:8096cfcc r4:00000000
      [    0.048343] [<8002a4dc>] (warn_slowpath_common) from [<8002a5bc>] (warn_slowpath_null+0x24/0x2c)
      [    0.048354]  r8:8096cf6c r7:809355ec r6:ddcd7c00 r5:812029e4 r4:00000000
      [    0.048389] [<8002a598>] (warn_slowpath_null) from [<8096cfcc>] (spi_init+0x60/0xa8)
      [    0.048405] [<8096cf6c>] (spi_init) from [<80008a7c>] (do_one_initcall+0x88/0x1e0)
      [    0.048415]  r5:8099e018 r4:8099e018
      [    0.048438] [<800089f4>] (do_one_initcall) from [<80935e38>] (kernel_init_freeable+0x110/0x1e0)
      [    0.048448]  r10:80980700 r9:809806e4 r8:000000cc r7:809355ec r6:809f8940 r5:00000002
      [    0.048478]  r4:8098d744
      [    0.048508] [<80935d28>] (kernel_init_freeable) from [<806ae574>] (kernel_init+0x10/0xf4)
      [    0.048517]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:806ae564
      [    0.048547]  r4:00000000
      [    0.048565] [<806ae564>] (kernel_init) from [<8000ed68>] (ret_from_fork+0x14/0x2c)
      [    0.048574]  r4:00000000 r3:00000000
      [    0.048616] ---[ end trace 405a65d177dae4fd ]---
      
      Only check of_reconfig_notifier_register() in the CONFIG_OF_DYNAMIC=y case,
      as intended by commit ce79d54a.
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NGrant Likely <grant.likely@linaro.org>
      5267720e
  7. 25 11月, 2014 2 次提交
  8. 17 11月, 2014 1 次提交
    • C
      spi: Fix mapping from vmalloc-ed buffer to scatter list · c1aefbdd
      Charles Keepax 提交于
      We can only use page_address on memory that has been mapped using kmap,
      when the buffer passed to the SPI has been allocated by vmalloc the page
      has not necessarily been mapped through kmap. This means sometimes
      page_address will return NULL causing the pointer we pass to sg_set_buf
      to be invalid.
      
      As we only call page_address so that we can pass a virtual address to
      sg_set_buf which will then immediately call virt_to_page on it, fix this
      by calling sg_set_page directly rather then relying on the sg_set_buf
      helper.
      Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Cc: stable@vger.kernel.org
      c1aefbdd
  9. 30 9月, 2014 1 次提交
  10. 24 9月, 2014 1 次提交
  11. 22 9月, 2014 1 次提交
  12. 20 8月, 2014 1 次提交
  13. 13 8月, 2014 1 次提交
  14. 26 7月, 2014 1 次提交
  15. 11 7月, 2014 2 次提交
  16. 21 6月, 2014 2 次提交
  17. 26 5月, 2014 1 次提交
  18. 04 5月, 2014 1 次提交
  19. 03 5月, 2014 1 次提交
  20. 19 4月, 2014 1 次提交
    • G
      spi: core: Ignore unsupported Dual/Quad Transfer Mode bits · 83596fbe
      Geert Uytterhoeven 提交于
      The availability of SPI Dual or Quad Transfer Mode as indicated by the
      "spi-tx-bus-width" and "spi-rx-bus-width" properties in the device tree is
      a hardware property of the SPI master, SPI slave, and board wiring.  Hence
      the SPI core should not reject an SPI slave because an SPI master driver
      doesn't (yet) support Dual or Quad Transfer Mode.
      
      Change the lack of Dual or Quad Transfer Mode support in the SPI master
      driver from an error condition to a warning condition, and ignore the
      unsupported mode bits, falling back to Single Transfer Mode, to avoid
      breakages when running old kernels with new device trees.
      
      Fixes: f477b7fb (spi: DUAL and QUAD support)
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      Cc: stable@vger.kernel.org
      83596fbe
  21. 15 4月, 2014 2 次提交
    • Z
      spi: add "spi-lsb-first" to devicetree · cd6339e6
      Zhao Qiang 提交于
      add optional property devicetree for SPI slave nodes
      into devicetree so that LSB mode can be enabled by devicetree.
      Signed-off-by: NZhao Qiang <B45475@freescale.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      cd6339e6
    • H
      spi: core: Increase timeout value · eee668a9
      Harini Katakam 提交于
      The existing timeout value in wait_for_completion_timeout is
      calculated from the transfer length and speed with tolerance of 10msec.
      This is too low because this is used for error conditions such as
      hardware hang etc.
      The xfer->speed_hz considered may not be the actual speed set
      because the best clock divisor is chosen from a limited set such that
      the actual speed <= requested speed. This will lead to timeout being
      less than actual transfer time.
      Considering acceptable latencies, this timeout can be set to a
      value double the expected transfer plus 100 msecs.
      This patch adds the same in the core.
      Signed-off-by: NHarini Katakam <harinik@xilinx.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      eee668a9
  22. 30 3月, 2014 1 次提交
  23. 26 3月, 2014 1 次提交
    • M
      spi: Do not require a completion · 1e25cd47
      Mark Brown 提交于
      There is no real reason why we require transfers to have a completion and
      the only user of the completion now checks to see if one has been provided
      before using it so stop enforcing this. This makes it more convenient for
      drivers to chain multiple asynchronous transfers together.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      1e25cd47
  24. 17 3月, 2014 1 次提交
  25. 04 3月, 2014 1 次提交
  26. 23 2月, 2014 1 次提交
  27. 22 2月, 2014 1 次提交
  28. 14 2月, 2014 1 次提交
  29. 13 2月, 2014 1 次提交
  30. 10 2月, 2014 1 次提交
    • A
      spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller · 052eb2d4
      Axel Lin 提交于
      In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not
      set for this transfer. However, if spi->max_speed_hz is also not set,
      xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash,
      tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0.
      
              /* Set speed to the spi max fequency if spi device has not set */
              spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
      
      Let's handle it in spi core.
      If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz.
      So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set,
      xfer->speed_hz will be set to spi->master->max_speed_hz.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      052eb2d4
  31. 05 2月, 2014 2 次提交
    • M
      spi: Make core DMA mapping functions generate scatterlists · 6ad45a27
      Mark Brown 提交于
      We cannot unconditionally use dma_map_single() to map data for use with
      SPI since transfers may exceed a page and virtual addresses may not be
      provided with physically contiguous pages. Further, addresses allocated
      using vmalloc() need to be mapped differently to other addresses.
      
      Currently only the MXS driver handles all this, a few drivers do handle
      the possibility that buffers may not be physically contiguous which is
      the main potential problem but many don't even do that. Factoring this
      out into the core will make it easier for drivers to do a good job so if
      the driver is using the core DMA code then generate a scatterlist
      instead of mapping to a single address so do that.
      
      This code is mainly based on a combination of the existing code in the MXS
      and PXA2xx drivers. In future we should be able to extend it to allow the
      core to concatenate adjacent transfers if they are compatible, improving
      performance.
      
      Currently for simplicity clients are not allowed to use the scatterlist
      when they do DMA mapping, in the future the existing single address
      mappings will be replaced with use of the scatterlist most likely as
      part of pre-verifying transfers.
      
      This change makes it mandatory to use scatterlists when using the core DMA
      mapping so update the s3c64xx driver to do this when used with dmaengine.
      Doing so makes the code more ugly but it is expected that the old s3c-dma
      code can be removed very soon.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      6ad45a27
    • M
      spi: Provide core support for full duplex devices · 3a2eba9b
      Mark Brown 提交于
      It is fairly common for SPI devices to require that one or both transfer
      directions is always active. Currently drivers open code this in various
      ways with varying degrees of efficiency. Start factoring this out by
      providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause
      the core to provide buffers for the requested direction if none are
      specified in the underlying transfer.
      
      Currently this is fairly inefficient since we actually allocate a data
      buffer which may get large, support for mapping transfers using a
      scatterlist will allow us to avoid this for DMA based transfers.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      3a2eba9b
  32. 03 2月, 2014 1 次提交
    • M
      spi: Provide core support for DMA mapping transfers · 99adef31
      Mark Brown 提交于
      The process of DMA mapping buffers for SPI transfers does not vary between
      devices so in order to save duplication of code in drivers this can be
      factored out into the core, allowing it to be integrated with the work that
      is being done on factoring out the common elements from the data path
      including more sharing of dmaengine code.
      
      In order to use this masters need to provide a can_dma() operation and while
      the hardware is prepared they should ensure that DMA channels are provided
      in tx_dma and rx_dma. The core will then ensure that the buffers are mapped
      for DMA prior to calling transfer_one_message().
      
      Currently the cleanup on error is not complete, this needs to be improved.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      99adef31