“24509f4af942bb250564756ad636691c7921e1df”上不存在“paddle/fluid/operators/roi_align_op.cc”
  1. 11 9月, 2011 9 次提交
  2. 10 9月, 2011 5 次提交
  3. 09 9月, 2011 6 次提交
  4. 07 9月, 2011 6 次提交
  5. 06 9月, 2011 4 次提交
  6. 05 9月, 2011 5 次提交
  7. 02 9月, 2011 3 次提交
  8. 01 9月, 2011 2 次提交
    • G
      mmc: sdhci-s3c: Fix mmc card I/O problem · 49bb1e61
      Girish K S 提交于
      This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's.
      During the card identification stage the mmc core driver enumerates for
      the best bus width in combination with the highest available data rate.
      It starts enumerating from the highest bus width (8) to lowest width (1).
      
      In case of few MMC cards the 4-bit bus enumeration fails and tries
      the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver
      has to clear the previous bus width setting and apply the new setting.
      
      The current patch will clear the previous bus mode and apply the new
      mode setting.
      Signed-off-by: NGirish K S <girish.shivananjappa@linaro.org>
      Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      49bb1e61
    • S
      mmc: sd: UHS-I bus speed should be set last in UHS initialization · 93c712f9
      Subhash Jadavani 提交于
      mmc_sd_init_uhs_card function sets the driver type, current limit
      and bus speed mode on card as well as on host controller side.
      
      Currently bus speed mode is set by sending CMD6 to card and
      immediately setting the timing mode in host controller. But
      then before initiating tuning sequence, it also tries to set
      current limit by sending CMD6 to card which results in data
      timeout errors in controller if bus speed mode is SDR50/SDR104 mode.
      
      So basically bus speed mode should be set only after current limit
      is set in the card and immediately after setting the bus speed mode,
      tuning sequence should be initiated.
      Signed-off-by: NSubhash Jadavani <subhashj@codeaurora.org>
      Reviewed-by: NArindam Nath <arindam.nath@amd.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      93c712f9