- 24 7月, 2015 21 次提交
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由 Peter Hurley 提交于
Refactor base port operations into new file; 8250_port.c. Legacy irq handling, RSA port support, port storage for universal driver, driver definition, module parameters and linkage remain in 8250_core.c The source file split and resulting modules is diagrammed below: 8250_core.c ====> 8250_core.c __ \ \ \ +-- 8250.ko (alias 8250_core) \ 8250_pnp.c __/ (universal driver) \ => 8250_port.c __ \ +-- 8250_base.ko 8250_dma.c __/ (port operations) Signed-off-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 David Jander 提交于
If the UART has been in use before this driver was loaded, IRQs might be active and get fired as soon as we set the handler, which will crash in the spin_lock_irqsave(&sport->port.lock, flags) because port.lock is not initialized until the port is added at the end of probe. Signed-off-by: NDavid Jander <david@protonic.nl> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Manfred Schlaegl 提交于
To prevent problems with interrupt latency, and due to the fact, that the error will be counted anyway (icount.overrun), the dev_err is simply removed. Background: If an rx-fifo overflow occurs a dev_err message was called in interrupt context. Since dev_err messages are written to console in a synchronous way (unbuffered), and console may be a serial terminal, this leads to a highly increased interrupt-latency (several milliseconds). As a result of the high latency more rx-fifo overflows will happen, and therefore a feedback loop of errors is created. Signed-off-by: NManfred Schlaegl <manfred.schlaegl@gmx.at> Acked-By: NAlexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Manfred Schlaegl 提交于
As can be seen in function uart_insert_char (serial_core) the element buf_overrun of struct uart_icount is used to count overruns of tty-buffer. Added support for counting of overruns in imx driver analogue to serial_core. Signed-off-by: NManfred Schlaegl <manfred.schlaegl@gmx.at> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Fabio Estevam 提交于
Disable interrupts before requesting them in order to fix a kernel oops after lauching a kernel via kexec. Tested on a imx6sl-evk board. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Being a soft core, it can be located not only on PPC or Microblaze platforms. Since the driver already does endianness detection we only need to change the Kconfig to use it in other arches. This is also done in other softcores as xilinx-spi. Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Maxime Coquelin 提交于
SysRq support activation depends on CONFIG_SERIAL_STM32_USART_CONSOLE, but this config flag does not exists. This patch fix this by depending on the valid config flag, which is SERIAL_STM32_CONSOLE. Reported-by: NAndreas Ruprecht <andreas.ruprecht@fau.de> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Qipan Li 提交于
While UART work in DMA mode, function start_rx will request descriptor from DMA engine, if there is no left descriptor UART, driver will give err logs "DMA slave single fail". currently start_rx is called in set_termios function, so everytime, port setting will call start_rx once. Now put start_rx in startup, it will be called once while open the port. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Qipan Li 提交于
when UART works in DMA mode and left bytes in rx fifo less than a dma transfer unit, DMA engine can't transfer the bytes out to rx DMA buffer. so it need a way to fetch them out and flush them into tty buffer in time. in the above case, we want UART switch from DMA mode to PIO mode and fetch && flush bytes into tty layer buffer until rxfifo become empty, after that done let UART switch from PIO mode back to DMA mode. (record as method1) method1 result in the next receive result wrong. for example in PIO part of method1, we fetched && pushed X1...X3 bytes, when UART rxfifo newly received Y1...Y4 bytes, UART trigger a DMA unit transfer, the DMA unit's content is X1...X3Y1 and rxfifo fifo status is empty, so X1X2X3 pushed twice by PIO way and DMA way also the bytes Y2Y3Y4 missed. add rxfifo reset operation before UART switch back to DMA mode would resolve the issue. ([method1 + do fifo reset] record as method2) before the commit, UART driver use method2. but methd2 have a risk of data loss, as if UART's shift register receive a complete byte and transfer it into rxfifo before rxfifo reset operation the byte will loss. UART and USP have the similar bits CLEAR_RX_ADDR_EN(uart)/FRADDR_CLR_EN(usp), When found UART controller changing I/O to DMA mode, UART controller clears the two low bits of read point (rx_fifo_addr[1:0]). when enable the bit + method1(record as method3), in above example the DMA unit's content is X1...X3Y1 and there are Y2Y3Y4 in rxfifo by experiment, we just push bytes in rx DMA buffer. BTW, the workaround works only for UART receive DMA channel use SINGLE DMA mode. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Axel Lin 提交于
The implementation of cris_console_device() is exactly the same as uart_console_device(), so let's switch to use uart_console_device(). Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NNiklas Cassel <nks@flawful.org> Acked-by: NJesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Peter Hurley 提交于
OMAP h/w-assisted IXON flow control is borked. The transmitter becomes stuck if XON is never received; clearing the fifos or resetting the rx flow control bits has no effect. Remove auto-IXANY as well, since without auto-IXON, it has no purpose. Signed-off-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
Due to Advisory 21 as documented in AM437x errata document, UART module cannot be disabled once DMA is used. The only workaround is to softreset the module before disabling it. DRA7x UARTs are compatible to AM437x UARTs in terms of this errata and prescribed workaround. Enable usage of workaround for this errata on DRA7x SoCs. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
AM335x, AM437x and DRA7x SoCs have an errata[1] due to which UART cannot be idled after it has been used with DMA. OMAP3 has a similar sounding errata which has been worked around in a2fc3661 ("ARM: OMAP3: Use manual idle for UARTs because of DMA errata"). But the workaround used there does not apply to AM335x, AM437x SoCs. After using DMA, the UART module on these SoCs must be soft reset to go to idle. This patch implements that errata workaround. It is expected that UART will be used with DMA so no explicit check for DMA usage has been added for errata applicability. MDR1 register needs to be restored right after soft-reset because "UART mode" must be set in that register for module wake-up on AM335x to work. As a result, SCR register is now used to determine if context was lost during sleep. [1] See Advisory 21 in AM437x errata SPRZ408B, updated April 2015. http://www.ti.com/lit/er/sprz408b/sprz408b.pdfSigned-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
Use of of_machine_is_compatible() for handling AM335x specific "DMA kick" quirk in 8250_omap driver makes it ugly to extend the quirk for other platforms. Instead use a new compatible. The new compatible will also make it easier to take care of other quirks on AM335x and like SoCs. In order to not break backward DTB compatibility for users of 8250_omap driver on AM335x based boards, existing use of of_machine_is_compatible() has not been removed. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
The silicon errata[1] workaround implemented in a follow-on patch, "serial: 8250_omap: workaround errata on disabling UART after using DMA", requires MDR1 register programming. Extract MDR1 register update into helper function, omap8250_update_mdr1() to help with that. [1] Advisory 21 in http://www.ti.com/lit/er/sprz408b/sprz408b.pdfSigned-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sekhar Nori 提交于
omap_device infrastructure has a suspend_noirq hook which runtime suspends all devices late in the suspend cycle (see _od_suspend_noirq() in arch/arm/mach-omap2/omap_device.c) This leads to a NULL pointer exception in 8250_omap driver since by the time omap8250_runtime_suspend() is called, 8250_dma driver has already set rxchan to NULL via serial8250_release_dma(). Make an explicit check to see if rxchan is NULL in runtime_{suspend|resume} hooks to fix this. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Fintek chip can be configured for io addresses different than the standard. Query the chip for the configured addresses and try to match it with the pnp address. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Chip can be configured to use entry key different than 0x77. Try all the valid keys until one gives out the right chip id. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
There are some chips with the same interface but different chip ip. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Fintek chip can be connected at address 0x4e and also 0x2e. Add some logic to find out the address of the chip. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ricardo Ribalda Delgado 提交于
Save the port index and the line id in a private structure. Reported-by: NPeter Hong <peter_hong@fintek.com.tw> Reviewed-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 6月, 2015 2 次提交
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由 Yoshinori Sato 提交于
There is much SCI of SoC having within, and the register size is also different in everyone. So get from platform device. Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp> Acked-by: Nby: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Yoshinori Sato 提交于
Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 22 6月, 2015 1 次提交
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由 Paul Burton 提交于
Introduce a driver suitable for use with the UARTs present in Ingenic SoCs such as the JZ4740 & JZ4780. These are described as being ns16550 compatible but aren't quite - they require the setting of an extra bit in the FCR register to enable the UART module. The serial_out implementation is the same as that in arch/mips/jz4740/serial.c - which will shortly be removed. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-serial@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Alan Cox <alan@linux.intel.com> Cc: linux-kernel@vger.kernel.org Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/10159/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 13 6月, 2015 4 次提交
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由 Fernando Guzman Lugo 提交于
In platforms which does not use CLK framework (HAVE_CLK not set), the clk_* functions return NULL instead of an error. This patch handles that scenario. Signed-off-by: NFernando Guzman Lugo <fernando.guzman.lugo@intel.com> Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Soeren Grunewald 提交于
The internal clock of the master chip, which is usually 125MHz, is only half (62.5MHz) for the slave chips. So we have to adjust the uartclk for all the slave ports. Therefor we add a new function to determine if a slave chip is present and update pci_xr17v35x_setup accordingly. Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Soeren Grunewald 提交于
The Exar XR17V358 can also be combined with a XR17V354 chip to act as a single 12 port chip. This works the same way as the combining two XR17V358 chips. But the reported device id then is 0x4358. Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Joakim Nordell 提交于
Align with coding guidelines: Replaced a chain of "else if" by a switch case. Signed-off-by: NJoakim Nordell <joakim.nordell@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 11 6月, 2015 1 次提交
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由 Maxime Coquelin 提交于
This drivers adds support to the STM32 USART controller, which is a standard serial driver. Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 6月, 2015 3 次提交
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由 Tony Lindgren 提交于
We can now use generic wakeirq handling and remove the custom handling for the wake-up interrupts. Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
We can now use generic wakeirq handling and remove the custom handling for the wake-up interrupts. Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Rob Herring 提交于
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also set IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: Barry Song <baohua@kernel.org> Cc: linux-serial@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 01 6月, 2015 8 次提交
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由 Rojhalat Ibrahim 提交于
There have been concerns that the function names gpiod_set_array() and gpiod_get_array() might be confusing to users. One might expect gpiod_get_array() to return array values, while it is actually the array counterpart of gpiod_get(). To be consistent with the single descriptor API we could rename gpiod_set_array() to gpiod_set_array_value(). This makes some function names a bit lengthy: gpiod_set_raw_array_value_cansleep(). Signed-off-by: NRojhalat Ibrahim <imr@rtschenk.de> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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The currently in-use port->startup and port->shutdown are "okay". The startup part for instance does the tiny omap extra part and invokes serial8250_do_startup() for the remaining pieces. The workflow in serial8250_do_startup() is okay except for the part where UART_RX is read without a check if there is something to read. I tried to workaround it in commit 0aa525d1 ("tty: serial: 8250_core: read only RX if there is something in the FIFO") but then reverted it later in commit ca8bb4ae ("serial: 8250: Revert "tty: serial: 8250_core: read only RX if there is something in the FIFO""). This is the second attempt to get it to work on older OMAPs without breaking other chips this time Peter Hurley suggested to pull in the few needed lines from serial8250_do_startup() and drop everything else that is not required including making it simpler like using just request_irq() instead the chain handler like it is doing now. So lets try that. Fixes: ca8bb4ae ("serial: 8250: Revert "tty: serial: 8250_core: read only RX if there is something in the FIFO"") Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Joachim Eastwood 提交于
Serial port driver for the 8250-based UART found on LPC18xx/43xx devices. The UART is 16550A compatible with additional features like RS485 support, synchronous mode, IrDA, and DMA. For now only basic UART and RS485 operation is supported. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Masahiro Yamada 提交于
Add the driver for on-chip UART used on UniPhier SoCs. This hardware is similar to 8250, but the register mapping is slightly different: - The offset to FCR, MCR is different. - The divisor latch access bit does not exist. Instead, the divisor latch register is available at offset 9. This driver overrides serial_{in,out}, dl_{read,write} callbacks, but wants to borrow most of code from 8250_core.c. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Heikki Krogerus 提交于
On many new Intel SoCs the UART has an integrated DMA engine (iDMA). In order to use it a special filter function is needed. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Masahiro Yamada 提交于
The function clk_prepare_enable() may fail, and in that case it does not make sense to proceed. Let's check its return code and error out if it is a negative value. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Masahiro Yamada 提交于
The probe method of this driver calls clk_get(), but clk_put() is missing from the remove callback. Using the managed clk function is easier than fixing other parts. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Noam Camus 提交于
Support command line parameters of the form: earlycon=<name>,io|mmio|mmio32|mmio32be,<addr>,<options> This commit seem to be needed even after commit: serial: 8250: Add support for big-endian MMIO accesses c627f2ceSigned-off-by: NNoam Camus <noamc@ezchip.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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