The patch to convert of the ep93xx gpio driver to a platform_driver is
missing the define for the memory resource that is passed to the driver.

This is needed to prevent a build error.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Add platform support for the EP93xx AC97 controller driver.
Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add core support for EP93xx i2s audio
Signed-off-by: NRyan Mallon <ryan@bluewatersys.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

This patch adds platform side support code for the EP93xx SPI
driver. This includes clock, resources and muxing. There is a new
function: ep93xx_register_spi() which can be used by board support
code to register new SPI devices for the board.

This patch depends on patch
  5998/1 ep93xx: added chip revision reading function

Cc: Ryan Mallon <ryan@bluewatersys.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NMartin Guy <martinwguy@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The timer defines are only used in core.c. Move them so
they will not be globaly exposed.

While here, add additional defines to document the magic
numbers used in the registers. Also, add some comments
for clarification.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add defines for the pll register magic numbers that determine if
the pll's are bypassed and if pll2 is enabled.  Rename the clock
set registers to more closely match the datasheet.  Also, remove
the unnecessary braces since each conditional statement is a single
statement.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add the core support needed by the ep93xx matrix keypad driver.

The keypad driver unfortunately was merged early and the core
support is missing.  The clkdev support has been resolved and
is now merged.  This adds the platform device to the ep93xx
core and supplies the functions needed to acquire/free the gpio
pins and actually enable/disable the controller peripheral.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update the ep93xx i2c support:

  1) The platform init code passes the configuration data for the
     i2c-gpio driver.  This allows any gpio pin do be used for the
     sda and scl pins.  It also allows the platform to specify the
     udelay and timeout.
  2) Program the gpio configuration register to enable/disable the
     open drain drivers.  Note that this really only works if the
     sda and scl pins are set to EP93XX_GPIO_LINE_EEDAT and
     EP93XX_GPIO_LINE_EECLK.
  3) Update the edb93xx.c platform init to use the new support.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Most of the EP93XX_GPIO_*_INT_* register defines in ep93xx-regs.h
not required due to how the ep93xx core and gpiolib support handle
gpio interrupts.  Remove the defines to prevent future confusion.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Change the #define's for the EP93XX_*_PHYS_BASE addresses to use
macros for easier readability.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update Contec Micro9 platform code

Cc: Ryan Mallon <ryan@bluewatersys.com>

Requires: 5749/1
Signed-off-by: NHubert Feurstein <hubert.feurstein@contec.at>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRyan Mallon <ryan@bluewatersys.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Daniele Venzano <linux@brownhat.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The EP93xx features two PWMs (one on the EP9307) with the following
features:

  * Configurable dual output
  * Separate input clocks for each PWM output
  * 16-bit resolution
  * Programmable pulse width (duty cycle), interval (frequency), and
    polarity

This adds the necessary core support as well as the driver.  A sysfs
interface is provided to control the PWM outputs.
Signed-off-by: NMatthieu Crapet <mcrapet@gmail.com>
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add missing register defines for ep93xx keypad clock support.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add core functions to handle writes to the ep93xx software locked
registers.

There are a number of registers in the EP93xx System Controller
that require a write to the software lock register before they
can be updated. This patch adds a number of exported functions
to the ep93xx core that handle this access.

The software locked clock divider registers, VidClkDiv, MIRClkDiv,
I2SClkDiv and KeyTchClkDiv would typically involve writing a
specific value to the register. To support this the
ep93xx_syscon_swlocked_write() function is provided.

For the DeviceCfg register it's more typical to only need to
set or clear a single bit. A generic ep93xx_devcfg_set_clear()
function is provided to handle both operations. Two inline
functions, ep93xx_devcfg_set_bits() and ep93xx_devcfg_clear_bits()
are also provided to improve code readability.

In addition, the remaining bits in the System Controller Device
Config Register have been documented and the previously defined
names shortened.

All code paths that use this functionality have been updated
except for arch/arm/kernel/crunch.c. That code is in a context
switch path, which is not reentrant, so it is safe against itself.

Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

ARM: ep93xx: ensure typesafe io

For the ep93xx platform, all EP93XX_*_BASE defines are based
on virtual addresses.  Ensure that all these defines are
properly typesafe for the __raw_{read/write}* macros.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update the dma clocks so that the magic numbers are named.

All the dma clocks have an enable bit to turn them on/off as
needed.  Currently these bits are in the code as "magic"
numbers.  This changes all of them to named defines to
improve code readability.

Also, the EP93XX_SYSCON_CLOCK_CONTROL register is improperly
named.  In the EP93xx User's Guide this register is called
PwrCnt (Power Control).  All of the uses of this register
are associated with the clock support so this patch also
modifies the names to match the User's Guide.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix the clkdev API support for the ep93xx uart clocks.

The uarts available in the ep93xx have individual clock controls.
The current implementation assumes that the bootloader has enabled
the clocks before the kernel has booted. It also assumes that the
bootloader has set the UARTBAUD bit indicating that the uarts are
running off the 14.7456MHz external crystal.

This fixes both issues. It also allows the uart clocks to be stopped
when there are no users.
Tested-by: NMatthias Kaehlcke <matthias@kaehlcke.net>

Cc: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update the rtc-ep93xx driver to use ioremap'ed addresses.

This removes the dependency on <mach/hardware.h> and properly
reports the memory addresses used by the driver in /proc/iomem.

In addition, ep93xx_rtc_init() is updated to use
platform_driver_probe() instead of platform_driver_register().

Also, the device_create_file() calls are now properly checked for
error conditions.  The created sysfs files are also now removed
when the driver is removed.

The version number for the driver has been bumped at the request
of Alessandro Zummo.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NAlessandro Zummo <a.zummo@towertech.it>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add m2p dma support to the ep93xx
Signed-off-by: NRyan Mallon <ryan@bluewatersys.com>
Acked-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds defines for the external chipselect physical base
addresses available with the EP93xx. These are meant to be used
in the platform init code.

In addition, documentation about the synchronous/asynchronous boot
modes for the EP93xx and a reference to errata about issues with
synchronous booting has been added.
Signed-off-by: N&lt;H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Cirrus Logic ep93xx is an ARM SoC that includes an ethernet MAC
-- this patch adds a driver for that ethernet MAC.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Patch from Lennert Buytenhek

Add an initial implementation of the clk_* API for the cirrus ep93xx
to the tree.  The initial implementation is somewhat minimal, with the
intention of extending it as we go along.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patch from Lennert Buytenhek

Add GPIO interrupt support for the first 16 GPIO lines (port A
and B.)
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patch from Lennert Buytenhek

Add support for setting the direction of and getting/setting the
value of the 64 GPIO lines.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patch from Lennert Buytenhek

This patch adds support for the Cirrus ep93xx series of CPUs.  The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.

This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>