- 29 9月, 2020 1 次提交
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由 Anson Huang 提交于
Change config to tristate, add module device table, module author, description and license to support module build for i.MX GPIO driver. As this is a SoC GPIO module, it provides common functions for most of the peripheral devices, such as GPIO pins control, secondary interrupt controller for GPIO pins IRQ etc., without GPIO driver, most of the peripheral devices will NOT work properly, so GPIO module is similar with clock, pinctrl driver that should be loaded ONCE and never unloaded. Since MXC GPIO driver needs to have init function to register syscore ops once, here still use subsys_initcall(), NOT module_platform_driver(). Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1600320829-1453-1-git-send-email-Anson.Huang@nxp.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 8月, 2020 1 次提交
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由 Serge Semin 提交于
GPIO-lib provides a ready-to-use interface to initialize an IRQ-chip on top of a GPIO chip. It's better from maintainability and readability point of view to use one instead of supporting a hand-written Generic IRQ-chip-based implementation. Moreover the new implementation won't cause much functional overhead but will provide a cleaner driver code. All of that makes the DW APB GPIO driver conversion pretty much justified especially seeing a tendency of the other GPIO drivers getting converted too. Here is what we do in the framework of this commit to convert the driver to using the GPIO-lib-based IRQ-chip interface: 1) IRQ ack, mask and unmask callbacks are locally defined instead of using the Generic IRQ-chip ones. 2) An irq_chip structure instance is embedded into the dwapb_gpio private data. Note we can't have a static instance of that structure since GPIO-lib will add some hooks into it by calling gpiochip_set_irq_hooks(). A warning about that would have been printed by the GPIO-lib code if we used a single irq_chip structure instance for multiple DW APB GPIO controllers. 3) Initialize the gpio_irq_chip structure embedded into the gpio_chip descriptor. By default there is no IRQ enabled so any event raised will be handled by the handle_bad_irq() IRQ flow handler. If DW APB GPIO IP-core is synthesized to have non-shared reference IRQ-lines, then as before the hierarchical and cascaded cases are distinguished by checking how many parental IRQs are defined. (Note irq_set_chained_handler_and_data() won't initialize IRQs, which descriptors couldn't be found.) If DW APB GPIO IP is used on a platform with shared IRQ line, then we simply won't let the GPIO-lib to initialize the parental IRQs, but will handle them locally in the driver. 4) Discard linear IRQ-domain and Generic IRQ-chip initialization, since GPIO-lib IRQ-chip interface will create a new domain and accept a standard IRQ-chip structure pointer based on the setting we provided in the gpio_irq_chip structure. 5) Manually select a proper IRQ flow handler directly in the irq_set_type() callback by calling irq_set_handler_locked() method, since an ordinary (not Generic) irq_chip descriptor is now utilized. Note this shalln't give any regression 6) Alter CONFIG_GPIO_DWAPB kernel config to select CONFIG_GPIOLIB_IRQCHIP instead of CONFIG_GENERIC_IRQ_CHIP. Note neither 4) nor 5) shall cause a regression of commit 6a2f4b7d ("gpio: dwapb: use a second irq chip"), since the later isn't properly used here anyway. Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200730152808.2955-6-Sergey.Semin@baikalelectronics.ruSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 7月, 2020 1 次提交
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由 Sungbo Eo 提交于
NXP PCA9570 is a 4-bit I2C GPO expander without interrupt functionality. Its ports are controlled only by a data byte without register address. Signed-off-by: NSungbo Eo <mans0n@gorani.run> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Datasheet: https://www.nxp.com/docs/en/data-sheet/PCA9570.pdf Link: https://lore.kernel.org/r/20200709134829.216393-1-mans0n@gorani.runSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 6月, 2020 1 次提交
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由 Geert Uytterhoeven 提交于
All config options for GPIO drivers are inside a big "if GPIOLIB ... endif" block, so there is no reason for individual config options to have expicit dependencies on GPIOLIB. Hence remove them. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 14 6月, 2020 1 次提交
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由 Masahiro Yamada 提交于
Since commit 84af7a61 ("checkpatch: kconfig: prefer 'help' over '---help---'"), the number of '---help---' has been gradually decreasing, but there are still more than 2400 instances. This commit finishes the conversion. While I touched the lines, I also fixed the indentation. There are a variety of indentation styles found. a) 4 spaces + '---help---' b) 7 spaces + '---help---' c) 8 spaces + '---help---' d) 1 space + 1 tab + '---help---' e) 1 tab + '---help---' (correct indentation) f) 1 tab + 1 space + '---help---' g) 1 tab + 2 spaces + '---help---' In order to convert all of them to 1 tab + 'help', I ran the following commend: $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/' Signed-off-by: NMasahiro Yamada <masahiroy@kernel.org>
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- 03 6月, 2020 1 次提交
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由 Michael Walle 提交于
There are quite a lot simple GPIO controller which are using regmap to access the hardware. This driver tries to be a base to unify existing code into one place. This won't cover everything but it should be a good starting point. It does not implement its own irq_chip because there is already a generic one for regmap based devices. Instead, the irq_chip will be instantiated in the parent driver and its irq domain will be associate to this driver. For now it consists of the usual registers, like set (and an optional clear) data register, an input register and direction registers. Out-of-the-box, it supports consecutive register mappings and mappings where the registers have gaps between them with a linear mapping between GPIO offset and bit position. For weirder mappings the user can register its own .xlate(). Signed-off-by: NMichael Walle <michael@walle.cc> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200528145845.31436-3-michael@walle.ccSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 5月, 2020 2 次提交
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由 Andy Shevchenko 提交于
Perhaps by some historical reasons the IRQ support has been allowed only for built-in driver. However, there is nothing prevents us to build it as module an use as IRQ chip. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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由 Tiezhu Yang 提交于
Add COMPILE_TEST support to the PXA GPIO driver for better compile testing coverage. Signed-off-by: NTiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 18 5月, 2020 3 次提交
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由 Geert Uytterhoeven 提交于
GPIO controllers are exported to userspace using /dev/gpiochip* character devices. Access control to these devices is provided by standard UNIX file system permissions, on an all-or-nothing basis: either a GPIO controller is accessible for a user, or it is not. Currently no mechanism exists to control access to individual GPIOs. Hence add a GPIO driver to aggregate existing GPIOs, and expose them as a new gpiochip. This supports the following use cases: - Aggregating GPIOs using Sysfs This is useful for implementing access control, and assigning a set of GPIOs to a specific user or virtual machine. - Generic GPIO Driver This is useful for industrial control, where it can provide userspace access to a simple GPIO-operated device described in DT, cfr. e.g. spidev for SPI-operated devices. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NEugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: NEugeniu Rosca <erosca@de.adit-jv.com> Link: https://lore.kernel.org/r/20200511145257.22970-5-geert+renesas@glider.beSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
Allow driver to be built with COMPILE_TEST for better test coverage. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200512182721.55127-2-andriy.shevchenko@linux.intel.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
There is nothing in the driver requires OF_GPIO. Moreover, driver supports ACPI and OF_GPIO may be a quite overhead on such configurations. Drop dependency for good and replace of_gpio.h to of.h since we have one function to be defined from there. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200512182721.55127-1-andriy.shevchenko@linux.intel.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 14 4月, 2020 1 次提交
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由 Rob Herring 提交于
Enable building the PL061 GPIO driver as a module. This does change the initcall level when built-in. This shouldn't be a problem as any user should support deferred probe by now. A scan of DT based platforms at least didn't reveal any users that would be a problem. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 25 3月, 2020 2 次提交
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由 Anson Huang 提交于
Add COMPILE_TEST support to GPIO_MXS driver for better compile testing coverage. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reported-by: Nkbuild test robot <lkp@intel.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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由 Anson Huang 提交于
Add COMPILE_TEST support to GPIO_MXC driver for better compile testing coverage. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 09 3月, 2020 1 次提交
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由 Asmaa Mnebhi 提交于
This patch adds support for the GPIO controller used by Mellanox BlueField 2 SOCs. Signed-off-by: NAsmaa Mnebhi <Asmaa@mellanox.com> Link: https://lore.kernel.org/r/1680de9eb6d2b8855228dde9a2dd065f0dcbe1fb.1583182325.git.Asmaa@mellanox.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 1月, 2020 1 次提交
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由 Matti Vaittinen 提交于
ROHM BD71828 PMIC contains 4 pins which can be configured by OTP to be used for general purposes. First 3 can be used as outputs and 4.th pin can be used as input. Allow them to be controlled via GPIO framework. The driver assumes all of the pins are configured as GPIOs and trusts that the reserved pins in other OTP configurations are excluded from control using "gpio-reserved-ranges" device tree property (or left untouched by GPIO users). Typical use for 4.th pin (input) is to use it as HALL sensor input so that this pin state is toggled when HALL sensor detects LID position change (from close to open or open to close). PMIC HW implements some extra logic which allows PMIC to power-up the system when this pin is toggled. Please see the data sheet for details of GPIO options which can be selected by OTP settings. Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 21 1月, 2020 1 次提交
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由 Yash Shah 提交于
Adds the GPIO driver for SiFive RISC-V SoCs. Signed-off-by: NWesley W. Terpstra <wesley@sifive.com> [Atish: Various fixes and code cleanup] Signed-off-by: NAtish Patra <atish.patra@wdc.com> Signed-off-by: NYash Shah <yash.shah@sifive.com> Signed-off-by: NMarc Zyngier <maz@kernel.org> Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/1575976274-13487-6-git-send-email-yash.shah@sifive.com
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- 15 1月, 2020 3 次提交
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由 Srinivas Kandagatla 提交于
This patch adds support to wcd934x gpio block found in WCD9340/WC9341 Audio codecs. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200107130844.20763-3-srinivas.kandagatla@linaro.orgSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kevin Hao 提交于
The main parts of this patch are from commit a7fc89f9 ("gpio: thunderx: Switch to GPIOLIB_IRQCHIP") and patch [1]. And also adjust thunderx_gpio_child_to_parent_hwirq() and add thunderx_gpio_populate_parent_alloc_info() to make sure that the correct hwirq are passed to the parent msi irqdomain. [1] https://patchwork.ozlabs.org/patch/1210180/Signed-off-by: NKevin Hao <haokexin@gmail.com> Link: https://lore.kernel.org/r/20200114082821.14015-5-haokexin@gmail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kevin Hao 提交于
This reverts commit a7fc89f9 because there are some bugs in this commit, and we don't have a simple way to fix these bugs. So revert this commit to make the thunderx gpio work on the stable kernel at least. We will switch to GPIOLIB_IRQCHIP for thunderx gpio by following patches. Fixes: a7fc89f9 ("gpio: thunderx: Switch to GPIOLIB_IRQCHIP") Signed-off-by: NKevin Hao <haokexin@gmail.com> Link: https://lore.kernel.org/r/20200114082821.14015-2-haokexin@gmail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 1月, 2020 1 次提交
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由 Dmitry Osipenko 提交于
Driver fails to compile in a minimized kernel's configuration because of the missing dependency on GPIOLIB_IRQCHIP. error: ‘struct gpio_chip’ has no member named ‘irq’ 44 | virq = irq_find_mapping(gpio->gpio_chip.irq.domain, offset); Signed-off-by: NDmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20200106015154.12040-1-digetx@gmail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 12月, 2019 1 次提交
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由 Thierry Reding 提交于
The driver is compatible with both Tegra186 and Tegra194, but currently it cannot be selected if only Tegra194 support is enabled. Allow builds with only Tegra194 support enabled to select this driver. While at it, select this driver by default on Tegra194 builds because it is an essential part of the system. Signed-off-by: NThierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191213130034.219227-1-thierry.reding@gmail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 12月, 2019 2 次提交
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由 Andy Shevchenko 提交于
Move Lynxpoint GPIO driver under Intel pin control umbrella for further transformation to a real pin control driver. Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
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由 Paul Kocialkowski 提交于
The LogiCVC display hardware block comes with GPIO capabilities that must be exposed separately from the main driver (as GPIOs) for use with regulators and panels. A syscon is used to share the same regmap across the two drivers. Add a minimalistic GPIO driver to drive these GPIOs, using a syscon regmap when available. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Link: https://lore.kernel.org/r/20191203141243.251058-5-paul.kocialkowski@bootlin.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 11月, 2019 1 次提交
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由 Jiaxun Yang 提交于
CPU_LOONGSON2 -> CPU_LOONGSON2EF CPU_LOONGSON3 -> CPU_LOONGSON64 As newer loongson-2 products (2G/2H/2K1000) can share kernel implementation with loongson-3 while 2E/2F are less similar with other LOONGSON64 products. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: NPaul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: chenhc@lemote.com Cc: paul.burton@mips.com
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- 29 10月, 2019 2 次提交
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由 Chris Packham 提交于
This driver supports the Chip Common A GPIO controller present on a number of Broadcom switch ASICs with integrated SoCs. The controller is similar to the pinctrl-nsp-gpio and pinctrl-iproc-gpio blocks but different enough that a separate driver is required. This has been ported from Broadcom's XLDK 5.0.3 retaining only the CCA support (pinctrl-iproc-gpio covers CCB). Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191024202703.8017-3-chris.packham@alliedtelesis.co.nzAcked-by: NScott Branden <scott.branden@broadcom.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Manivannan Sadhasivam 提交于
Add support for GPIO controller from RDA Micro. This GPIO controller is an in house IP, developed by RDA Micro (now Unisoc) for the use in RDA88* series of SoCs. There are multiple GPIO ports present in all SoCs, each capable of addressing 32 GPIOs. But only first 8 pins have the interrupt capability. Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20191021064413.19840-4-manivannan.sadhasivam@linaro.orgReviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 10月, 2019 1 次提交
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由 Jonathan Neuschäfer 提交于
Let's declutter Documentation/driver-api a bit. Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20191004164059.10397-1-j.neuschaefer@gmx.netSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 10月, 2019 1 次提交
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由 Thierry Reding 提交于
The GPIO controller doesn't have any controls to enable the system to wake up from low power states based on activity on GPIO pins. An extra hardware block that is part of the power management controller (PMC) contains these controls. In order for the GPIO controller to be able to cooperate with the PMC, obtain a reference to the PMC's IRQ domain and make it a parent to the GPIO controller's IRQ domain. This way the PMC gets an opportunity to program the additional registers required to enable wakeup sources on suspend. Based on additional work by Bitan Biswas <bbiswas@nvidia.com>. Signed-off-by: NThierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191002144502.156393-2-thierry.reding@gmail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 10月, 2019 1 次提交
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由 Linus Walleij 提交于
This renames the "gpio-aspeed" driver to conform with other GPIO drivers as "gpio-aspeed-sgpio.c". All GPIO drivers should start with the string "gpio-" no special exceptions. Also the Kconfig and Makefile entries should normally go with the driver but I missed this in my review, sorry for mistake. "CONFIG_GPIO_ASPEED_SGPIO" is used to activate this driver. Cc: Hongwei Zhang <hongweiz@ami.com> Fixes: 7db47faa ("gpio: aspeed: Add SGPIO driver") Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAndrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190927114833.12551-1-linus.walleij@linaro.org
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- 20 8月, 2019 1 次提交
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由 Uwe Kleine-König 提交于
config GPIO_MOCKUP is defined in a big if GPIOLIB ... endif block so it doesn't need to depend explicitly on GPIOLIB. Signed-off-by: NUwe Kleine-König <uwe@kleine-koenig.org> Link: https://lore.kernel.org/r/20190725131002.14597-1-uwe@kleine-koenig.orgSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 8月, 2019 1 次提交
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由 Arnd Bergmann 提交于
The driver uses hardwire MMIO addresses instead of the data that is passed in device tree. Change it over to only hardcode the register offset values and allow compile-testing. Link: https://lore.kernel.org/r/20190809144043.476786-6-arnd@arndb.deAcked-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Tested-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 15 8月, 2019 2 次提交
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由 Linus Walleij 提交于
Use the new infrastructure for hierarchical irqchips in gpiolib. The major part of the rewrite was dues to the fact that the driver was passing around a per-irq pointer to struct thunderx_line * data container, and the central handlers will assume struct gpio_chip * to be passed to we need to use the hwirq as index to look up the struct thunderx_line * for each IRQ. The pushing and pop:ing of the irqdomain was confusing because I've never seen this before, but I tried to replicate it as best I could. I have no chance to test or debug this so I need help. Cc: David Daney <david.daney@cavium.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190808123242.5359-4-linus.walleij@linaro.org
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由 Linus Walleij 提交于
This modifies the IXP4xx driver to use the new helpers to handle the remapping of parent to child hardware irqs in the gpiolib core. This pulls the majority of the code out of the driver and use the generic code in gpiolib. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Sowjanya Komatineni <skomatineni@nvidia.com> Cc: Bitan Biswas <bbiswas@nvidia.com> Cc: linux-tegra@vger.kernel.org Cc: Thierry Reding <treding@nvidia.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190808123242.5359-2-linus.walleij@linaro.org
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- 14 8月, 2019 2 次提交
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由 Arnd Bergmann 提交于
There are three families of IOP machines we support in Linux: iop32x (which includes EP80219), iop33x and iop13xx (aka IOP34x aka WP8134x). All products we support in the kernel are based on the first of these, iop32x, the other families only ever supported the Intel reference boards but no actual machine anyone could ever buy. While one could clearly make them all three work in a single kernel with some work, this takes the easy way out, removing the later two platforms entirely, under the assumption that there are no remaining users. Earlier versions of OpenWRT and Debian both had support for iop32x but not the others, and they both dropped iop32x as well in their 2015 releases. Link: https://lore.kernel.org/r/20190809163334.489360-1-arnd@arndb.deSigned-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C parts Acked-by: NDan Williams <dan.j.williams@intel.com> Acked-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Marek Behún 提交于
This adds support for interpreting the input and output bits of one device on Moxtet bus as GPIOs. This is needed for example by the SFP cage module of Turris Mox. Link: https://lore.kernel.org/r/20190812161118.21476-5-marek.behun@nic.czSigned-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 12 8月, 2019 1 次提交
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由 Arnd Bergmann 提交于
The driver uses hardwire MMIO addresses instead of the data that is passed in device tree. Change it over to only hardcode the register offset values and allow compile-testing. Acked-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Tested-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 15 7月, 2019 1 次提交
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由 Mauro Carvalho Chehab 提交于
There are lots of documents under Documentation/*.txt and a few other orphan documents elsehwere that belong to the driver-API book. Move them to their right place. Reviewed-by: Cornelia Huck <cohuck@redhat.com> # vfio-related parts Acked-by: Logan Gunthorpe <logang@deltatee.com> # switchtec Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
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- 04 7月, 2019 1 次提交
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由 Martin Blumenstingl 提交于
Enable compile-testing of the stp-xway GPIO driver now that it does not depend on any architecture specific includes anymore. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20190702223248.31934-5-martin.blumenstingl@googlemail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 6月, 2019 1 次提交
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由 Matti Vaittinen 提交于
ROHM BD70528 PMIC has 4 GPIO pins. Allow them to be controlled by GPIO framework. IRQs are handled by regmap-irq and GPIO driver is not aware of the irq usage. Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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