1. 29 9月, 2020 1 次提交
  2. 27 8月, 2020 1 次提交
    • S
      gpio: dwapb: Convert driver to using the GPIO-lib-based IRQ-chip · 0ea68393
      Serge Semin 提交于
      GPIO-lib provides a ready-to-use interface to initialize an IRQ-chip on
      top of a GPIO chip. It's better from maintainability and readability
      point of view to use one instead of supporting a hand-written Generic
      IRQ-chip-based implementation. Moreover the new implementation won't
      cause much functional overhead but will provide a cleaner driver code.
      All of that makes the DW APB GPIO driver conversion pretty much justified
      especially seeing a tendency of the other GPIO drivers getting converted
      too.
      
      Here is what we do in the framework of this commit to convert the driver
      to using the GPIO-lib-based IRQ-chip interface:
      
      1) IRQ ack, mask and unmask callbacks are locally defined instead of
      using the Generic IRQ-chip ones.
      
      2) An irq_chip structure instance is embedded into the dwapb_gpio
      private data. Note we can't have a static instance of that structure since
      GPIO-lib will add some hooks into it by calling gpiochip_set_irq_hooks().
      A warning about that would have been printed by the GPIO-lib code if we
      used a single irq_chip structure instance for multiple DW APB GPIO
      controllers.
      
      3) Initialize the gpio_irq_chip structure embedded into the gpio_chip
      descriptor. By default there is no IRQ enabled so any event raised will be
      handled by the handle_bad_irq() IRQ flow handler. If DW APB GPIO IP-core
      is synthesized to have non-shared reference IRQ-lines, then as before the
      hierarchical and cascaded cases are distinguished by checking how many
      parental IRQs are defined. (Note irq_set_chained_handler_and_data() won't
      initialize IRQs, which descriptors couldn't be found.) If DW APB GPIO IP
      is used on a platform with shared IRQ line, then we simply won't let the
      GPIO-lib to initialize the parental IRQs, but will handle them locally in
      the driver.
      
      4) Discard linear IRQ-domain and Generic IRQ-chip initialization, since
      GPIO-lib IRQ-chip interface will create a new domain and accept a standard
      IRQ-chip structure pointer based on the setting we provided in the
      gpio_irq_chip structure.
      
      5) Manually select a proper IRQ flow handler directly in the
      irq_set_type() callback by calling irq_set_handler_locked() method, since
      an ordinary (not Generic) irq_chip descriptor is now utilized. Note this
      shalln't give any regression
      
      6) Alter CONFIG_GPIO_DWAPB kernel config to select
      CONFIG_GPIOLIB_IRQCHIP instead of CONFIG_GENERIC_IRQ_CHIP.
      
      Note neither 4) nor 5) shall cause a regression of commit 6a2f4b7d
      ("gpio: dwapb: use a second irq chip"), since the later isn't properly
      used here anyway.
      Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
      Link: https://lore.kernel.org/r/20200730152808.2955-6-Sergey.Semin@baikalelectronics.ruSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
      0ea68393
  3. 16 7月, 2020 1 次提交
  4. 24 6月, 2020 1 次提交
  5. 14 6月, 2020 1 次提交
    • M
      treewide: replace '---help---' in Kconfig files with 'help' · a7f7f624
      Masahiro Yamada 提交于
      Since commit 84af7a61 ("checkpatch: kconfig: prefer 'help' over
      '---help---'"), the number of '---help---' has been gradually
      decreasing, but there are still more than 2400 instances.
      
      This commit finishes the conversion. While I touched the lines,
      I also fixed the indentation.
      
      There are a variety of indentation styles found.
      
        a) 4 spaces + '---help---'
        b) 7 spaces + '---help---'
        c) 8 spaces + '---help---'
        d) 1 space + 1 tab + '---help---'
        e) 1 tab + '---help---'    (correct indentation)
        f) 1 tab + 1 space + '---help---'
        g) 1 tab + 2 spaces + '---help---'
      
      In order to convert all of them to 1 tab + 'help', I ran the
      following commend:
      
        $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'
      Signed-off-by: NMasahiro Yamada <masahiroy@kernel.org>
      a7f7f624
  6. 03 6月, 2020 1 次提交
  7. 25 5月, 2020 2 次提交
  8. 18 5月, 2020 3 次提交
  9. 14 4月, 2020 1 次提交
  10. 25 3月, 2020 2 次提交
  11. 09 3月, 2020 1 次提交
  12. 24 1月, 2020 1 次提交
    • M
      gpio: bd71828: Initial support for ROHM BD71828 PMIC GPIOs · c31f625d
      Matti Vaittinen 提交于
      ROHM BD71828 PMIC contains 4 pins which can be configured by OTP
      to be used for general purposes. First 3 can be used as outputs
      and 4.th pin can be used as input. Allow them to be controlled
      via GPIO framework.
      
      The driver assumes all of the pins are configured as GPIOs and
      trusts that the reserved pins in other OTP configurations are
      excluded from control using "gpio-reserved-ranges" device tree
      property (or left untouched by GPIO users).
      
      Typical use for 4.th pin (input) is to use it as HALL sensor
      input so that this pin state is toggled when HALL sensor detects
      LID position change (from close to open or open to close). PMIC
      HW implements some extra logic which allows PMIC to power-up the
      system when this pin is toggled. Please see the data sheet for
      details of GPIO options which can be selected by OTP settings.
      Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
      Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NLee Jones <lee.jones@linaro.org>
      c31f625d
  13. 21 1月, 2020 1 次提交
  14. 15 1月, 2020 3 次提交
  15. 07 1月, 2020 1 次提交
  16. 16 12月, 2019 1 次提交
  17. 13 12月, 2019 2 次提交
  18. 01 11月, 2019 1 次提交
  19. 29 10月, 2019 2 次提交
  20. 09 10月, 2019 1 次提交
  21. 05 10月, 2019 1 次提交
  22. 01 10月, 2019 1 次提交
  23. 20 8月, 2019 1 次提交
  24. 16 8月, 2019 1 次提交
  25. 15 8月, 2019 2 次提交
    • L
      gpio: thunderx: Switch to GPIOLIB_IRQCHIP · a7fc89f9
      Linus Walleij 提交于
      Use the new infrastructure for hierarchical irqchips in
      gpiolib.
      
      The major part of the rewrite was dues to the fact that
      the driver was passing around a per-irq pointer to
      struct thunderx_line * data container, and the central
      handlers will assume struct gpio_chip * to be passed
      to we need to use the hwirq as index to look up the
      struct thunderx_line * for each IRQ.
      
      The pushing and pop:ing of the irqdomain was confusing
      because I've never seen this before, but I tried to
      replicate it as best I could.
      
      I have no chance to test or debug this so I need
      help.
      
      Cc: David Daney <david.daney@cavium.com>
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Brian Masney <masneyb@onstation.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Link: https://lore.kernel.org/r/20190808123242.5359-4-linus.walleij@linaro.org
      a7fc89f9
    • L
      gpio: ixp4xx: Convert to hierarchical GPIOLIB_IRQCHIP · aa7d618a
      Linus Walleij 提交于
      This modifies the IXP4xx driver to use the new helpers
      to handle the remapping of parent to child hardware irqs
      in the gpiolib core.
      
      This pulls the majority of the code out of the driver
      and use the generic code in gpiolib.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Lina Iyer <ilina@codeaurora.org>
      Cc: Jon Hunter <jonathanh@nvidia.com>
      Cc: Sowjanya Komatineni <skomatineni@nvidia.com>
      Cc: Bitan Biswas <bbiswas@nvidia.com>
      Cc: linux-tegra@vger.kernel.org
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Brian Masney <masneyb@onstation.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Link: https://lore.kernel.org/r/20190808123242.5359-2-linus.walleij@linaro.org
      aa7d618a
  26. 14 8月, 2019 2 次提交
  27. 12 8月, 2019 1 次提交
  28. 15 7月, 2019 1 次提交
  29. 04 7月, 2019 1 次提交
  30. 27 6月, 2019 1 次提交