1. 17 6月, 2011 1 次提交
    • T
      clocksource: Make watchdog robust vs. interruption · b5199515
      Thomas Gleixner 提交于
      The clocksource watchdog code is interruptible and it has been
      observed that this can trigger false positives which disable the TSC.
      
      The reason is that an interrupt storm or a long running interrupt
      handler between the read of the watchdog source and the read of the
      TSC brings the two far enough apart that the delta is larger than the
      unstable treshold. Move both reads into a short interrupt disabled
      region to avoid that.
      Reported-and-tested-by: NVernon Mauery <vernux@us.ibm.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: stable@kernel.org
      b5199515
  2. 14 6月, 2011 10 次提交
  3. 13 6月, 2011 6 次提交
  4. 12 6月, 2011 15 次提交
  5. 11 6月, 2011 8 次提交