This patch moves the platform data definition from
arch/arm/plat-pxa/include/plat/i2c.h to include/linux/i2c/pxa-i2c.h so
it can be accessed from x86 the same way as on ARM.

This change should make no functional change to the PXA code. The move
is verified by building the following defconfigs:
  cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig
  imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig
  raumfeld_defconfig magician_defconfig mmp2_defconfig pxa168_defconfig
  pxa910_defconfig
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This uncouple PHYS_OFFSET from the platform definitions, thereby
facilitating run-time computation of the physical memory offset.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NWan ZongShun <mcuos.com@gmail.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Acked-by: NJiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Drive strength for PXA910 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers.  (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).

Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register.  8 does not work.
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Drive strength for MMP2 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers.  (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).

Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register.  8 does not work.
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Tested-by: NJohn Watlington <wad@laptop.org>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>

Convert mmp to use the new sched_clock() infrastructure for extending
32bit counters to full 64-bit nanoseconds.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

ftrace requires sched_clock() to be notrace.  Ensure that all
implementations are so marked.  Also make sure that they include
linux/sched.h

Also ensure OMAP clocksource read functions are marked notrace as
they're used for sched_clock() too.
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NWill Deacon <will.deacon@arm.com>
Tested-by: NMikael Pettersson <mikpe@it.uu.se>
Tested-by: NEric Miao <eric.y.miao@gmail.com>
Tested-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

In d7e81c26 (clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants.  Switch over to using this new interface.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2
configuration.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NChao Xie <chao.xie@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

RTC clock will remain at 32KHz and powered on, there is no need for it
at this moment.
Signed-off-by: NJason Chagas <jason.chagas@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.

as the code is identical at 99%

put the arch specific code for allocation as example in asm/clkdev.h
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix typo error on cpu_is_mmp2(). Correct cpu_readid_id() to
read_cpuid_id().  Append missing parenthesis.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>

Correct the cpuid of pxa168 and pxa910.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Defined I2C/ALARM pin definitions
DS1337 RTC alarm support is tied to RTC_INT_GPIO
Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Acked-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Support for Matrix keypad ESC, ENTER, LEFT, and RIGHT
Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Added board defintion, header, and debug UART support.
Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Add sparse IRQ support in ARCH_MMP.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Reset vector for pxa168 is 0xffff_0000 not 0x0. This fix allows
reboot to work
Signed-off-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Support regulator MAX8649, PMIC MAX8925 into the Jasper.
Backlight & power supply components of MAX8925 are enabled in Jasper.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Sync twsi index to register index. It's used to avoid typo error.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>