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  1. 29 7月, 2021 8 次提交
    • V
      net: bridge: switchdev: replay the entire FDB for each port · b4454bc6
      由 Vladimir Oltean 提交于 
      Currently when a switchdev port joins a bridge, we replay all FDB
entries pointing towards that port or towards the bridge.

However, this is insufficient in certain situations:

(a) DSA, through its assisted_learning_on_cpu_port logic, snoops
    dynamically learned FDB entries on foreign interfaces.
    These are FDB entries that are pointing neither towards the newly
    joined switchdev port, nor towards the bridge. So these addresses
    would be missed when joining a bridge where a foreign interface has
    already learned some addresses, and they would also linger on if the
    DSA port leaves the bridge before the foreign interface forgets them.
    None of this happens if we replay the entire FDB when the port joins.

(b) There is a desire to treat local FDB entries on a port (i.e. the
    port's termination MAC address) identically to FDB entries pointing
    towards the bridge itself. More details on the reason behind this in
    the next patch. The point is that this cannot be done given the
    current structure of br_fdb_replay() in this situation:
      ip link set swp0 master br0  # br0 inherits its MAC address from swp0
      ip link set swp1 master br0
    What is desirable is that when swp1 joins the bridge, br_fdb_replay()
    also notifies swp1 of br0's MAC address, but this won't in fact
    happen because the MAC address of br0 does not have fdb->dst == NULL
    (it doesn't point towards the bridge), but it has fdb->dst == swp0.
    So our current logic makes it impossible for that address to be
    replayed. But if we dump the entire FDB instead of just the entries
    with fdb->dst == swp1 and fdb->dst == NULL, then the inherited MAC
    address of br0 will be replayed too, which is what we need.

A natural question arises: say there is an FDB entry to be replayed,
like a MAC address dynamically learned on a foreign interface that
belongs to a bridge where no switchdev port has joined yet. If 10
switchdev ports belonging to the same driver join this bridge, one by
one, won't every port get notified 10 times of the foreign FDB entry,
amounting to a total of 100 notifications for this FDB entry in the
switchdev driver?

Well, yes, but this is where the "void *ctx" argument for br_fdb_replay
is useful: every port of the switchdev driver is notified whenever any
other port requests an FDB replay, but because the replay was initiated
by a different port, its context is different from the initiating port's
context, so it ignores those replays.

So the foreign FDB entry will be installed only 10 times, once per port.
This is done so that the following 4 code paths are always well balanced:
(a) addition of foreign FDB entry is replayed when port joins bridge
(b) deletion of foreign FDB entry is replayed when port leaves bridge
(c) addition of foreign FDB entry is notified to all ports currently in bridge
(c) deletion of foreign FDB entry is notified to all ports currently in bridge
Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b4454bc6
    • D
      Merge branch 'bnxt_en-ptp' · 1159da64
      由 David S. Miller 提交于 
      Michael Chan says:

====================
bnxt_en: PTP enhancements

This series adds two PTP enhancements.  This first one is to register
the PHC during probe time and keep it registered whether it is in
ifup or ifdown state.  It will get unregistered and possibly
reregistered if the firmware PTP capability changes after firmware
reset.  The second one is to add the 1PPS (one pulse per second)
feature to support input/output of the 1PPS signal.
====================
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1159da64
    • P
      bnxt_en: Log if an invalid signal detected on TSIO pin · abf90ac2
      由 Pavan Chebbi 提交于 
      FW can report to driver via ASYNC event if it encountered an
invalid signal on any TSIO PIN. Driver will log this event
for the user to take corrective action.
Reviewed-by: NSomnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: NArvind Susarla <arvind.susarla@broadcom.com>
Reviewed-by: NEdwin Peer <edwin.peer@broadcom.com>
Signed-off-by: NPavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: NMichael Chan <michael.chan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      abf90ac2
    • P
      bnxt_en: Event handler for PPS events · 099fdeda
      由 Pavan Chebbi 提交于 
      Once the PPS pins are configured, the FW can report
PPS values using ASYNC event. This patch adds the
ASYNC event handler and subsequent reporting of the
events to kernel.
Signed-off-by: NPavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: NMichael Chan <michael.chan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      099fdeda
    • P
      bnxt_en: 1PPS functions to configure TSIO pins · 9e518f25
      由 Pavan Chebbi 提交于 
      Application will send ioctls to set/clear PPS pin functions
based on user input. This patch implements the driver
callbacks that will configure the TSIO pins using firmware
commands. After firmware reset, the TSIO pins will be reconfigured
again.
Reviewed-by: NEdwin Peer <edwin.peer@broadcom.com>
Signed-off-by: NPavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: NMichael Chan <michael.chan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9e518f25
    • P
      bnxt_en: 1PPS support for 5750X family chips · caf3eedb
      由 Pavan Chebbi 提交于 
      1PPS (One Pulse Per Second) is a signal generated either
by the NIC PHC or an external timing source.
Integrating the support to configure and use 1PPS using
the TSIO pins along with PTP timestamps will add Grand
Master capability to the 5750X family chipsets.

This patch initializes the driver data structures and
registers the 1PPS with kernel, based on the TSIO pins'
capability in the hardware. This will create a /dev/ppsX
device which applications can use to receive PPS events.

Later patches will define functions to configure and use
the pins.
Reviewed-by: NEdwin Peer <edwin.peer@broadcom.com>
Signed-off-by: NPavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: NMichael Chan <michael.chan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      caf3eedb
    • M
      bnxt_en: Do not read the PTP PHC during chip reset · 30e96f48
      由 Michael Chan 提交于 
      During error recovery or hot firmware upgrade, the chip may be under
reset and the PHC register read cycles may cause completion timeouts.
Check that the chip is not under reset condition before proceeding
to read the PHC by checking the flag BNXT_STATE_IN_FW_RESET.  We also
need to take the ptp_lock before we set this flag to prevent race
conditions.

We need this logic because the PHC now will stay registered after
bnxt_close().
Reviewed-by: NPavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: NMichael Chan <michael.chan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      30e96f48
    • M
      bnxt_en: Move bnxt_ptp_init() from bnxt_open() back to bnxt_init_one() · a521c8a0
      由 Michael Chan 提交于 
      It was pointed out by Richard Cochran that registering the PHC during
probe is better than during ifup, so move bnxt_ptp_init() back to
bnxt_init_one().  In order to work correctly after firmware reset which
may result in PTP config. changes, we modify bnxt_ptp_init() to return
if the PHC has been registered earlier.  If PTP is no longer supported
by the new firmware, we will unregister the PHC and clean up.

This partially reverts:

d7859afb ("bnxt_en: Move bnxt_ptp_init() to bnxt_open()")
Reviewed-by: NPavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: NMichael Chan <michael.chan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a521c8a0
  3. 28 7月, 2021 32 次提交