1. 04 9月, 2009 1 次提交
    • P
      OMAP2/3 board-*.c files: read bootloader configuration earlier · b3c6df3a
      Paul Walmsley 提交于
      Most board-*.c files read configuration data from the bootloader in
      their .init_machine() function.  This needs to happen earlier, at some
      point before omap2_init_common_hw() is called.  This is because a
      future patch will use the bootloader serial console port information
      to enable the UART clocks earlier, immediately after omap2_clk_init().
      This is in turn necessary since otherwise clock tree usecounts on
      clocks like dpll4_m2x2_ck will be bogus, which can cause the
      currently-active console UART clock to be disabled during boot.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      b3c6df3a
  2. 29 8月, 2009 1 次提交
  3. 25 7月, 2009 1 次提交
    • J
      OMAP3 SDRC: add support for 2 SDRAM chip selects · 58cda884
      Jean Pihet 提交于
      Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2
      SDRAM parts connected to the SDRC.
      
      This patch adds the following:
      - add a new argument of type omap_sdrc_params struct*
      to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params
      - adapted the OMAP boards files to the new prototype of
      omap2_init_common_hw
      - add the SDRC 2nd CS registers offsets defines
      - adapt the sram sleep code to configure the SDRC for the 2nd CS
      
      Note: If the 2nd param to omap2_init_common_hw is NULL, then the
      parameters are not programmed into the SDRC CS1 registers
      
      Tested on 3430 SDP and Beagleboard rev C2 and B5, with
      suspend/resume and frequency changes (cpufreq).
      Signed-off-by: NJean Pihet <jpihet@mvista.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      58cda884
  4. 29 5月, 2009 2 次提交
  5. 03 4月, 2009 1 次提交
  6. 25 3月, 2009 1 次提交
  7. 24 3月, 2009 2 次提交
  8. 03 3月, 2009 1 次提交
  9. 09 2月, 2009 1 次提交
    • P
      [ARM] OMAP2 SDRC: add SDRAM timing parameter infrastructure · 87246b75
      Paul Walmsley 提交于
      For a given SDRAM clock rate, SDRAM chips require memory controllers
      to use a specific set of timing minimums and maximums to transfer data
      reliably.  These parameters can be different for different memory chips
      and can also potentially vary by board.
      
      This patch adds the infrastructure for board-*.c files to pass this
      timing data to the SDRAM controller init function.  The timing data is
      specified in an 'omap_sdrc_params' structure, in terms of SDRC
      controller register values.  An array of these structs, one per SDRC
      target clock rate, is passed by the board-*.c file to
      omap2_init_common_hw().
      
      This patch does not define the values for different memory chips, nor
      does it use the values for anything; those will come in subsequent patches.
      
      linux-omap source commit is bc84ecfc795c2d1c5cda8da4127cf972f488a696.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      87246b75
  10. 15 1月, 2009 1 次提交
  11. 11 12月, 2008 2 次提交
  12. 10 10月, 2008 1 次提交