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  1. 27 5月, 2014 2 次提交
    • A
      ARM: vexpress: refine dependencies for new code · b33cdd28
      由 Arnd Bergmann 提交于 
      The versatile express changes for 3.16 introduced a number of
build regressions for randconfig kernels by not tracking dependencies
between the components right.

This patch tries to rectify that:

* the mach-vexpress code cannot link without the syscfg driver,
  which in turn needs MFD_VEXPRESS_SYSREG
* various drivers call devm_regmap_init_vexpress_config(), which
  has to be exported so it can be used by loadable modules
* the configuration bus uses OF DT helper functions that are not
  available to platforms disable CONFIG_OF
* The sysreg driver exports GPIOs through gpiolib, which can
  be disabled on some platforms.
* The clocksource code cannot be built on platforms that don't
  use modern timekeeping but rely on gettimeoffset.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      b33cdd28
    • H
      clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata · 5a3babfc
      由 Heiko Stübner 提交于 
      The originally used PNAME macro from the core samsung clock infrastructure
declares the created array as initdata, creating section mismatch warnings
in the dclk driver.

Thus declare them directly, removing these warning.
Reported-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>
      5a3babfc
  3. 16 5月, 2014 7 次提交
    • P
      ARM: vexpress: move HBI check to sysreg driver · 6b2c31c7
      由 Pawel Moll 提交于 
      The last reason for static memory mapping is the HBI (board
identification number) check early in the machine code.

Moving the check to the sysreg driver makes it possible to
completely remove the early mapping and init functions.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
      6b2c31c7
    • P
      clocksource: Sched clock source for Versatile Express · 220e2a8d
      由 Pawel Moll 提交于 
      This patch adds a trival sched clock source using free
running, 24MHz clocked counter present in the ARM Ltd.
reference platforms (Versatile, RealView, Versatile
Express) System Registers block.

This code replaces the call in the VE machine code.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      220e2a8d
    • P
      clk: versatile: Split config options for sp810 and vexpress_osc · 5ee2b877
      由 Pawel Moll 提交于 
      Move the Kconfig entry for Versatile (& Express) clock drivers
into a separate file and add individual options for sp810
and vexpress_osc drivers, as they are optional in some
configurations and may have separate dependencies.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
      5ee2b877
    • P
      mfd: vexpress: Define the device as MFD cells · 974cc7b9
      由 Pawel Moll 提交于 
      This patch - finally, after over 6 months! :-( - addresses
Samuel's request to split the vexpress-sysreg driver into
smaller portions and define the device in a form of MFD
cells:

* LEDs code has been completely removed and replaced with
  "gpio-leds" nodes in the tree (referencing dedicated
  GPIO subnodes in sysreg - bindings documentation updated);
  this also better fits the reality as some variants of the
  motherboard don't have all the LEDs populated

* syscfg bridge code has been extracted into a separate
  driver (placed in drivers/misc for no better place)

* all the ID & MISC registers are defined as sysconf
  making them available for other drivers should they need
  to use them (and also to the user via /sys/kernel/debug/regmap
  which can be helpful in platform debugging)
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
      974cc7b9
    • P
      mfd: syscon: Add platform data with a regmap config name · 29f9b6cf
      由 Pawel Moll 提交于 
      Define syscon platform data structure that can be used
to define a regmap config name. This is particularly useful
in the regmap debugfs when there is more than one syscon
device registered, to distinguish the register blocks.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
      29f9b6cf
    • P
      mfd: vexpress: Convert custom func API to regmap · 3b9334ac
      由 Pawel Moll 提交于 
      Components of the Versatile Express platform (configuration
microcontrollers on motherboard and daughterboards in particular)
talk to each other over a custom configuration bus. They
provide miscellaneous functions (from clock generator control
to energy sensors) which are represented as platform devices
(and Device Tree nodes). The transactions on the bus can
be generated by different "bridges" in the system, some
of which are universal for the whole platform (for the price
of high transfer latencies), others restricted to a subsystem
(but much faster).

Until now drivers for such functions were using custom "func"
API, which is being replaced in this patch by regmap calls.
This required:

* a rework (and move to drivers/bus directory, as suggested
  by Samuel and Arnd) of the config bus core, which is much
  simpler now and uses device model infrastructure (class)
  to keep track of the bridges; non-DT case (soon to be
  retired anyway) is simply covered by a special device
  registration function

* the new config-bus driver also takes over device population,
  so there is no need for special matching table for
  of_platform_populate nor "simple-bus" hack in the arm64
  model dtsi file (relevant bindings documentation has
  been updated); this allows all the vexpress devices
  fit into normal device model, making it possible
  to remove plenty of early inits and other hacks in
  the near future

* adaptation of the syscfg bridge implementation in the
  sysreg driver, again making it much simpler; there is
  a special case of the "energy" function spanning two
  registers, where they should be both defined in the tree
  now, but backward compatibility is maintained in the code

* modification of the relevant drivers:

  * hwmon - just a straight-forward API change
  * power/reset driver - API change
  * regulator - API change plus error handling
    simplification
  * osc clock driver - this one required larger rework
    in order to turn in into a standard platform driver
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NMark Brown <broonie@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NGuenter Roeck <linux@roeck-us.net>
Acked-by: NMike Turquette <mturquette@linaro.org>
      3b9334ac
    • P
      of: Keep track of populated platform devices · c6e126de
      由 Pawel Moll 提交于 
      In "Device Tree powered" systems, platform devices are usually massively
populated with of_platform_populate() call, executed at some level of
initcalls, either by generic architecture or by platform-specific code.

There are situations though where certain devices must be created (and
bound with drivers) before all the others. This presents a challenge,
as devices created explicitly would be created again by
of_platform_populate().

This patch tries to solve that issue in a generic way, adding a
"populated" flag for a DT node description. Subsequent
of_platform_populate() will skip such nodes (and its children) in
a similar way to the non-available ones.

This patch also adds of_platform_depopulate() as an operation
complementary to the _populate() one. It removes a platform or an amba
device populated from the Device Tree, together with its all children
(leaving, however, devices without associated of_node untouched)
clearing the "populated" flag on the way.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Acked-by: NGrant Likely <grant.likely@linaro.org>
      c6e126de
  5. 13 5月, 2014 1 次提交
    • H
      clk: samsung: add clock controller driver for s3c2410, s3c2440 and s3c2442 · 3f7c01ad
      由 Heiko Stuebner 提交于 
      This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.

The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.

As pll-rate-tables only the 12mhz variants are currently included.
The original code was wrongly checking for 169mhz xti values [a 0 to much
at the end], so the original 16mhz pll table would have never been
included and its values are so obscure that I have no possibility to
at least check their sane-ness. When using the formula from the manual
the resulting frequency is near the table value but still slightly off.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      3f7c01ad
  7. 12 5月, 2014 3 次提交
    • Z
      clocksource:sirf: remove the hardcode for the clk of timers · c7cff54d
      由 Zhiwu Song 提交于 
      Nobody want to know the connection between io clk and timer clk,
so exposing this information to timer module is not reasonable.
this patch moves to define the timers' clk in dt.
Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      c7cff54d
    • B
      irqchip: sirf: fix one minor checkpatch issue · 7caf6852
      由 Bin Shi 提交于 
      fix "line line over 80 characters" for the below:
static int __init sirfsoc_irq_init(struct device_node *np, struct device_node *parent)

the users of the codes - key customers really care about that.
Signed-off-by: NBin Shi <Bin.Shi@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      7caf6852
    • B
      clocksource: prima2: fix some minor checkpatch issues · 4c1ad709
      由 Bin Shi 提交于 
      Fix the "line over 80 characters". users of the codes - key customers
really care about that.

WARNING: line over 80 characters
64: FILE: timer-prima2.c:64:
+       WARN_ON(!(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_STATUS) & BIT(0)));

WARNING: line over 80 characters
80: FILE: timer-prima2.c:80:
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);

WARNING: line over 80 characters
82: FILE: timer-prima2.c:82:
+       cycles = (cycles << 32) | readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);

WARNING: line over 80 characters
92: FILE: timer-prima2.c:92:
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);

WARNING: line over 80 characters
96: FILE: timer-prima2.c:96:
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);

WARNING: line over 80 characters
111: FILE: timer-prima2.c:111:
+               writel_relaxed(val | BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);

WARNING: line over 80 characters
114: FILE: timer-prima2.c:114:
+               writel_relaxed(val & ~BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);

WARNING: line over 80 characters
126: FILE: timer-prima2.c:126:
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);

WARNING: line over 80 characters
129: FILE: timer-prima2.c:129:
+               sirfsoc_timer_reg_val[i] = readl_relaxed(sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);

WARNING: line over 80 characters
137: FILE: timer-prima2.c:137:
+               writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);

WARNING: line over 80 characters
139: FILE: timer-prima2.c:139:
+       writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);

WARNING: line over 80 characters
140: FILE: timer-prima2.c:140:
+       writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);

WARNING: line over 80 characters
216: FILE: timer-prima2.c:216:
+CLOCKSOURCE_OF_DECLARE(sirfsoc_prima2_timer, "sirf,prima2-tick", sirfsoc_prima2_timer_init);

total: 0 errors, 13 warnings, 216 lines checked

timer-prima2.c has style problems, please review.

If any of these errors are false positives, please report
them to the maintainer, see CHECKPATCH in MAINTAINERS.
Signed-off-by: NBin Shi <Bin.Shi@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
      4c1ad709
  9. 11 5月, 2014 1 次提交
  11. 09 5月, 2014 2 次提交
  13. 08 5月, 2014 1 次提交
  15. 07 5月, 2014 2 次提交
  17. 06 5月, 2014 21 次提交