- 10 1月, 2016 5 次提交
-
-
由 Suravee Suthikulpanit 提交于
The current driver uses input clock source frequency to calculate values for [SS|FS]_[HC|LC] registers. However, when booting ACPI, we do not currently have a good way to provide the frequency information. Instead, we can leverage the SSCN and FFCN ACPI methods, which can be used to directly provide these values. So, the clock information should no longer be required during probing. However, since clk can be invalid, additional checks must be done where we are making use of it. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NSuravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: NLoc Ho <lho@apm.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Akshay Bhat 提交于
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
RuntimePM of the adapter device is now taken care of by the core. So, we can remove these calls. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
The adapter device is a logical device. Because of that, it already uses pm_runtime_no_callbacks() in the core. To ensure proper propagation from the children (i2c devices) to the parent of the adapter (the HW device), make sure RuntimePM is enabled in any case. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Baruch Siach 提交于
Set the i2c_adapter retries field to a sensible value. This allows the i2c core to retry master_xfer() when it returns -EAGAIN. Currently the i2c-designware driver returns -EAGAIN only on Tx arbitration failure (DW_IC_TX_ARB_LOST). Reported-by: Rolland Chau <zourongrong@gmail.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 05 1月, 2016 3 次提交
-
-
由 Stephen Rothwell 提交于
Fixes: e1dba01c ("i2c: add generic routine to parse DT for timing information") Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Suravee Suthikulpanit 提交于
Add device HID AMDI0510 to match the I2C controlers on AMD Seattle platform Signed-off-by: NSuravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Fabio Estevam 提交于
These multi-lines comments do not follow the standard kernel coding style. In fact, they are not useful comments, so get rid of them. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 04 1月, 2016 8 次提交
-
-
由 Geliang Tang 提交于
Use to_platform_device() instead of open-coding it. Signed-off-by: NGeliang Tang <geliangtang@163.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Geliang Tang 提交于
Use to_pci_dev() instead of open-coding it. Signed-off-by: NGeliang Tang <geliangtang@163.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Kamal Dasu 提交于
Broadcoms DSL, CM (cable modem)and STB I2C core implementation have 8 data in/out registers that can transfer 8 bytes or 32 bytes max. Cable and DSL "Peripheral" i2c cores use single byte per data register and the STB can use 4 byte per data register transfer. Adding support to take care of this difference. Accordingly added the compatible string for SoCs using the "Peripheral" I2C block. Signed-off-by: NKamal Dasu <kdasu.kdev@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Liguo Zhang 提交于
For mt8173 platform with auto restart support, when doing i2c multi transfer in high speed, we should ignore the first restart irq after the master code, otherwise the first transfer will be discarded. Signed-off-by: NLiguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: NEddie Huang <eddie.huang@mediatek.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Gao Pan 提交于
Replace of_get_named_gpio_flags with of_get_named_gpio because the latter has less parameters, which improves code readability. Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NGao Pan <b54642@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Fabio Estevam 提交于
When DMA cannot be used, it is better to state that the I2C controller will operate in PIO mode. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Gao Pan 提交于
In our former i2c driver, i2c clk is enabled and disabled in xfer function, which contributes to power saving. However, the clk enable process brings a busy wait delay until the core is stable. As a result, the performance is sacrificed. To weigh the power consumption and i2c bus performance, runtime pm is the good solution for it. The clk is enabled when a i2c transfer starts, and disabled after a specifically defined delay. If CONFIG_PM is disabled the net result of this patch is that the clock is never disabled. Without the patch the test case (many eeprom reads) executes with approx: real 1m7.735s user 0m0.488s sys 0m20.040s With the patch the same test case (many eeprom reads) executes with approx: real 0m54.241s user 0m0.440s sys 0m5.920s Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NGao Pan <b54642@freescale.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> [wsa: sorted includes] Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Gao Pan 提交于
During driver probe, i2c_imx_init_recovery_info() must come before i2c_add_numbered_adapter(), because the get/set_scl() functions are assigned in i2c_register_adapter() under the conditon that bus recover_info are initialized. Otherwise, get/set_scl() function pointers never get assigned. In such case, when i2c_generic_gpio_recovery() is used for bus recovery, there will be kernel crash because bri->set_scl is NULL. The solution to this bug is moving i2c_imx_init_recovery_info() before i2c_register_adapter(). Signed-off-by: NGao Pan <b54642@freescale.com> Signed-off-by: NFugang Duan <B38611@freescale.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
-
- 03 1月, 2016 8 次提交
-
-
由 Wolfram Sang 提交于
In multi master mode, the IP core needs to be always active for arbitration reasons. Get the config from DT and set up PM depending on the config. Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
These macros don't really hide complexity, but C idioms. Removing them makes the code easier to read IMO and make a planned extension easier. Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
We need this binding because some I2C master drivers will need to adapt their PM settings for the arbitration circuitry. Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Sifan Naeem 提交于
In version 3.3 of the IP when transaction halt is set, an interrupt will be generated after each byte of a transfer instead of after every transfer but before the stop bit. Due to this behaviour we have to be careful that every time we release the transaction halt we have to re-enable it straight away so that we only process a single byte, not doing so will result in all remaining bytes been processed and a stop bit being issued, which will prevent us having a repeated start. This change will have no effect on earlier versions of the IP. Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Reviewed-by: NJames Hartley <james.hartley@imgtec.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Sifan Naeem 提交于
Master halt is issued after each byte of a transaction is processed in IP version 3.3. Master halt will stall the bus by holding the SCK line low until the halt bit in the scb_general_control is cleared. After the last byte of a transfer is processed we can use the Master Halt interrupt to facilitate a repeated start transfer without issuing a stop bit. Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com> Reviewed-by: NJames Hartley <james.hartley@imgtec.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Sifan Naeem 提交于
Stop Detected interrupt is triggered when a Stop bit is detected on the bus, which indicates the end of the current transfer. When the end of a transfer is indicated by the Stop Detected interrupt, drain the FIFO and signal completion for the transaction. Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Sifan Naeem 提交于
Now that we are using the transaction halt interrupt to safely control repeated start transfers, we no longer need to handle the fifo emptying interrupts. Handling this interrupt along with Transaction Halt interrupt can cause erratic behaviour. Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Sifan Naeem 提交于
This commit adds support for the I2C_M_IGNORE_NAK protocol modification. Such behaviour can only be implemented in atomic mode. So, if a transaction contains a message with such flag the drivers switches to atomic mode. The implementation consists simply in treating NAKs as ACKs. Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Reviewed-by: NJames Hartley <james.hartley@imgtec.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 18 12月, 2015 2 次提交
-
-
由 Wolfram Sang 提交于
This function used to be DT only, so it lived inside a CONFIG_OF block. Now it uses device attributes and must be moved outside of it. No further code changes, only one whitespace improvement. Reported-by: NJim Davis <jim.epost@gmail.com> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
Until we have proper support to make I2C slave support fully optional, select it to prevent build errors on randconfigs. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 16 12月, 2015 2 次提交
-
-
由 Måns Rullgård 提交于
The Sigma Designs variant of this controller has the ability to generate interrupts. This is controlled using two additional registers, oddly enough overlapping with the defined but unused HDSTATIM. This patch adds support for using this feature instead of busy-looping if an IRQ is specified. Signed-off-by: NMans Rullgard <mans@mansr.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Måns Rullgård 提交于
The BYTECNT register holds the transfer size minus one. Setting it to the correct value removes the need for a dummy read/write at the end of each transfer. As zero-length transfers are not supported, do not advertise I2C_FUNC_SMBUS_QUICK. In other words, this patch makes the driver transfer the number of bytes requested unless this is zero, which is not supported by the hardware and is thus refused. Signed-off-by: NMans Rullgard <mans@mansr.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 15 12月, 2015 1 次提交
-
-
由 Måns Rullgård 提交于
Sigma Designs chips use a variant of this controller with the following differences: - The BUSY bit in the STATUS register is inverted - Bit 8 of the CONFIG register must be set - The controller can generate interrupts This patch adds support for the first two of these. It also calculates and sets the correct clock divisor if a clk is provided. The bus frequency is optionally speficied in the device tree node. Signed-off-by: NMans Rullgard <mans@mansr.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 14 12月, 2015 9 次提交
-
-
由 Masahiro Yamada 提交于
There is code to divide by "bus_speed" some lines below. To eliminate the possibility of division by zero, bail out if "clock-frequency" is specified as zero. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Masahiro Yamada 提交于
This input clock is used to generate the sampling clock for I2C bus. If the clock rate is zero, there is something wrong with the clock driver. Bail out with the appropriate error message in such a case. It would make it easier to find the root cause of failure. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Masahiro Yamada 提交于
There is code to divide by "bus_speed" some lines below. To eliminate the possibility of division by zero, bail out if "clock-frequency" is specified as zero. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Masahiro Yamada 提交于
This input clock is used to generate the sampling clock for I2C bus. If the clock rate is zero, there is something wrong with the clock driver. Bail out with the appropriate error message in such a case. It would make it easier to find the root cause of failure. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
Switch to the new generic functions. Plain convert, no functionality added yet. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
The probe function is a little bit messy, something here, something there. Rework it so that there is some order: first init the private structure, then the adapter, then do HW init. This also allows us to remove the device argument of the clock calculation function, because it now can be deduced from the private structure. Also, shorten some lines where possible. This is a preparation for further refactoring. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
Inspired from the i2c-rk3x driver (thanks guys!) but refactored and extended. See built-in docs for further information. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
由 Wolfram Sang 提交于
Also, sort the properties alphabetically and make indentation consistent. Wording largely taken from i2c-rk3x.txt, thanks guys! Only "i2c-scl-internal-delay-ns" is new, the rest is used by two drivers already and was documented in their driver binding documentation. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 06 12月, 2015 1 次提交
-
-
由 Niklas Söderlund 提交于
Add I2C slave provider using the generic slave interface. Signed-off-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 04 12月, 2015 1 次提交
-
-
由 Paul Burton 提交于
Allow the eg20t I2C driver to be built for MIPS platforms, in preparation for use on the MIPS Boston board. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-