- 09 2月, 2019 1 次提交
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由 Jerome Brunet 提交于
Enable the g12a clock controller for ARCH_MESON Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 07 2月, 2019 1 次提交
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由 Jerome Brunet 提交于
Selecting COMMON_CLK_AMLOGIC is not required as it is already selected by the SoC clock controller driver Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 16 12月, 2018 1 次提交
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由 Lucas Stach 提交于
Add basic Kconfig symbols to make the MXC architecture available in the ARM64 world. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 16 11月, 2018 1 次提交
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由 Geert Uytterhoeven 提交于
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for Renesas SoCs, while other vendors have only a single Kconfig symbol. Increase consistency with other vendors by moving the SoC-specific Kconfig symbols to drivers/soc/renesas/Kconfig. Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by introducing a family-specific Kconfig symbol for R-Car Gen3 (ARCH_RCAR_GEN3), which enables family-specific hardware features. While so far only a single family (R-Car Gen3 and derivatives) of Renesas arm64 SoCs is supported by Linux, this will make it easier to add support for other SoC families later. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 15 11月, 2018 1 次提交
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由 Takeshi Kihara 提交于
The R-Car GPIO driver cannot be enabled when Renesas SoC's ARCH configs (ARCH_RENESAS, ARCH_R8A7795, ARCH_R8A7796 and ARCH_R8A77965) are enabled only. As GPIOs are a critical resource for proper operation on Renesas platforms, this patch selects GPIOLIB, just like is done for other SoC vendors, and on Renesas arm32 SoCs. Reported-by: NAlexandru Gheorghe <Alexandru_Gheorghe@mentor.com> Signed-off-by: NTakeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Improve patch description] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 11 10月, 2018 1 次提交
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由 Marek Szyprowski 提交于
Generic power domains are needed to enable support for Exynos power domains. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 02 10月, 2018 1 次提交
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由 Miquel Raynal 提交于
Enable the newly introduced Marvell SEI driver for the 64-bit Marvell EBU platforms. Suggested-by: NHaim Boot <hayim@marvell.com> Reviewed-by: NGregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 01 10月, 2018 1 次提交
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由 Manivannan Sadhasivam 提交于
Select PINCTRL for Actions Semi SoCs. Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 26 9月, 2018 1 次提交
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由 Rajan Vaja 提交于
This patch is adding communication layer with firmware. Firmware driver provides an interface to firmware APIs. Interface APIs can be used by any driver to communicate to PMUFW(Platform Management Unit). All requests go through ATF. Signed-off-by: NRajan Vaja <rajanv@xilinx.com> Signed-off-by: NJolly Shah <jollys@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 11 9月, 2018 2 次提交
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由 Fabrizio Castro 提交于
Add configuration option for the RZ/G2E (R8A774C0) SoC. Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: NBiju Das <biju.das@bp.renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Biju Das 提交于
Add configuration option for the RZ/G2M (R8A774A1) SoC. Signed-off-by: NBiju Das <biju.das@bp.renesas.com> Reviewed-by: NChris Paterson <chris.paterson2@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 9月, 2018 1 次提交
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由 Sergei Shtylyov 提交于
Renesas R-Car gen3 SoCs have both CMT and TMU timers, so we have to enable building them in Kconfig.platforms (as they don't normally have the prompts in Kconfig). Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 30 8月, 2018 1 次提交
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由 Geert Uytterhoeven 提交于
The Kconfig symbol for Renesas 64-bit ARM SoCs has always been ARCH_RENESAS, with ARCH_SHMOBILE being selected to reuse drivers shared with Renesas 32-bit ARM and/or Renesas SuperH SH-Mobile SoCs. Commit 9b5ba0df ("ARM: shmobile: Introduce ARCH_RENESAS") started the conversion from ARCH_SHMOBILE to ARCH_RENESAS for Renesas 32-bit SoCs. Now all drivers for Renesas ARM SoCs have gained proper ARCH_RENESAS platform dependencies, there is no longer a need to select ARCH_SHMOBILE. With ARCH_SHMOBILE gone, move the ARCH_RENESAS section up, to restore alphabetical sort order. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 24 8月, 2018 1 次提交
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由 Marc Zyngier 提交于
A number of the Rockchip-specific drivers (IOMMU, display controllers) are now assuming that CONFIG_PM is set, and may completely misbehave if that's not the case. Since there is hardly any reason for this configuration option not to be selected anyway, let's require it (in the same way Tegra already does). Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 01 8月, 2018 1 次提交
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由 Masahiro Yamada 提交于
The UniPhier platform highly relies on the reset controller. Select RESET_CONTROLLER to enable it forcibly. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 19 7月, 2018 1 次提交
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由 Nishanth Menon 提交于
Add support for Texas Instrument's K3 Multicore SoC architecture processors. Reviewed-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 5月, 2018 1 次提交
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由 Yoshihiro Shimoda 提交于
Add configuration option for the R-Car E3 (R8A77990) SoC. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 3月, 2018 1 次提交
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由 Jacopo Mondi 提交于
Add configuration option for the R-Car M3-N (R8A77965) SoC. Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 12 2月, 2018 1 次提交
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由 Sergei Shtylyov 提交于
Add a configuration option for the R-Car V3H (R8A77980) SoC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: NVladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 12月, 2017 1 次提交
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由 Qiufang Dai 提交于
Add clock controller drivers for Amlogic Meson-AXG SoC. Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NQiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: NYixun Lan <yixun.lan@amlogic.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
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- 07 11月, 2017 1 次提交
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由 Ard Biesheuvel 提交于
The Socionext Synquacer SoC has an external interrupt unit (EXIU) that forwards a block of 32 configurable input lines to 32 adjacent level-high type GICv3 SPIs. The EXIU has per-interrupt level/edge and polarity controls, and mask bits that keep the outgoing lines de-asserted, even though the controller may still latch interrupt conditions that occur while the line is masked. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 29 10月, 2017 1 次提交
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由 Jerome Brunet 提交于
select MESON_IRQ_GPIO in Kconfig for Amlogic's meson SoC family Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 20 10月, 2017 1 次提交
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由 Sean Wang 提交于
The latest kernel tree already can support more MediaTek platforms such as MT2712 and MT7622, so additional descriptions for those platforms are added and certain cleanups are also being made here. Signed-off-by: NSean Wang <sean.wang@mediatek.com> Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>
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- 18 9月, 2017 1 次提交
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由 Geert Uytterhoeven 提交于
Add a configuration option for the R-Car V3M SoC. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 14 8月, 2017 1 次提交
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由 Shawn Guo 提交于
Select PINCTRL for ZTE platform, so that we can have ZX pinctrl driver options available for enabling. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 27 7月, 2017 1 次提交
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由 Geert Uytterhoeven 提交于
Add a configuration option for the R-Car D3 SoC. Note that r8a77995 is the first Renesas "r8a<n>" SoC using a 5 digit number in its Kconfig symbol, as r8a77990 will be a different SoC. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 21 6月, 2017 2 次提交
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由 Thomas Petazzoni 提交于
This commit enables the newly introduced Marvell GICP and ICUs driver for the 64-bit Marvell EBU platforms. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Gregory CLEMENT 提交于
This commit makes sure the drivers for the Armada 7K/8K pin controllers are enabled. Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 19 6月, 2017 1 次提交
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由 Andreas Färber 提交于
Add ARCH_ACTIONS. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 14 6月, 2017 1 次提交
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由 Daniel Lezcano 提交于
The config option name is now renamed to 'TIMER_OF' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 6月, 2017 1 次提交
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由 Jayachandran C 提交于
Disable the option ARCH_VULCAN as a step towards deleting it entirely. There is still a reference in the kernel tree for ARCH_VULCAN, so we have to keep the config option around until that reference is removed. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 25 5月, 2017 1 次提交
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由 Andreas Färber 提交于
Add a Kconfig option ARCH_REALTEK. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 28 4月, 2017 1 次提交
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由 Arnd Bergmann 提交于
The sunxi clk driver causes a link error when the reset controller subsystem is disabled: drivers/clk/built-in.o: In function `sun4i_ve_clk_setup': :(.init.text+0xd040): undefined reference to `reset_controller_register' drivers/clk/built-in.o: In function `sun4i_a10_display_init': :(.init.text+0xe5e0): undefined reference to `reset_controller_register' drivers/clk/built-in.o: In function `sunxi_usb_clk_setup': :(.init.text+0x10074): undefined reference to `reset_controller_register' We already force it to be enabled on arm32 and some other arm64 platforms, but not on arm64/sunxi. This adds the respective Kconfig statements to also select it here. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 26 4月, 2017 1 次提交
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由 Gregory CLEMENT 提交于
This commit makes sure the driver for the Armada 37xx pin controller is enabled. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 22 3月, 2017 1 次提交
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由 Krzysztof Kozlowski 提交于
Enable EXYNOS_PM_DOMAINS because recently Exynos5433 got support for Power Management domains. The Exynos5433 pinctrl driver requires EXYNOS_PMU to get the syscon-regmap for PMU address space. Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com> Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>
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- 20 3月, 2017 1 次提交
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由 Icenowy Zheng 提交于
As the pinctrl driver selecting is refactored in Kconfig file of pinctrl-sunxi, now we can select only PINCTRL for Allwinner platform, and the default value of several pinctrl drivers useful on ARM64 Allwinner SoCs will become Y. This is the situation of 32-bit ARM ARCH_SUNXI option. Drop the select of per-SoC pinctrl choices, but keep selecting PINCTRL. Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 09 2月, 2017 1 次提交
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由 Jayachandran C 提交于
Add support for ThunderX2 CN99XX arm64 server processors. Introduce a new arm64 platform config option ARCH_THUNDER2 for these processors. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 24 11月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
Identify the SoC type and revision, and register this information with the SoC bus, so it is available under /sys/devices/soc0/, and can be checked where needed using soc_device_match(). Identification is done using the Product Register or Common Chip Code Register, as declared in DT (PRR only for now), or using a hardcoded fallback if missing. Example: Detected Renesas R-Car Gen2 r8a7791 ES1.0 ... # cat /sys/devices/soc0/{machine,family,soc_id,revision} Koelsch R-Car Gen2 r8a7791 ES1.0 Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 13 11月, 2016 1 次提交
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由 Michael Scott 提交于
While debugging a kernel image size issue, I discovered that if all non ARCH_QCOM configs in the ARM64 defconfig are disabled, the QCOM pinctrl drivers will not be built. The QCOM pinctrl drivers have a dependency on GPIOLIB which was being selected when other ARCH configs were enabled, but ARCH_QCOM doesn't select GPIOLIB directly. Let's select GPIOLIB here to ensure the pinctrl drivers are built for QCOM platforms. Signed-off-by: NMichael Scott <michael.scott@linaro.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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- 22 10月, 2016 1 次提交
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由 Masahiro Yamada 提交于
The UniPhier reset driver (drivers/reset/reset-uniphier.c) has been merged. Select ARCH_HAS_RESET_CONTROLLER from the SoC Kconfig. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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