- 13 9月, 2019 5 次提交
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由 Pascal van Leeuwen 提交于
This patch derives the result descriptor fetch count from the actual FIFO size advertised by the hardware. Fetching result descriptors one at a time is a performance bottleneck for small blocks, especially on hardware with multiple pipes. Even moreso if the HW has few rings. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch derives the command descriptor fetch count from the actual FIFO size advertised by the hardware. Fetching command descriptors one at a time is a performance bottleneck for small blocks, especially on hardware with multiple pipes. Even moreso if the HW has few rings. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch enables algorithms that did not fit the original 32 bit FUNCTION_EN register anymore via the FUNCTION2_EN extension reg. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch corrects the configuration of the EIP197_PE_EIP96_TOKEN_CTRL register. Previous value was wrong and potentially dangerous. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch adds automatic EIP97/EIP197 detection, so it does not need to rely on any static value from the device table anymore. In particular, the static value from the table won't work for PCI devboards that cannot be further identified save from this direct hardware probing. The patch also adds automatic host xs endianness detection & correction. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 05 9月, 2019 6 次提交
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由 Pascal van Leeuwen 提交于
This patch adds support for the basic AES-CCM AEAD cipher suite. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch adds support for AES in output feedback mode (AES-OFB). Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch adds support for AES in 128 bit cipher feedback mode (AES-CFB). Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch adds support for the basic AES-GCM AEAD cipher suite. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch probes the supported algorithms from the hardware and only registers the ones that the hardware actually supports. This is necessary because this is a generic driver supposed to run on a wide variety of engines, which may or may not implement certain algorithms. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch adds support for the AES-XTS skcipher algorithm. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 30 8月, 2019 3 次提交
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由 Pascal van Leeuwen 提交于
Until now, the inside-secure driver required a set of firmware images supplied by the silicon vendor, typically under NDA, to be present in /lib/firmware/inside-secure in order to be able to function. This patch removes the dependence on this official vendor firmware by falling back to generic "mini" FW - developed specifically for this driver - that can be provided under GPL 2.0 through linux-firmwares. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Acked-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This patch adds support for a PCIE development board with FPGA from Xilinx, to facilitate pre-silicon driver development by both Inside Secure and its IP customers. Since Inside Secure neither produces nor has access to actual silicon, this is required functionality to allow us to contribute. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Acked-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
This removes some code determine which engine has which algorithms which was effectively redundant (may have been forward-looking?) due to always enabling all algorithms for all currently supported engines. A future patch will use a different, more scalable approach to achieve this. This is removed now because otherwise the next patch will add new hardware which would otherwise have to be added to all algorithms, so now is a convenient time to just get rid of this. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Acked-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 09 8月, 2019 1 次提交
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由 YueHaibing 提交于
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by: NHulk Robot <hulkci@huawei.com> Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Acked-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 26 7月, 2019 4 次提交
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由 Pascal van Leeuwen 提交于
This patch adds support for the following AEAD ciphersuites: - authenc(hmac(sha1),rfc3686(ctr(aes))) - authenc(hmac(sha224),rfc3686(ctr(aes))) - authenc(hmac(sha256),rfc3686(ctr(aes))) - authenc(hmac(sha384),rfc3686(ctr(aes))) - authenc(hmac(sha512),rfc3686(ctr(aes))) Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Pascal van Leeuwen 提交于
Driver was printing an error message for certain input error cases that should just return -EINVAL, which caused the related testmgr extra tests to flood the kernel message log. Ensured those cases remain silent while making some other device-specific errors a bit more verbose. Signed-off-by: NPascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 06 6月, 2019 4 次提交
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由 Antoine Tenart 提交于
The context given to the crypto engine can be reused over time. While the driver was designed to allow this, the feature wasn't enabled in the hardware engine. This patch enables it. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
This patch changes the error reported by the Inside Secure SafeXcel driver when a result descriptor reports an error, from -EIO to -EINVAL, as this is what the crypto framework expects. This was found while running the crypto extra tests. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
The result descriptors contain errors, which are represented as a bitmap. This patch updates the error message to not treat the error as a decimal value, but as an hexadecimal one. This helps in knowing the value does not have a direct meaning (the set bits themselves have). Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
This cosmetic patch fixes a cosmetic issue with if brackets. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 06 10月, 2018 1 次提交
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由 Kees Cook 提交于
As done treewide earlier, this catches several more open-coded allocation size calculations that were added to the kernel during the merge window. This performs the following mechanical transformations using Coccinelle: kvmalloc(a * b, ...) -> kvmalloc_array(a, b, ...) kvzalloc(a * b, ...) -> kvcalloc(a, b, ...) devm_kzalloc(..., a * b, ...) -> devm_kcalloc(..., a, b, ...) Signed-off-by: NKees Cook <keescook@chromium.org>
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- 20 7月, 2018 1 次提交
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由 Antoine Tenart 提交于
Use the appropriate SPDX license identifiers and drop the license text. This patch is only cosmetic. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 09 7月, 2018 15 次提交
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由 Ofer Heifetz 提交于
This patch main goal is to improve driver performance by moving the crypto request from a list to a RDR ring shadow. This is possible since there is one producer and one consume for this RDR request shadow and one ring descriptor is left unused. Doing this change eliminates the use of spinlock when accessing the descriptor ring and the need to dynamicaly allocate memory per crypto request. The crypto request is placed in the first RDR shadow descriptor only if there are enough descriptors, when the result handler is invoked, it fetches the first result descriptor from RDR shadow. Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
This patch adds support for two new algorithms in the Inside Secure SafeXcel cryptographic engine driver: ecb(des3_ede) and cbc(des3_ede). Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
This patch adds support for two algorithms in the Inside Secure SafeXcel cryptographic engine driver: ecb(des) and cbc(des). Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
This patch adds support for the hmac(md5) algorithm in the Inside Secure SafeXcel cryptographic engine driver. Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
This patch adds the MD5 algorithm support to the Inside Secure SafeXcel cryptographic engine driver. Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
The ORO bridge (connected to the EIP197 write channel) does not generate back pressure towards the EIP197 when its internal FIFO is full. It assumes that the EIP will not drive more write transactions than the maximal supported outstanding (32). Hence tx_max_cmd_queue must be configured to 5 (or less). Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
This patch adds extra steps in the module removal path, to reset the command and result rings. The corresponding interrupts are cleared, and the ring address configuration is reset. Signed-off-by: NOfer Heifetz <oferh@marvell.com> [Antoine: small reworks, commit message] Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
This patch updates the TRC configuration so that the version of the EIP197 engine being used is taken into account, as the configuration differs between the EIP197B and the EIP197D. Signed-off-by: NOfer Heifetz <oferh@marvell.com> [Antoine: commit message] Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
This patch adds support for the eip197d engine to the Inside Secure SafeXcel cryptographic driver. This new engine is similar to the eip197b and reuse most of its code. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
So far a single processing engine (PE) was configured and used in the Inside Secure SafeXcel cryptographic engine driver. Some versions have more than a single PE. This patch rework the driver's initialization to take this into account and to allow configuring more than one PE. Signed-off-by: NOfer Heifetz <oferh@marvell.com> [Antoine: some reworks and commit message.] Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ofer Heifetz 提交于
The Inside Secure SafeXcel driver currently uses 4 rings, but the eip197d engines has 8 of them. This patch updates the driver so that rings are allocated dynamically based on the number of available rings supported by a given engine. Signed-off-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
Add a flags field in the private structure, and a first flag for engines needing context invalidation (currently only the eip197b). The invalidation is needed when the engine includes a TRC cache, which will also be true for the upcoming addition of the eip197d engine. Suggested-by: NOfer Heifetz <oferh@marvell.com> Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
EIP engines do not support the same set of algorithms. So far the supported engines in the Inside Secure SafeXcel driver support the same set of algorithms, but that won't be true for all engines. This patch adds an 'engines' field in the algorithm definitions so that they only are registered when using a compatible cryptographic engine. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
At first we used two compatibles in the SafeXcel driver, named after the engine revision: eip97 and eip197. However this family of engines has more precise versions and in fact we're supporting the eip97ies and eip197b. More versions will be supported in the future, such as the eip197d, and we'll need to differentiate them. This patch fixes the compatibles used in the driver, to now use precise ones. The two historical compatibles are kept for backward compatibility. Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Antoine Tenart 提交于
This patch moves the firmware loaded by the Inside Secure SafeXcel driver from /lib/firmware/ to /lib/firmware/inside-secure/eip197b/. This prepares the driver for future patches which will support other revisions of the EIP197 crypto engine as they'll have their own firmwares. To keep the compatibility of what was done, the old path is still supported as a fallback for the EIP197b (currently the only one supported by the driver that loads a firmware). Signed-off-by: NAntoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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