Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Make sure IFLUSH is not the last instruction in the hardware loop to avoid
infinite core stall.

The dcache/icache function that only gets used in writeback mode was putting
IFLUSH as the last instruction in the hardware loop ... we know from design
that this may often lead to inifite core stalling, so switch the FLUSH/IFLUSH
order.
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

The cache code I added flushes 1 line too little if the start address is
not aligned to the cache size. Cache align the start address so that when
we straddle cache aligns, we get the right count.
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - to be correct wrt to end ranges
 - to be optimal with a one-instruction hardware loop
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

As policy->governor is already set to CPUFREQ_DEFAULT_GOVERNOR in the
(always built-in) cpufreq core, we do not need to set it in the drivers.
This fixes the sparc64 allmodconfig build failure.

Also, remove a totally useles setting of ->policy in cpufreq-pxa3xx.c.
Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net>
Acked-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The kernel does not properly clear the EBIU Error Master (EBIU_ERRMST) Register
on BF548, which causes the kernel to panic.

We need to make sure that we clear the EBIU_ERRMST (necessary on BF54x)
Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

a global _sys_trace will cause the assembler to fail, it should be fixed in toolchain side firstly.
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Apply ANOMALY_05000283 & ANOMALY_05000315
Workaround also to the EXCEPTION path.

Cover evt_ivhw also with ANOMALY_05000315
The Workaround needs to be prior to accesses (either read or write) to
any system MMR.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Blackfin arch: clear EMAC_SYSTAT during IRQ init rather than early head.S as we dont need it setup that early
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - remove cheesy read_iloc() function
 - move invalidate_entire_icache function to lock.S
 - export proper prototypes for functions in lock.S
 - only build lock.S when BFIN_ICACHE_LOCK is enabled
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

This way we ensure that reboot succeeds.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - Disable all bits in SIC_IWR unless we are going into a real (DPMC)
   power saving mode. Any Interrupt can wake the core form it's idle state.

 - Remove deep sleep mode as it is not going to be used anywhere:
   We support sleep, sleep deeper and hibernate.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Blackfin arch: unify the duplicated portions of __start and split mach-specific pieces into _mach_early_start where they will be easier to trim over time
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Blackfin arch: remove support for Anomaly 05000125 as it doesnt exist on any supported processor/silicon
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - Skip single step if global interrupt disable bit is set.
 - Extend bernds' patch r4673 to skip single step in any interrupt entry
   that interrupts the code which is under single stepping. Bernds' patch
   only allow user space single stepping.
Singed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Merge VR Regulator Hibernate wakeups into set_irq_wake for internal
interrupts.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NJie Zhang <jie.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Blackfin arch: Fix bug - skip single step in high priority interrupt handler instead of disabling all interrupts in single step debugging.

Skip single step if event priority of current instruction is higher than
that of the first instruction, from which gdb starts single step.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Enable: PM_SUSPEND_MEM -> Blackfin Hibernate to SDRAM
This feature requires a special bootloader (u-boot)
supporting return from hibernate.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

use kernel command line mem and max_mem bootargs to limit
availabe memory instead.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

 - Implement irq_chip.enable and irq_chip.disable
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

When transferring to IRQ5 from an exception, save SYSCFG in memory across the
transfer and clear the trace bit.

When we get a single step exception, check whether we can safely clear the
trace bit in SYSCFG.  We can (and should) clear it after the first instruction
of the interrupt handler; the first insn saves SYSCFG to the stack in all
handlers.
Signed-off-by: NBernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: NBryan Wu <cooloney@kernel.org>